WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia32/src/smp/mps.c


/*
 * Copyright (c) 2001-2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia32   
 * @{
 */
/** @file
 */
 
#ifdef CONFIG_SMP
 
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
 
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
 
/*
 * MultiProcessor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
int mps_fs_check(uint8_t *base);
int mps_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(uint8_t n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
 
/*
 * Implementation of IA-32 SMP configuration interface.
 */
static count_t get_cpu_count(void);
static bool is_cpu_enabled(index_t i);
static bool is_bsp(index_t i);
static uint8_t get_cpu_apic_id(index_t i);
static int mps_irq_to_pin(int irq);
 
struct smp_config_operations mps_config_operations = {
    .cpu_count = get_cpu_count,
    .cpu_enabled = is_cpu_enabled,
    .cpu_bootstrap = is_bsp,
    .cpu_apic_id = get_cpu_apic_id,
    .irq_to_pin = mps_irq_to_pin
};
 
count_t get_cpu_count(void)
{
    return processor_entry_cnt;
}
 
bool is_cpu_enabled(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x1;
}
 
bool is_bsp(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x2;
}
 
uint8_t get_cpu_apic_id(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].l_apic_id;
}
 
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mps_fs_check(uint8_t *base)
{
    int i;
    uint8_t sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum += base[i];
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mps_ct_check(void)
{
    uint8_t *base = (uint8_t *) ct;
    uint8_t *ext = base + ct->base_table_length;
    uint8_t sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i=0,sum=0; i < ct->base_table_length; i++)
        sum += base[i];
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i=0,sum=0; i < ct->ext_table_length; i++)
        sum += ext[i];
       
    return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
    uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) };
    int i, j, length[2] = { 1024, 64*1024 };
   
 
    /*
     * Find MP Floating Pointer Structure
     * 1a. search first 1K of EBDA
     * 1b. if EBDA is undefined, search last 1K of base memory
     *  2. search 64K starting at 0xf0000
     */
 
    addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024);
    for (i = 0; i < 2; i++) {
        for (j = 0; j < length[i]; j += 16) {
            if (*((uint32_t *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
                fs = (struct mps_fs *) &addr[i][j];
                goto fs_found;
            }
        }
    }
 
    return;
   
fs_found:
    printf("%p: MPS Floating Pointer Structure\n", fs);
 
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("%s: PIC mode not supported\n", __FUNCTION__);
            return;
        }
 
        ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    return;
}
 
int configure_via_ct(void)
{
    uint8_t *cur;
    int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("%s: bad ct->signature\n", __FUNCTION__);
        return 1;
    }
    if (!mps_ct_check()) {
        printf("%s: bad ct checksum\n", __FUNCTION__);
        return 1;
    }
    if (ct->oem_table) {
        printf("%s: ct->oem_table not supported\n", __FUNCTION__);
        return 1;
    }
   
    l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i=0; i < ct->entry_count; i++) {
        switch (*cur) {
            /* Processor entry */
            case 0:
                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
                processor_entry_cnt++;
                cnt += ct_processor_entry((struct __processor_entry *) cur);
                cur += 20;
                break;
 
            /* Bus entry */
            case 1:
                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
                bus_entry_cnt++;
                ct_bus_entry((struct __bus_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Apic */
            case 2:
                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
                ct_io_apic_entry((struct __io_apic_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Interrupt Assignment */
            case 3:
                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
                io_intr_entry_cnt++;
                ct_io_intr_entry((struct __io_intr_entry *) cur);
                cur += 8;
                break;
 
            /* Local Interrupt Assignment */
            case 4:
                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
                l_intr_entry_cnt++;
                ct_l_intr_entry((struct __l_intr_entry *) cur);
                cur += 8;
                break;
 
            default:
                /*
                 * Something is wrong. Fallback to UP mode.
                 */
                 
                printf("%s: ct badness\n", __FUNCTION__);
                return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(uint8_t n)
{
    /*
     * Not yet implemented.
     */
    printf("%s: not supported\n", __FUNCTION__);
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1<<0)) == 0)
        return 0;
   
    apic_id_mask |= (1<<pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
    char buf[7];
    memcpy((void *) buf, (void *) bus->bus_type, 6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if ((ioa->io_apic_flags & 1) == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
    switch (iointr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (iointr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((iointr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
    switch (lintr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (lintr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((lintr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    uint8_t *ext = (uint8_t *) ct + ct->base_table_length;
    uint8_t *cur;
 
    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
        switch (cur[CT_EXT_ENTRY_TYPE]) {
            default:
                printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
                break;
        }
    }
}
 
int mps_irq_to_pin(int irq)
{
    int i;
   
    for(i=0;i<io_intr_entry_cnt;i++) {
        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* CONFIG_SMP */
 
/** @}
 */
 

Rev 2071	Rev 2089
1	/*	1	/*
2	* Copyright (c) 2001-2005 Jakub Jermar	2	* Copyright (c) 2001-2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32	29	/** @addtogroup ia32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifdef CONFIG_SMP	35	#ifdef CONFIG_SMP
36		36
37	#include <config.h>	37	#include <config.h>
38	#include <print.h>	38	#include <print.h>
39	#include <debug.h>	39	#include <debug.h>
40	#include <arch/smp/mps.h>	40	#include <arch/smp/mps.h>
41	#include <arch/smp/apic.h>	41	#include <arch/smp/apic.h>
42	#include <arch/smp/smp.h>	42	#include <arch/smp/smp.h>
43	#include <func.h>	43	#include <func.h>
44	#include <arch/types.h>	44	#include <arch/types.h>
45	#include <typedefs.h>	-
46	#include <cpu.h>	45	#include <cpu.h>
47	#include <arch/asm.h>	46	#include <arch/asm.h>
48	#include <arch/bios/bios.h>	47	#include <arch/bios/bios.h>
49	#include <mm/frame.h>	48	#include <mm/frame.h>
50		49
51	/*	50	/*
52	* MultiProcessor Specification detection code.	51	* MultiProcessor Specification detection code.
53	*/	52	*/
54		53
55	#define FS_SIGNATURE 0x5f504d5f	54	#define FS_SIGNATURE 0x5f504d5f
56	#define CT_SIGNATURE 0x504d4350	55	#define CT_SIGNATURE 0x504d4350
57		56
58	int mps_fs_check(uint8_t *base);	57	int mps_fs_check(uint8_t *base);
59	int mps_ct_check(void);	58	int mps_ct_check(void);
60		59
61	int configure_via_ct(void);	60	int configure_via_ct(void);
62	int configure_via_default(uint8_t n);	61	int configure_via_default(uint8_t n);
63		62
64	int ct_processor_entry(struct __processor_entry *pr);	63	int ct_processor_entry(struct __processor_entry *pr);
65	void ct_bus_entry(struct __bus_entry *bus);	64	void ct_bus_entry(struct __bus_entry *bus);
66	void ct_io_apic_entry(struct __io_apic_entry *ioa);	65	void ct_io_apic_entry(struct __io_apic_entry *ioa);
67	void ct_io_intr_entry(struct __io_intr_entry *iointr);	66	void ct_io_intr_entry(struct __io_intr_entry *iointr);
68	void ct_l_intr_entry(struct __l_intr_entry *lintr);	67	void ct_l_intr_entry(struct __l_intr_entry *lintr);
69		68
70	void ct_extended_entries(void);	69	void ct_extended_entries(void);
71		70
72	static struct mps_fs *fs;	71	static struct mps_fs *fs;
73	static struct mps_ct *ct;	72	static struct mps_ct *ct;
74		73
75	struct __processor_entry *processor_entries = NULL;	74	struct __processor_entry *processor_entries = NULL;
76	struct __bus_entry *bus_entries = NULL;	75	struct __bus_entry *bus_entries = NULL;
77	struct __io_apic_entry *io_apic_entries = NULL;	76	struct __io_apic_entry *io_apic_entries = NULL;
78	struct __io_intr_entry *io_intr_entries = NULL;	77	struct __io_intr_entry *io_intr_entries = NULL;
79	struct __l_intr_entry *l_intr_entries = NULL;	78	struct __l_intr_entry *l_intr_entries = NULL;
80		79
81	int processor_entry_cnt = 0;	80	int processor_entry_cnt = 0;
82	int bus_entry_cnt = 0;	81	int bus_entry_cnt = 0;
83	int io_apic_entry_cnt = 0;	82	int io_apic_entry_cnt = 0;
84	int io_intr_entry_cnt = 0;	83	int io_intr_entry_cnt = 0;
85	int l_intr_entry_cnt = 0;	84	int l_intr_entry_cnt = 0;
86		85
87	/*	86	/*
88	* Implementation of IA-32 SMP configuration interface.	87	* Implementation of IA-32 SMP configuration interface.
89	*/	88	*/
90	static count_t get_cpu_count(void);	89	static count_t get_cpu_count(void);
91	static bool is_cpu_enabled(index_t i);	90	static bool is_cpu_enabled(index_t i);
92	static bool is_bsp(index_t i);	91	static bool is_bsp(index_t i);
93	static uint8_t get_cpu_apic_id(index_t i);	92	static uint8_t get_cpu_apic_id(index_t i);
94	static int mps_irq_to_pin(int irq);	93	static int mps_irq_to_pin(int irq);
95		94
96	struct smp_config_operations mps_config_operations = {	95	struct smp_config_operations mps_config_operations = {
97	.cpu_count = get_cpu_count,	96	.cpu_count = get_cpu_count,
98	.cpu_enabled = is_cpu_enabled,	97	.cpu_enabled = is_cpu_enabled,
99	.cpu_bootstrap = is_bsp,	98	.cpu_bootstrap = is_bsp,
100	.cpu_apic_id = get_cpu_apic_id,	99	.cpu_apic_id = get_cpu_apic_id,
101	.irq_to_pin = mps_irq_to_pin	100	.irq_to_pin = mps_irq_to_pin
102	};	101	};
103		102
104	count_t get_cpu_count(void)	103	count_t get_cpu_count(void)
105	{	104	{
106	return processor_entry_cnt;	105	return processor_entry_cnt;
107	}	106	}
108		107
109	bool is_cpu_enabled(index_t i)	108	bool is_cpu_enabled(index_t i)
110	{	109	{
111	ASSERT(i < processor_entry_cnt);	110	ASSERT(i < processor_entry_cnt);
112	return processor_entries[i].cpu_flags & 0x1;	111	return processor_entries[i].cpu_flags & 0x1;
113	}	112	}
114		113
115	bool is_bsp(index_t i)	114	bool is_bsp(index_t i)
116	{	115	{
117	ASSERT(i < processor_entry_cnt);	116	ASSERT(i < processor_entry_cnt);
118	return processor_entries[i].cpu_flags & 0x2;	117	return processor_entries[i].cpu_flags & 0x2;
119	}	118	}
120		119
121	uint8_t get_cpu_apic_id(index_t i)	120	uint8_t get_cpu_apic_id(index_t i)
122	{	121	{
123	ASSERT(i < processor_entry_cnt);	122	ASSERT(i < processor_entry_cnt);
124	return processor_entries[i].l_apic_id;	123	return processor_entries[i].l_apic_id;
125	}	124	}
126		125
127		126
128	/*	127	/*
129	* Used to check the integrity of the MP Floating Structure.	128	* Used to check the integrity of the MP Floating Structure.
130	*/	129	*/
131	int mps_fs_check(uint8_t *base)	130	int mps_fs_check(uint8_t *base)
132	{	131	{
133	int i;	132	int i;
134	uint8_t sum;	133	uint8_t sum;
135		134
136	for (i = 0, sum = 0; i < 16; i++)	135	for (i = 0, sum = 0; i < 16; i++)
137	sum += base[i];	136	sum += base[i];
138		137
139	return !sum;	138	return !sum;
140	}	139	}
141		140
142	/*	141	/*
143	* Used to check the integrity of the MP Configuration Table.	142	* Used to check the integrity of the MP Configuration Table.
144	*/	143	*/
145	int mps_ct_check(void)	144	int mps_ct_check(void)
146	{	145	{
147	uint8_t base = (uint8_t ) ct;	146	uint8_t base = (uint8_t ) ct;
148	uint8_t *ext = base + ct->base_table_length;	147	uint8_t *ext = base + ct->base_table_length;
149	uint8_t sum;	148	uint8_t sum;
150	int i;	149	int i;
151		150
152	/* count the checksum for the base table */	151	/* count the checksum for the base table */
153	for (i=0,sum=0; i < ct->base_table_length; i++)	152	for (i=0,sum=0; i < ct->base_table_length; i++)
154	sum += base[i];	153	sum += base[i];
155		154
156	if (sum)	155	if (sum)
157	return 0;	156	return 0;
158		157
159	/* count the checksum for the extended table */	158	/* count the checksum for the extended table */
160	for (i=0,sum=0; i < ct->ext_table_length; i++)	159	for (i=0,sum=0; i < ct->ext_table_length; i++)
161	sum += ext[i];	160	sum += ext[i];
162		161
163	return sum == ct->ext_table_checksum;	162	return sum == ct->ext_table_checksum;
164	}	163	}
165		164
166	void mps_init(void)	165	void mps_init(void)
167	{	166	{
168	uint8_t addr[2] = { NULL, (uint8_t ) PA2KA(0xf0000) };	167	uint8_t addr[2] = { NULL, (uint8_t ) PA2KA(0xf0000) };
169	int i, j, length[2] = { 1024, 64*1024 };	168	int i, j, length[2] = { 1024, 64*1024 };
170		169
171		170
172	/*	171	/*
173	* Find MP Floating Pointer Structure	172	* Find MP Floating Pointer Structure
174	* 1a. search first 1K of EBDA	173	* 1a. search first 1K of EBDA
175	* 1b. if EBDA is undefined, search last 1K of base memory	174	* 1b. if EBDA is undefined, search last 1K of base memory
176	* 2. search 64K starting at 0xf0000	175	* 2. search 64K starting at 0xf0000
177	*/	176	*/
178		177
179	addr[0] = (uint8_t ) PA2KA(ebda ? ebda : 639 1024);	178	addr[0] = (uint8_t ) PA2KA(ebda ? ebda : 639 1024);
180	for (i = 0; i < 2; i++) {	179	for (i = 0; i < 2; i++) {
181	for (j = 0; j < length[i]; j += 16) {	180	for (j = 0; j < length[i]; j += 16) {
182	if (((uint32_t ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {	181	if (((uint32_t ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
183	fs = (struct mps_fs *) &addr[i][j];	182	fs = (struct mps_fs *) &addr[i][j];
184	goto fs_found;	183	goto fs_found;
185	}	184	}
186	}	185	}
187	}	186	}
188		187
189	return;	188	return;
190		189
191	fs_found:	190	fs_found:
192	printf("%p: MPS Floating Pointer Structure\n", fs);	191	printf("%p: MPS Floating Pointer Structure\n", fs);
193		192
194	if (fs->config_type == 0 && fs->configuration_table) {	193	if (fs->config_type == 0 && fs->configuration_table) {
195	if (fs->mpfib2 >> 7) {	194	if (fs->mpfib2 >> 7) {
196	printf("%s: PIC mode not supported\n", __FUNCTION__);	195	printf("%s: PIC mode not supported\n", __FUNCTION__);
197	return;	196	return;
198	}	197	}
199		198
200	ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);	199	ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
201	config.cpu_count = configure_via_ct();	200	config.cpu_count = configure_via_ct();
202	}	201	}
203	else	202	else
204	config.cpu_count = configure_via_default(fs->config_type);	203	config.cpu_count = configure_via_default(fs->config_type);
205		204
206	return;	205	return;
207	}	206	}
208		207
209	int configure_via_ct(void)	208	int configure_via_ct(void)
210	{	209	{
211	uint8_t *cur;	210	uint8_t *cur;
212	int i, cnt;	211	int i, cnt;
213		212
214	if (ct->signature != CT_SIGNATURE) {	213	if (ct->signature != CT_SIGNATURE) {
215	printf("%s: bad ct->signature\n", __FUNCTION__);	214	printf("%s: bad ct->signature\n", __FUNCTION__);
216	return 1;	215	return 1;
217	}	216	}
218	if (!mps_ct_check()) {	217	if (!mps_ct_check()) {
219	printf("%s: bad ct checksum\n", __FUNCTION__);	218	printf("%s: bad ct checksum\n", __FUNCTION__);
220	return 1;	219	return 1;
221	}	220	}
222	if (ct->oem_table) {	221	if (ct->oem_table) {
223	printf("%s: ct->oem_table not supported\n", __FUNCTION__);	222	printf("%s: ct->oem_table not supported\n", __FUNCTION__);
224	return 1;	223	return 1;
225	}	224	}
226		225
227	l_apic = (uint32_t *)(uintptr_t)ct->l_apic;	226	l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
228		227
229	cnt = 0;	228	cnt = 0;
230	cur = &ct->base_table[0];	229	cur = &ct->base_table[0];
231	for (i=0; i < ct->entry_count; i++) {	230	for (i=0; i < ct->entry_count; i++) {
232	switch (*cur) {	231	switch (*cur) {
233	/* Processor entry */	232	/* Processor entry */
234	case 0:	233	case 0:
235	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;	234	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
236	processor_entry_cnt++;	235	processor_entry_cnt++;
237	cnt += ct_processor_entry((struct __processor_entry *) cur);	236	cnt += ct_processor_entry((struct __processor_entry *) cur);
238	cur += 20;	237	cur += 20;
239	break;	238	break;
240		239
241	/* Bus entry */	240	/* Bus entry */
242	case 1:	241	case 1:
243	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;	242	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
244	bus_entry_cnt++;	243	bus_entry_cnt++;
245	ct_bus_entry((struct __bus_entry *) cur);	244	ct_bus_entry((struct __bus_entry *) cur);
246	cur += 8;	245	cur += 8;
247	break;	246	break;
248		247
249	/* I/O Apic */	248	/* I/O Apic */
250	case 2:	249	case 2:
251	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;	250	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
252	io_apic_entry_cnt++;	251	io_apic_entry_cnt++;
253	ct_io_apic_entry((struct __io_apic_entry *) cur);	252	ct_io_apic_entry((struct __io_apic_entry *) cur);
254	cur += 8;	253	cur += 8;
255	break;	254	break;
256		255
257	/* I/O Interrupt Assignment */	256	/* I/O Interrupt Assignment */
258	case 3:	257	case 3:
259	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;	258	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
260	io_intr_entry_cnt++;	259	io_intr_entry_cnt++;
261	ct_io_intr_entry((struct __io_intr_entry *) cur);	260	ct_io_intr_entry((struct __io_intr_entry *) cur);
262	cur += 8;	261	cur += 8;
263	break;	262	break;
264		263
265	/* Local Interrupt Assignment */	264	/* Local Interrupt Assignment */
266	case 4:	265	case 4:
267	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;	266	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
268	l_intr_entry_cnt++;	267	l_intr_entry_cnt++;
269	ct_l_intr_entry((struct __l_intr_entry *) cur);	268	ct_l_intr_entry((struct __l_intr_entry *) cur);
270	cur += 8;	269	cur += 8;
271	break;	270	break;
272		271
273	default:	272	default:
274	/*	273	/*
275	* Something is wrong. Fallback to UP mode.	274	* Something is wrong. Fallback to UP mode.
276	*/	275	*/
277		276
278	printf("%s: ct badness\n", __FUNCTION__);	277	printf("%s: ct badness\n", __FUNCTION__);
279	return 1;	278	return 1;
280	}	279	}
281	}	280	}
282		281
283	/*	282	/*
284	* Process extended entries.	283	* Process extended entries.
285	*/	284	*/
286	ct_extended_entries();	285	ct_extended_entries();
287	return cnt;	286	return cnt;
288	}	287	}
289		288
290	int configure_via_default(uint8_t n)	289	int configure_via_default(uint8_t n)
291	{	290	{
292	/*	291	/*
293	* Not yet implemented.	292	* Not yet implemented.
294	*/	293	*/
295	printf("%s: not supported\n", __FUNCTION__);	294	printf("%s: not supported\n", __FUNCTION__);
296	return 1;	295	return 1;
297	}	296	}
298		297
299		298
300	int ct_processor_entry(struct __processor_entry *pr)	299	int ct_processor_entry(struct __processor_entry *pr)
301	{	300	{
302	/*	301	/*
303	* Ignore processors which are not marked enabled.	302	* Ignore processors which are not marked enabled.
304	*/	303	*/
305	if ((pr->cpu_flags & (1<<0)) == 0)	304	if ((pr->cpu_flags & (1<<0)) == 0)
306	return 0;	305	return 0;
307		306
308	apic_id_mask \|= (1<<pr->l_apic_id);	307	apic_id_mask \|= (1<<pr->l_apic_id);
309	return 1;	308	return 1;
310	}	309	}
311		310
312	void ct_bus_entry(struct __bus_entry *bus)	311	void ct_bus_entry(struct __bus_entry *bus)
313	{	312	{
314	#ifdef MPSCT_VERBOSE	313	#ifdef MPSCT_VERBOSE
315	char buf[7];	314	char buf[7];
316	memcpy((void ) buf, (void ) bus->bus_type, 6);	315	memcpy((void ) buf, (void ) bus->bus_type, 6);
317	buf[6] = 0;	316	buf[6] = 0;
318	printf("bus%d: %s\n", bus->bus_id, buf);	317	printf("bus%d: %s\n", bus->bus_id, buf);
319	#endif	318	#endif
320	}	319	}
321		320
322	void ct_io_apic_entry(struct __io_apic_entry *ioa)	321	void ct_io_apic_entry(struct __io_apic_entry *ioa)
323	{	322	{
324	static int io_apic_count = 0;	323	static int io_apic_count = 0;
325		324
326	/* this ioapic is marked unusable */	325	/* this ioapic is marked unusable */
327	if ((ioa->io_apic_flags & 1) == 0)	326	if ((ioa->io_apic_flags & 1) == 0)
328	return;	327	return;
329		328
330	if (io_apic_count++ > 0) {	329	if (io_apic_count++ > 0) {
331	/*	330	/*
332	* Multiple IO APIC's are currently not supported.	331	* Multiple IO APIC's are currently not supported.
333	*/	332	*/
334	return;	333	return;
335	}	334	}
336		335
337	io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;	336	io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
338	}	337	}
339		338
340	//#define MPSCT_VERBOSE	339	//#define MPSCT_VERBOSE
341	void ct_io_intr_entry(struct __io_intr_entry *iointr)	340	void ct_io_intr_entry(struct __io_intr_entry *iointr)
342	{	341	{
343	#ifdef MPSCT_VERBOSE	342	#ifdef MPSCT_VERBOSE
344	switch (iointr->intr_type) {	343	switch (iointr->intr_type) {
345	case 0: printf("INT"); break;	344	case 0: printf("INT"); break;
346	case 1: printf("NMI"); break;	345	case 1: printf("NMI"); break;
347	case 2: printf("SMI"); break;	346	case 2: printf("SMI"); break;
348	case 3: printf("ExtINT"); break;	347	case 3: printf("ExtINT"); break;
349	}	348	}
350	putchar(',');	349	putchar(',');
351	switch (iointr->poel&3) {	350	switch (iointr->poel&3) {
352	case 0: printf("bus-like"); break;	351	case 0: printf("bus-like"); break;
353	case 1: printf("active high"); break;	352	case 1: printf("active high"); break;
354	case 2: printf("reserved"); break;	353	case 2: printf("reserved"); break;
355	case 3: printf("active low"); break;	354	case 3: printf("active low"); break;
356	}	355	}
357	putchar(',');	356	putchar(',');
358	switch ((iointr->poel>>2)&3) {	357	switch ((iointr->poel>>2)&3) {
359	case 0: printf("bus-like"); break;	358	case 0: printf("bus-like"); break;
360	case 1: printf("edge-triggered"); break;	359	case 1: printf("edge-triggered"); break;
361	case 2: printf("reserved"); break;	360	case 2: printf("reserved"); break;
362	case 3: printf("level-triggered"); break;	361	case 3: printf("level-triggered"); break;
363	}	362	}
364	putchar(',');	363	putchar(',');
365	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	364	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
366	putchar(',');	365	putchar(',');
367	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);	366	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
368	putchar('\n');	367	putchar('\n');
369	#endif	368	#endif
370	}	369	}
371		370
372	void ct_l_intr_entry(struct __l_intr_entry *lintr)	371	void ct_l_intr_entry(struct __l_intr_entry *lintr)
373	{	372	{
374	#ifdef MPSCT_VERBOSE	373	#ifdef MPSCT_VERBOSE
375	switch (lintr->intr_type) {	374	switch (lintr->intr_type) {
376	case 0: printf("INT"); break;	375	case 0: printf("INT"); break;
377	case 1: printf("NMI"); break;	376	case 1: printf("NMI"); break;
378	case 2: printf("SMI"); break;	377	case 2: printf("SMI"); break;
379	case 3: printf("ExtINT"); break;	378	case 3: printf("ExtINT"); break;
380	}	379	}
381	putchar(',');	380	putchar(',');
382	switch (lintr->poel&3) {	381	switch (lintr->poel&3) {
383	case 0: printf("bus-like"); break;	382	case 0: printf("bus-like"); break;
384	case 1: printf("active high"); break;	383	case 1: printf("active high"); break;
385	case 2: printf("reserved"); break;	384	case 2: printf("reserved"); break;
386	case 3: printf("active low"); break;	385	case 3: printf("active low"); break;
387	}	386	}
388	putchar(',');	387	putchar(',');
389	switch ((lintr->poel>>2)&3) {	388	switch ((lintr->poel>>2)&3) {
390	case 0: printf("bus-like"); break;	389	case 0: printf("bus-like"); break;
391	case 1: printf("edge-triggered"); break;	390	case 1: printf("edge-triggered"); break;
392	case 2: printf("reserved"); break;	391	case 2: printf("reserved"); break;
393	case 3: printf("level-triggered"); break;	392	case 3: printf("level-triggered"); break;
394	}	393	}
395	putchar(',');	394	putchar(',');
396	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	395	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
397	putchar(',');	396	putchar(',');
398	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	397	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
399	putchar('\n');	398	putchar('\n');
400	#endif	399	#endif
401	}	400	}
402		401
403	void ct_extended_entries(void)	402	void ct_extended_entries(void)
404	{	403	{
405	uint8_t ext = (uint8_t ) ct + ct->base_table_length;	404	uint8_t ext = (uint8_t ) ct + ct->base_table_length;
406	uint8_t *cur;	405	uint8_t *cur;
407		406
408	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {	407	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
409	switch (cur[CT_EXT_ENTRY_TYPE]) {	408	switch (cur[CT_EXT_ENTRY_TYPE]) {
410	default:	409	default:
411	printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);	410	printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
412	break;	411	break;
413	}	412	}
414	}	413	}
415	}	414	}
416		415
417	int mps_irq_to_pin(int irq)	416	int mps_irq_to_pin(int irq)
418	{	417	{
419	int i;	418	int i;
420		419
421	for(i=0;i<io_intr_entry_cnt;i++) {	420	for(i=0;i<io_intr_entry_cnt;i++) {
422	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)	421	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
423	return io_intr_entries[i].dst_io_apic_pin;	422	return io_intr_entries[i].dst_io_apic_pin;
424	}	423	}
425		424
426	return -1;	425	return -1;
427	}	426	}
428		427
429	#endif /* CONFIG_SMP */	428	#endif /* CONFIG_SMP */
430		429
431	/** @}	430	/** @}
432	*/	431	*/
433		432

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(root)/trunk/kernel/arch/ia32/src/smp/mps.c – Rev 2071 → 2089