WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia32/src/smp/mps.c


/*
 * Copyright (c) 2001-2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia32   
 * @{
 */
/** @file
 */
 
#ifdef CONFIG_SMP
 
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
#include <typedefs.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
 
/*
 * MultiProcessor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
int mps_fs_check(uint8_t *base);
int mps_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(uint8_t n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
 
/*
 * Implementation of IA-32 SMP configuration interface.
 */
static count_t get_cpu_count(void);
static bool is_cpu_enabled(index_t i);
static bool is_bsp(index_t i);
static uint8_t get_cpu_apic_id(index_t i);
static int mps_irq_to_pin(int irq);
 
struct smp_config_operations mps_config_operations = {
    .cpu_count = get_cpu_count,
    .cpu_enabled = is_cpu_enabled,
    .cpu_bootstrap = is_bsp,
    .cpu_apic_id = get_cpu_apic_id,
    .irq_to_pin = mps_irq_to_pin
};
 
count_t get_cpu_count(void)
{
    return processor_entry_cnt;
}
 
bool is_cpu_enabled(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x1;
}
 
bool is_bsp(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x2;
}
 
uint8_t get_cpu_apic_id(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].l_apic_id;
}
 
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mps_fs_check(uint8_t *base)
{
    int i;
    uint8_t sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum += base[i];
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mps_ct_check(void)
{
    uint8_t *base = (uint8_t *) ct;
    uint8_t *ext = base + ct->base_table_length;
    uint8_t sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i=0,sum=0; i < ct->base_table_length; i++)
        sum += base[i];
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i=0,sum=0; i < ct->ext_table_length; i++)
        sum += ext[i];
       
    return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
    uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) };
    int i, j, length[2] = { 1024, 64*1024 };
   
 
    /*
     * Find MP Floating Pointer Structure
     * 1a. search first 1K of EBDA
     * 1b. if EBDA is undefined, search last 1K of base memory
     *  2. search 64K starting at 0xf0000
     */
 
    addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024);
    for (i = 0; i < 2; i++) {
        for (j = 0; j < length[i]; j += 16) {
            if (*((uint32_t *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
                fs = (struct mps_fs *) &addr[i][j];
                goto fs_found;
            }
        }
    }
 
    return;
   
fs_found:
    printf("%p: MPS Floating Pointer Structure\n", fs);
 
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("%s: PIC mode not supported\n", __FUNCTION__);
            return;
        }
 
        ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    return;
}
 
int configure_via_ct(void)
{
    uint8_t *cur;
    int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("%s: bad ct->signature\n", __FUNCTION__);
        return 1;
    }
    if (!mps_ct_check()) {
        printf("%s: bad ct checksum\n", __FUNCTION__);
        return 1;
    }
    if (ct->oem_table) {
        printf("%s: ct->oem_table not supported\n", __FUNCTION__);
        return 1;
    }
   
    l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i=0; i < ct->entry_count; i++) {
        switch (*cur) {
            /* Processor entry */
            case 0:
                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
                processor_entry_cnt++;
                cnt += ct_processor_entry((struct __processor_entry *) cur);
                cur += 20;
                break;
 
            /* Bus entry */
            case 1:
                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
                bus_entry_cnt++;
                ct_bus_entry((struct __bus_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Apic */
            case 2:
                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
                ct_io_apic_entry((struct __io_apic_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Interrupt Assignment */
            case 3:
                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
                io_intr_entry_cnt++;
                ct_io_intr_entry((struct __io_intr_entry *) cur);
                cur += 8;
                break;
 
            /* Local Interrupt Assignment */
            case 4:
                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
                l_intr_entry_cnt++;
                ct_l_intr_entry((struct __l_intr_entry *) cur);
                cur += 8;
                break;
 
            default:
                /*
                 * Something is wrong. Fallback to UP mode.
                 */
                 
                printf("%s: ct badness\n", __FUNCTION__);
                return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(uint8_t n)
{
    /*
     * Not yet implemented.
     */
    printf("%s: not supported\n", __FUNCTION__);
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1<<0)) == 0)
        return 0;
   
    apic_id_mask |= (1<<pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
    char buf[7];
    memcpy((void *) buf, (void *) bus->bus_type, 6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if ((ioa->io_apic_flags & 1) == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
    switch (iointr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (iointr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((iointr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
    switch (lintr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (lintr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((lintr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    uint8_t *ext = (uint8_t *) ct + ct->base_table_length;
    uint8_t *cur;
 
    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
        switch (cur[CT_EXT_ENTRY_TYPE]) {
            default:
                printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
                break;
        }
    }
}
 
int mps_irq_to_pin(int irq)
{
    int i;
   
    for(i=0;i<io_intr_entry_cnt;i++) {
        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* CONFIG_SMP */
 
/** @}
 */
 

Rev 1901	Rev 2071
1	/*	1	/*
2	* Copyright (C) 2001-2005 Jakub Jermar	2	* Copyright (c) 2001-2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32	29	/** @addtogroup ia32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifdef CONFIG_SMP	35	#ifdef CONFIG_SMP
36		36
37	#include <config.h>	37	#include <config.h>
38	#include <print.h>	38	#include <print.h>
39	#include <debug.h>	39	#include <debug.h>
40	#include <arch/smp/mps.h>	40	#include <arch/smp/mps.h>
41	#include <arch/smp/apic.h>	41	#include <arch/smp/apic.h>
42	#include <arch/smp/smp.h>	42	#include <arch/smp/smp.h>
43	#include <func.h>	43	#include <func.h>
44	#include <arch/types.h>	44	#include <arch/types.h>
45	#include <typedefs.h>	45	#include <typedefs.h>
46	#include <cpu.h>	46	#include <cpu.h>
47	#include <arch/asm.h>	47	#include <arch/asm.h>
48	#include <arch/bios/bios.h>	48	#include <arch/bios/bios.h>
49	#include <mm/frame.h>	49	#include <mm/frame.h>
50		50
51	/*	51	/*
52	* MultiProcessor Specification detection code.	52	* MultiProcessor Specification detection code.
53	*/	53	*/
54		54
55	#define FS_SIGNATURE 0x5f504d5f	55	#define FS_SIGNATURE 0x5f504d5f
56	#define CT_SIGNATURE 0x504d4350	56	#define CT_SIGNATURE 0x504d4350
57		57
58	int mps_fs_check(uint8_t *base);	58	int mps_fs_check(uint8_t *base);
59	int mps_ct_check(void);	59	int mps_ct_check(void);
60		60
61	int configure_via_ct(void);	61	int configure_via_ct(void);
62	int configure_via_default(uint8_t n);	62	int configure_via_default(uint8_t n);
63		63
64	int ct_processor_entry(struct __processor_entry *pr);	64	int ct_processor_entry(struct __processor_entry *pr);
65	void ct_bus_entry(struct __bus_entry *bus);	65	void ct_bus_entry(struct __bus_entry *bus);
66	void ct_io_apic_entry(struct __io_apic_entry *ioa);	66	void ct_io_apic_entry(struct __io_apic_entry *ioa);
67	void ct_io_intr_entry(struct __io_intr_entry *iointr);	67	void ct_io_intr_entry(struct __io_intr_entry *iointr);
68	void ct_l_intr_entry(struct __l_intr_entry *lintr);	68	void ct_l_intr_entry(struct __l_intr_entry *lintr);
69		69
70	void ct_extended_entries(void);	70	void ct_extended_entries(void);
71		71
72	static struct mps_fs *fs;	72	static struct mps_fs *fs;
73	static struct mps_ct *ct;	73	static struct mps_ct *ct;
74		74
75	struct __processor_entry *processor_entries = NULL;	75	struct __processor_entry *processor_entries = NULL;
76	struct __bus_entry *bus_entries = NULL;	76	struct __bus_entry *bus_entries = NULL;
77	struct __io_apic_entry *io_apic_entries = NULL;	77	struct __io_apic_entry *io_apic_entries = NULL;
78	struct __io_intr_entry *io_intr_entries = NULL;	78	struct __io_intr_entry *io_intr_entries = NULL;
79	struct __l_intr_entry *l_intr_entries = NULL;	79	struct __l_intr_entry *l_intr_entries = NULL;
80		80
81	int processor_entry_cnt = 0;	81	int processor_entry_cnt = 0;
82	int bus_entry_cnt = 0;	82	int bus_entry_cnt = 0;
83	int io_apic_entry_cnt = 0;	83	int io_apic_entry_cnt = 0;
84	int io_intr_entry_cnt = 0;	84	int io_intr_entry_cnt = 0;
85	int l_intr_entry_cnt = 0;	85	int l_intr_entry_cnt = 0;
86		86
87	/*	87	/*
88	* Implementation of IA-32 SMP configuration interface.	88	* Implementation of IA-32 SMP configuration interface.
89	*/	89	*/
90	static count_t get_cpu_count(void);	90	static count_t get_cpu_count(void);
91	static bool is_cpu_enabled(index_t i);	91	static bool is_cpu_enabled(index_t i);
92	static bool is_bsp(index_t i);	92	static bool is_bsp(index_t i);
93	static uint8_t get_cpu_apic_id(index_t i);	93	static uint8_t get_cpu_apic_id(index_t i);
94	static int mps_irq_to_pin(int irq);	94	static int mps_irq_to_pin(int irq);
95		95
96	struct smp_config_operations mps_config_operations = {	96	struct smp_config_operations mps_config_operations = {
97	.cpu_count = get_cpu_count,	97	.cpu_count = get_cpu_count,
98	.cpu_enabled = is_cpu_enabled,	98	.cpu_enabled = is_cpu_enabled,
99	.cpu_bootstrap = is_bsp,	99	.cpu_bootstrap = is_bsp,
100	.cpu_apic_id = get_cpu_apic_id,	100	.cpu_apic_id = get_cpu_apic_id,
101	.irq_to_pin = mps_irq_to_pin	101	.irq_to_pin = mps_irq_to_pin
102	};	102	};
103		103
104	count_t get_cpu_count(void)	104	count_t get_cpu_count(void)
105	{	105	{
106	return processor_entry_cnt;	106	return processor_entry_cnt;
107	}	107	}
108		108
109	bool is_cpu_enabled(index_t i)	109	bool is_cpu_enabled(index_t i)
110	{	110	{
111	ASSERT(i < processor_entry_cnt);	111	ASSERT(i < processor_entry_cnt);
112	return processor_entries[i].cpu_flags & 0x1;	112	return processor_entries[i].cpu_flags & 0x1;
113	}	113	}
114		114
115	bool is_bsp(index_t i)	115	bool is_bsp(index_t i)
116	{	116	{
117	ASSERT(i < processor_entry_cnt);	117	ASSERT(i < processor_entry_cnt);
118	return processor_entries[i].cpu_flags & 0x2;	118	return processor_entries[i].cpu_flags & 0x2;
119	}	119	}
120		120
121	uint8_t get_cpu_apic_id(index_t i)	121	uint8_t get_cpu_apic_id(index_t i)
122	{	122	{
123	ASSERT(i < processor_entry_cnt);	123	ASSERT(i < processor_entry_cnt);
124	return processor_entries[i].l_apic_id;	124	return processor_entries[i].l_apic_id;
125	}	125	}
126		126
127		127
128	/*	128	/*
129	* Used to check the integrity of the MP Floating Structure.	129	* Used to check the integrity of the MP Floating Structure.
130	*/	130	*/
131	int mps_fs_check(uint8_t *base)	131	int mps_fs_check(uint8_t *base)
132	{	132	{
133	int i;	133	int i;
134	uint8_t sum;	134	uint8_t sum;
135		135
136	for (i = 0, sum = 0; i < 16; i++)	136	for (i = 0, sum = 0; i < 16; i++)
137	sum += base[i];	137	sum += base[i];
138		138
139	return !sum;	139	return !sum;
140	}	140	}
141		141
142	/*	142	/*
143	* Used to check the integrity of the MP Configuration Table.	143	* Used to check the integrity of the MP Configuration Table.
144	*/	144	*/
145	int mps_ct_check(void)	145	int mps_ct_check(void)
146	{	146	{
147	uint8_t base = (uint8_t ) ct;	147	uint8_t base = (uint8_t ) ct;
148	uint8_t *ext = base + ct->base_table_length;	148	uint8_t *ext = base + ct->base_table_length;
149	uint8_t sum;	149	uint8_t sum;
150	int i;	150	int i;
151		151
152	/* count the checksum for the base table */	152	/* count the checksum for the base table */
153	for (i=0,sum=0; i < ct->base_table_length; i++)	153	for (i=0,sum=0; i < ct->base_table_length; i++)
154	sum += base[i];	154	sum += base[i];
155		155
156	if (sum)	156	if (sum)
157	return 0;	157	return 0;
158		158
159	/* count the checksum for the extended table */	159	/* count the checksum for the extended table */
160	for (i=0,sum=0; i < ct->ext_table_length; i++)	160	for (i=0,sum=0; i < ct->ext_table_length; i++)
161	sum += ext[i];	161	sum += ext[i];
162		162
163	return sum == ct->ext_table_checksum;	163	return sum == ct->ext_table_checksum;
164	}	164	}
165		165
166	void mps_init(void)	166	void mps_init(void)
167	{	167	{
168	uint8_t addr[2] = { NULL, (uint8_t ) PA2KA(0xf0000) };	168	uint8_t addr[2] = { NULL, (uint8_t ) PA2KA(0xf0000) };
169	int i, j, length[2] = { 1024, 64*1024 };	169	int i, j, length[2] = { 1024, 64*1024 };
170		170
171		171
172	/*	172	/*
173	* Find MP Floating Pointer Structure	173	* Find MP Floating Pointer Structure
174	* 1a. search first 1K of EBDA	174	* 1a. search first 1K of EBDA
175	* 1b. if EBDA is undefined, search last 1K of base memory	175	* 1b. if EBDA is undefined, search last 1K of base memory
176	* 2. search 64K starting at 0xf0000	176	* 2. search 64K starting at 0xf0000
177	*/	177	*/
178		178
179	addr[0] = (uint8_t ) PA2KA(ebda ? ebda : 639 1024);	179	addr[0] = (uint8_t ) PA2KA(ebda ? ebda : 639 1024);
180	for (i = 0; i < 2; i++) {	180	for (i = 0; i < 2; i++) {
181	for (j = 0; j < length[i]; j += 16) {	181	for (j = 0; j < length[i]; j += 16) {
182	if (((uint32_t ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {	182	if (((uint32_t ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
183	fs = (struct mps_fs *) &addr[i][j];	183	fs = (struct mps_fs *) &addr[i][j];
184	goto fs_found;	184	goto fs_found;
185	}	185	}
186	}	186	}
187	}	187	}
188		188
189	return;	189	return;
190		190
191	fs_found:	191	fs_found:
192	printf("%p: MPS Floating Pointer Structure\n", fs);	192	printf("%p: MPS Floating Pointer Structure\n", fs);
193		193
194	if (fs->config_type == 0 && fs->configuration_table) {	194	if (fs->config_type == 0 && fs->configuration_table) {
195	if (fs->mpfib2 >> 7) {	195	if (fs->mpfib2 >> 7) {
196	printf("%s: PIC mode not supported\n", __FUNCTION__);	196	printf("%s: PIC mode not supported\n", __FUNCTION__);
197	return;	197	return;
198	}	198	}
199		199
200	ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);	200	ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
201	config.cpu_count = configure_via_ct();	201	config.cpu_count = configure_via_ct();
202	}	202	}
203	else	203	else
204	config.cpu_count = configure_via_default(fs->config_type);	204	config.cpu_count = configure_via_default(fs->config_type);
205		205
206	return;	206	return;
207	}	207	}
208		208
209	int configure_via_ct(void)	209	int configure_via_ct(void)
210	{	210	{
211	uint8_t *cur;	211	uint8_t *cur;
212	int i, cnt;	212	int i, cnt;
213		213
214	if (ct->signature != CT_SIGNATURE) {	214	if (ct->signature != CT_SIGNATURE) {
215	printf("%s: bad ct->signature\n", __FUNCTION__);	215	printf("%s: bad ct->signature\n", __FUNCTION__);
216	return 1;	216	return 1;
217	}	217	}
218	if (!mps_ct_check()) {	218	if (!mps_ct_check()) {
219	printf("%s: bad ct checksum\n", __FUNCTION__);	219	printf("%s: bad ct checksum\n", __FUNCTION__);
220	return 1;	220	return 1;
221	}	221	}
222	if (ct->oem_table) {	222	if (ct->oem_table) {
223	printf("%s: ct->oem_table not supported\n", __FUNCTION__);	223	printf("%s: ct->oem_table not supported\n", __FUNCTION__);
224	return 1;	224	return 1;
225	}	225	}
226		226
227	l_apic = (uint32_t *)(uintptr_t)ct->l_apic;	227	l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
228		228
229	cnt = 0;	229	cnt = 0;
230	cur = &ct->base_table[0];	230	cur = &ct->base_table[0];
231	for (i=0; i < ct->entry_count; i++) {	231	for (i=0; i < ct->entry_count; i++) {
232	switch (*cur) {	232	switch (*cur) {
233	/* Processor entry */	233	/* Processor entry */
234	case 0:	234	case 0:
235	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;	235	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
236	processor_entry_cnt++;	236	processor_entry_cnt++;
237	cnt += ct_processor_entry((struct __processor_entry *) cur);	237	cnt += ct_processor_entry((struct __processor_entry *) cur);
238	cur += 20;	238	cur += 20;
239	break;	239	break;
240		240
241	/* Bus entry */	241	/* Bus entry */
242	case 1:	242	case 1:
243	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;	243	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
244	bus_entry_cnt++;	244	bus_entry_cnt++;
245	ct_bus_entry((struct __bus_entry *) cur);	245	ct_bus_entry((struct __bus_entry *) cur);
246	cur += 8;	246	cur += 8;
247	break;	247	break;
248		248
249	/* I/O Apic */	249	/* I/O Apic */
250	case 2:	250	case 2:
251	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;	251	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
252	io_apic_entry_cnt++;	252	io_apic_entry_cnt++;
253	ct_io_apic_entry((struct __io_apic_entry *) cur);	253	ct_io_apic_entry((struct __io_apic_entry *) cur);
254	cur += 8;	254	cur += 8;
255	break;	255	break;
256		256
257	/* I/O Interrupt Assignment */	257	/* I/O Interrupt Assignment */
258	case 3:	258	case 3:
259	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;	259	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
260	io_intr_entry_cnt++;	260	io_intr_entry_cnt++;
261	ct_io_intr_entry((struct __io_intr_entry *) cur);	261	ct_io_intr_entry((struct __io_intr_entry *) cur);
262	cur += 8;	262	cur += 8;
263	break;	263	break;
264		264
265	/* Local Interrupt Assignment */	265	/* Local Interrupt Assignment */
266	case 4:	266	case 4:
267	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;	267	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
268	l_intr_entry_cnt++;	268	l_intr_entry_cnt++;
269	ct_l_intr_entry((struct __l_intr_entry *) cur);	269	ct_l_intr_entry((struct __l_intr_entry *) cur);
270	cur += 8;	270	cur += 8;
271	break;	271	break;
272		272
273	default:	273	default:
274	/*	274	/*
275	* Something is wrong. Fallback to UP mode.	275	* Something is wrong. Fallback to UP mode.
276	*/	276	*/
277		277
278	printf("%s: ct badness\n", __FUNCTION__);	278	printf("%s: ct badness\n", __FUNCTION__);
279	return 1;	279	return 1;
280	}	280	}
281	}	281	}
282		282
283	/*	283	/*
284	* Process extended entries.	284	* Process extended entries.
285	*/	285	*/
286	ct_extended_entries();	286	ct_extended_entries();
287	return cnt;	287	return cnt;
288	}	288	}
289		289
290	int configure_via_default(uint8_t n)	290	int configure_via_default(uint8_t n)
291	{	291	{
292	/*	292	/*
293	* Not yet implemented.	293	* Not yet implemented.
294	*/	294	*/
295	printf("%s: not supported\n", __FUNCTION__);	295	printf("%s: not supported\n", __FUNCTION__);
296	return 1;	296	return 1;
297	}	297	}
298		298
299		299
300	int ct_processor_entry(struct __processor_entry *pr)	300	int ct_processor_entry(struct __processor_entry *pr)
301	{	301	{
302	/*	302	/*
303	* Ignore processors which are not marked enabled.	303	* Ignore processors which are not marked enabled.
304	*/	304	*/
305	if ((pr->cpu_flags & (1<<0)) == 0)	305	if ((pr->cpu_flags & (1<<0)) == 0)
306	return 0;	306	return 0;
307		307
308	apic_id_mask \|= (1<<pr->l_apic_id);	308	apic_id_mask \|= (1<<pr->l_apic_id);
309	return 1;	309	return 1;
310	}	310	}
311		311
312	void ct_bus_entry(struct __bus_entry *bus)	312	void ct_bus_entry(struct __bus_entry *bus)
313	{	313	{
314	#ifdef MPSCT_VERBOSE	314	#ifdef MPSCT_VERBOSE
315	char buf[7];	315	char buf[7];
316	memcpy((void ) buf, (void ) bus->bus_type, 6);	316	memcpy((void ) buf, (void ) bus->bus_type, 6);
317	buf[6] = 0;	317	buf[6] = 0;
318	printf("bus%d: %s\n", bus->bus_id, buf);	318	printf("bus%d: %s\n", bus->bus_id, buf);
319	#endif	319	#endif
320	}	320	}
321		321
322	void ct_io_apic_entry(struct __io_apic_entry *ioa)	322	void ct_io_apic_entry(struct __io_apic_entry *ioa)
323	{	323	{
324	static int io_apic_count = 0;	324	static int io_apic_count = 0;
325		325
326	/* this ioapic is marked unusable */	326	/* this ioapic is marked unusable */
327	if ((ioa->io_apic_flags & 1) == 0)	327	if ((ioa->io_apic_flags & 1) == 0)
328	return;	328	return;
329		329
330	if (io_apic_count++ > 0) {	330	if (io_apic_count++ > 0) {
331	/*	331	/*
332	* Multiple IO APIC's are currently not supported.	332	* Multiple IO APIC's are currently not supported.
333	*/	333	*/
334	return;	334	return;
335	}	335	}
336		336
337	io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;	337	io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
338	}	338	}
339		339
340	//#define MPSCT_VERBOSE	340	//#define MPSCT_VERBOSE
341	void ct_io_intr_entry(struct __io_intr_entry *iointr)	341	void ct_io_intr_entry(struct __io_intr_entry *iointr)
342	{	342	{
343	#ifdef MPSCT_VERBOSE	343	#ifdef MPSCT_VERBOSE
344	switch (iointr->intr_type) {	344	switch (iointr->intr_type) {
345	case 0: printf("INT"); break;	345	case 0: printf("INT"); break;
346	case 1: printf("NMI"); break;	346	case 1: printf("NMI"); break;
347	case 2: printf("SMI"); break;	347	case 2: printf("SMI"); break;
348	case 3: printf("ExtINT"); break;	348	case 3: printf("ExtINT"); break;
349	}	349	}
350	putchar(',');	350	putchar(',');
351	switch (iointr->poel&3) {	351	switch (iointr->poel&3) {
352	case 0: printf("bus-like"); break;	352	case 0: printf("bus-like"); break;
353	case 1: printf("active high"); break;	353	case 1: printf("active high"); break;
354	case 2: printf("reserved"); break;	354	case 2: printf("reserved"); break;
355	case 3: printf("active low"); break;	355	case 3: printf("active low"); break;
356	}	356	}
357	putchar(',');	357	putchar(',');
358	switch ((iointr->poel>>2)&3) {	358	switch ((iointr->poel>>2)&3) {
359	case 0: printf("bus-like"); break;	359	case 0: printf("bus-like"); break;
360	case 1: printf("edge-triggered"); break;	360	case 1: printf("edge-triggered"); break;
361	case 2: printf("reserved"); break;	361	case 2: printf("reserved"); break;
362	case 3: printf("level-triggered"); break;	362	case 3: printf("level-triggered"); break;
363	}	363	}
364	putchar(',');	364	putchar(',');
365	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	365	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
366	putchar(',');	366	putchar(',');
367	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);	367	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
368	putchar('\n');	368	putchar('\n');
369	#endif	369	#endif
370	}	370	}
371		371
372	void ct_l_intr_entry(struct __l_intr_entry *lintr)	372	void ct_l_intr_entry(struct __l_intr_entry *lintr)
373	{	373	{
374	#ifdef MPSCT_VERBOSE	374	#ifdef MPSCT_VERBOSE
375	switch (lintr->intr_type) {	375	switch (lintr->intr_type) {
376	case 0: printf("INT"); break;	376	case 0: printf("INT"); break;
377	case 1: printf("NMI"); break;	377	case 1: printf("NMI"); break;
378	case 2: printf("SMI"); break;	378	case 2: printf("SMI"); break;
379	case 3: printf("ExtINT"); break;	379	case 3: printf("ExtINT"); break;
380	}	380	}
381	putchar(',');	381	putchar(',');
382	switch (lintr->poel&3) {	382	switch (lintr->poel&3) {
383	case 0: printf("bus-like"); break;	383	case 0: printf("bus-like"); break;
384	case 1: printf("active high"); break;	384	case 1: printf("active high"); break;
385	case 2: printf("reserved"); break;	385	case 2: printf("reserved"); break;
386	case 3: printf("active low"); break;	386	case 3: printf("active low"); break;
387	}	387	}
388	putchar(',');	388	putchar(',');
389	switch ((lintr->poel>>2)&3) {	389	switch ((lintr->poel>>2)&3) {
390	case 0: printf("bus-like"); break;	390	case 0: printf("bus-like"); break;
391	case 1: printf("edge-triggered"); break;	391	case 1: printf("edge-triggered"); break;
392	case 2: printf("reserved"); break;	392	case 2: printf("reserved"); break;
393	case 3: printf("level-triggered"); break;	393	case 3: printf("level-triggered"); break;
394	}	394	}
395	putchar(',');	395	putchar(',');
396	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	396	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
397	putchar(',');	397	putchar(',');
398	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	398	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
399	putchar('\n');	399	putchar('\n');
400	#endif	400	#endif
401	}	401	}
402		402
403	void ct_extended_entries(void)	403	void ct_extended_entries(void)
404	{	404	{
405	uint8_t ext = (uint8_t ) ct + ct->base_table_length;	405	uint8_t ext = (uint8_t ) ct + ct->base_table_length;
406	uint8_t *cur;	406	uint8_t *cur;
407		407
408	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {	408	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
409	switch (cur[CT_EXT_ENTRY_TYPE]) {	409	switch (cur[CT_EXT_ENTRY_TYPE]) {
410	default:	410	default:
411	printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);	411	printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
412	break;	412	break;
413	}	413	}
414	}	414	}
415	}	415	}
416		416
417	int mps_irq_to_pin(int irq)	417	int mps_irq_to_pin(int irq)
418	{	418	{
419	int i;	419	int i;
420		420
421	for(i=0;i<io_intr_entry_cnt;i++) {	421	for(i=0;i<io_intr_entry_cnt;i++) {
422	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)	422	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
423	return io_intr_entries[i].dst_io_apic_pin;	423	return io_intr_entries[i].dst_io_apic_pin;
424	}	424	}
425		425
426	return -1;	426	return -1;
427	}	427	}
428		428
429	#endif /* CONFIG_SMP */	429	#endif /* CONFIG_SMP */
430		430
431	/** @}	431	/** @}
432	*/	432	*/
433		433

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(root)/trunk/kernel/arch/ia32/src/smp/mps.c – Rev 1901 → 2071