WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia32/include/mm/page.h


/*
 * Copyright (c) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia32mm 
 * @{
 */
/** @file
 */
 
#ifndef KERN_ia32_PAGE_H_
#define KERN_ia32_PAGE_H_
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH  FRAME_WIDTH
#define PAGE_SIZE   FRAME_SIZE
 
#define PAGE_COLOR_BITS 0           /* dummy */
 
#ifdef KERNEL
 
#ifndef __ASM__
#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
#   define KA2PA(x) ((x) - 0x80000000)
#   define PA2KA(x) ((x) + 0x80000000)
#endif
 
/*
 * Implementation of generic 4-level page table interface.
 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
 */
 
/* Number of entries in each level. */
#define PTL0_ENTRIES_ARCH   1024
#define PTL1_ENTRIES_ARCH   0
#define PTL2_ENTRIES_ARCH   0
#define PTL3_ENTRIES_ARCH   1024
 
/* Page table sizes for each level. */
#define PTL0_SIZE_ARCH      ONE_FRAME
#define PTL1_SIZE_ARCH      0
#define PTL2_SIZE_ARCH      0
#define PTL3_SIZE_ARCH      ONE_FRAME
 
/* Macros calculating indices for each level. */
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr)  0
#define PTL2_INDEX_ARCH(vaddr)  0
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
 
/* Get PTE address accessors for each level. */
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
    ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
    (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
    (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
    ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12))
 
/* Set PTE address accessors for each level. */
#define SET_PTL0_ADDRESS_ARCH(ptl0) \
    (write_cr3((uintptr_t) (ptl0)))
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
    (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
    (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12)
 
/* Get PTE flags accessors for each level. */
#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
    get_pt_flags((pte_t *) (ptl0), (index_t) (i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
    PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
    PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
    get_pt_flags((pte_t *) (ptl3), (index_t) (i))
 
/* Set PTE flags accessors for each level. */
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
    set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
    set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
 
/* Macros for querying the last level entries. */
#define PTE_VALID_ARCH(p) \
    (*((uint32_t *) (p)) != 0)
#define PTE_PRESENT_ARCH(p) \
    ((p)->present != 0)
#define PTE_GET_FRAME_ARCH(p) \
    ((p)->frame_address << FRAME_WIDTH)
#define PTE_WRITABLE_ARCH(p) \
    ((p)->writeable != 0)
#define PTE_EXECUTABLE_ARCH(p)          1
 
#ifndef __ASM__
 
#include <mm/mm.h>
#include <arch/interrupt.h>
#include <arch/types.h>
#include <typedefs.h>
 
/* Page fault error codes. */
 
/** When bit on this position is 0, the page fault was caused by a not-present
 * page.
 */
#define PFERR_CODE_P        (1 << 0)
 
/** When bit on this position is 1, the page fault was caused by a write. */
#define PFERR_CODE_RW       (1 << 1)
 
/** When bit on this position is 1, the page fault was caused in user mode. */
#define PFERR_CODE_US       (1 << 2)
 
/** When bit on this position is 1, a reserved bit was set in page directory. */
#define PFERR_CODE_RSVD     (1 << 3)    
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
    pte_t *p = &pt[i];
   
    return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT |
        (!p->present) << PAGE_PRESENT_SHIFT |
        p->uaccessible << PAGE_USER_SHIFT |
        1 << PAGE_READ_SHIFT |
        p->writeable << PAGE_WRITE_SHIFT |
        1 << PAGE_EXEC_SHIFT |
        p->global << PAGE_GLOBAL_SHIFT);
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
    pte_t *p = &pt[i];
   
    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
    p->present = !(flags & PAGE_NOT_PRESENT);
    p->uaccessible = (flags & PAGE_USER) != 0;
    p->writeable = (flags & PAGE_WRITE) != 0;
    p->global = (flags & PAGE_GLOBAL) != 0;
   
    /*
     * Ensure that there is at least one bit set even if the present bit is
     * cleared.
     */
    p->soft_valid = true;
}
 
extern void page_arch_init(void);
extern void page_fault(int n, istate_t *istate);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia32/include/mm/page.h – Rev 2467 → 3071

Rev 2467		Rev 3071
1	/*	1	/*
2	* Copyright (c) 2001-2004 Jakub Jermar	2	* Copyright (c) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32mm	29	/** @addtogroup ia32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_ia32_PAGE_H_	35	#ifndef KERN_ia32_PAGE_H_
36	#define KERN_ia32_PAGE_H_	36	#define KERN_ia32_PAGE_H_
37		37
38	#include <arch/mm/frame.h>	38	#include <arch/mm/frame.h>
39		39
40	#define PAGE_WIDTH FRAME_WIDTH	40	#define PAGE_WIDTH FRAME_WIDTH
41	#define PAGE_SIZE FRAME_SIZE	41	#define PAGE_SIZE FRAME_SIZE
42		42
43	#define PAGE_COLOR_BITS 0 /* dummy */	43	#define PAGE_COLOR_BITS 0 /* dummy */
44		44
45	#ifdef KERNEL	45	#ifdef KERNEL
46		46
47	#ifndef __ASM__	47	#ifndef __ASM__
48	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)	48	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
49	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)	49	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
50	#else	50	#else
51	# define KA2PA(x) ((x) - 0x80000000)	51	# define KA2PA(x) ((x) - 0x80000000)
52	# define PA2KA(x) ((x) + 0x80000000)	52	# define PA2KA(x) ((x) + 0x80000000)
53	#endif	53	#endif
54		54
55	/*	55	/*
56	* Implementation of generic 4-level page table interface.	56	* Implementation of generic 4-level page table interface.
57	* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.	57	* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
58	*/	58	*/
59		59
60	/* Number of entries in each level. */	60	/* Number of entries in each level. */
61	#define PTL0_ENTRIES_ARCH 1024	61	#define PTL0_ENTRIES_ARCH 1024
62	#define PTL1_ENTRIES_ARCH 0	62	#define PTL1_ENTRIES_ARCH 0
63	#define PTL2_ENTRIES_ARCH 0	63	#define PTL2_ENTRIES_ARCH 0
64	#define PTL3_ENTRIES_ARCH 1024	64	#define PTL3_ENTRIES_ARCH 1024
65		65
66	/* Page table sizes for each level. */	66	/* Page table sizes for each level. */
67	#define PTL0_SIZE_ARCH ONE_FRAME	67	#define PTL0_SIZE_ARCH ONE_FRAME
68	#define PTL1_SIZE_ARCH 0	68	#define PTL1_SIZE_ARCH 0
69	#define PTL2_SIZE_ARCH 0	69	#define PTL2_SIZE_ARCH 0
70	#define PTL3_SIZE_ARCH ONE_FRAME	70	#define PTL3_SIZE_ARCH ONE_FRAME
71		71
72	/* Macros calculating indices for each level. */	72	/* Macros calculating indices for each level. */
73	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)	73	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
74	#define PTL1_INDEX_ARCH(vaddr) 0	74	#define PTL1_INDEX_ARCH(vaddr) 0
75	#define PTL2_INDEX_ARCH(vaddr) 0	75	#define PTL2_INDEX_ARCH(vaddr) 0
76	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)	76	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
77		77
78	/* Get PTE address accessors for each level. */	78	/* Get PTE address accessors for each level. */
79	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \	79	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
80	((pte_t ) ((((pte_t ) (ptl0))[(i)].frame_address) << 12))	80	((pte_t ) ((((pte_t ) (ptl0))[(i)].frame_address) << 12))
81	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \	81	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
82	(ptl1)	82	(ptl1)
83	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \	83	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
84	(ptl2)	84	(ptl2)
85	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \	85	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
86	((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12))	86	((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12))
87		87
88	/* Set PTE address accessors for each level. */	88	/* Set PTE address accessors for each level. */
89	#define SET_PTL0_ADDRESS_ARCH(ptl0) \	89	#define SET_PTL0_ADDRESS_ARCH(ptl0) \
90	(write_cr3((uintptr_t) (ptl0)))	90	(write_cr3((uintptr_t) (ptl0)))
91	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \	91	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
92	(((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12)	92	(((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12)
93	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)	93	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
94	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)	94	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
95	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \	95	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
96	(((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12)	96	(((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12)
97		97
98	/* Get PTE flags accessors for each level. */	98	/* Get PTE flags accessors for each level. */
99	#define GET_PTL1_FLAGS_ARCH(ptl0, i) \	99	#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
100	get_pt_flags((pte_t *) (ptl0), (index_t) (i))	100	get_pt_flags((pte_t *) (ptl0), (index_t) (i))
101	#define GET_PTL2_FLAGS_ARCH(ptl1, i) \	101	#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
102	PAGE_PRESENT	102	PAGE_PRESENT
103	#define GET_PTL3_FLAGS_ARCH(ptl2, i) \	103	#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
104	PAGE_PRESENT	104	PAGE_PRESENT
105	#define GET_FRAME_FLAGS_ARCH(ptl3, i) \	105	#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
106	get_pt_flags((pte_t *) (ptl3), (index_t) (i))	106	get_pt_flags((pte_t *) (ptl3), (index_t) (i))
107		107
108	/* Set PTE flags accessors for each level. */	108	/* Set PTE flags accessors for each level. */
109	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \	109	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
110	set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))	110	set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
111	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)	111	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
112	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)	112	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
113	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \	113	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
114	set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))	114	set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
115		115
116	/* Macros for querying the last level entries. */	116	/* Macros for querying the last level entries. */
117	#define PTE_VALID_ARCH(p) \	117	#define PTE_VALID_ARCH(p) \
118	(((uint32_t ) (p)) != 0)	118	(((uint32_t ) (p)) != 0)
119	#define PTE_PRESENT_ARCH(p) \	119	#define PTE_PRESENT_ARCH(p) \
120	((p)->present != 0)	120	((p)->present != 0)
121	#define PTE_GET_FRAME_ARCH(p) \	121	#define PTE_GET_FRAME_ARCH(p) \
122	((p)->frame_address << FRAME_WIDTH)	122	((p)->frame_address << FRAME_WIDTH)
123	#define PTE_WRITABLE_ARCH(p) \	123	#define PTE_WRITABLE_ARCH(p) \
124	((p)->writeable != 0)	124	((p)->writeable != 0)
125	#define PTE_EXECUTABLE_ARCH(p) 1	125	#define PTE_EXECUTABLE_ARCH(p) 1
126		126
127	#ifndef __ASM__	127	#ifndef __ASM__
128		128
129	#include <mm/mm.h>	129	#include <mm/mm.h>
130	#include <arch/interrupt.h>	130	#include <arch/interrupt.h>
-		131	#include <arch/types.h>
-		132	#include <typedefs.h>
131		133
132	/* Page fault error codes. */	134	/* Page fault error codes. */
133		135
134	/** When bit on this position is 0, the page fault was caused by a not-present	136	/** When bit on this position is 0, the page fault was caused by a not-present
135	* page.	137	* page.
136	*/	138	*/
137	#define PFERR_CODE_P (1 << 0)	139	#define PFERR_CODE_P (1 << 0)
138		140
139	/** When bit on this position is 1, the page fault was caused by a write. */	141	/** When bit on this position is 1, the page fault was caused by a write. */
140	#define PFERR_CODE_RW (1 << 1)	142	#define PFERR_CODE_RW (1 << 1)
141		143
142	/** When bit on this position is 1, the page fault was caused in user mode. */	144	/** When bit on this position is 1, the page fault was caused in user mode. */
143	#define PFERR_CODE_US (1 << 2)	145	#define PFERR_CODE_US (1 << 2)
144		146
145	/** When bit on this position is 1, a reserved bit was set in page directory. */	147	/** When bit on this position is 1, a reserved bit was set in page directory. */
146	#define PFERR_CODE_RSVD (1 << 3)	148	#define PFERR_CODE_RSVD (1 << 3)
147		149
148	static inline int get_pt_flags(pte_t *pt, index_t i)	150	static inline int get_pt_flags(pte_t *pt, index_t i)
149	{	151	{
150	pte_t *p = &pt[i];	152	pte_t *p = &pt[i];
151		153
152	return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT \|	154	return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT \|
153	(!p->present) << PAGE_PRESENT_SHIFT \|	155	(!p->present) << PAGE_PRESENT_SHIFT \|
154	p->uaccessible << PAGE_USER_SHIFT \|	156	p->uaccessible << PAGE_USER_SHIFT \|
155	1 << PAGE_READ_SHIFT \|	157	1 << PAGE_READ_SHIFT \|
156	p->writeable << PAGE_WRITE_SHIFT \|	158	p->writeable << PAGE_WRITE_SHIFT \|
157	1 << PAGE_EXEC_SHIFT \|	159	1 << PAGE_EXEC_SHIFT \|
158	p->global << PAGE_GLOBAL_SHIFT);	160	p->global << PAGE_GLOBAL_SHIFT);
159	}	161	}
160		162
161	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)	163	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
162	{	164	{
163	pte_t *p = &pt[i];	165	pte_t *p = &pt[i];
164		166
165	p->page_cache_disable = !(flags & PAGE_CACHEABLE);	167	p->page_cache_disable = !(flags & PAGE_CACHEABLE);
166	p->present = !(flags & PAGE_NOT_PRESENT);	168	p->present = !(flags & PAGE_NOT_PRESENT);
167	p->uaccessible = (flags & PAGE_USER) != 0;	169	p->uaccessible = (flags & PAGE_USER) != 0;
168	p->writeable = (flags & PAGE_WRITE) != 0;	170	p->writeable = (flags & PAGE_WRITE) != 0;
169	p->global = (flags & PAGE_GLOBAL) != 0;	171	p->global = (flags & PAGE_GLOBAL) != 0;
170		172
171	/*	173	/*
172	* Ensure that there is at least one bit set even if the present bit is	174	* Ensure that there is at least one bit set even if the present bit is
173	* cleared.	175	* cleared.
174	*/	176	*/
175	p->soft_valid = true;	177	p->soft_valid = true;
176	}	178	}
177		179
178	extern void page_arch_init(void);	180	extern void page_arch_init(void);
179	extern void page_fault(int n, istate_t *istate);	181	extern void page_fault(int n, istate_t *istate);
180		182
181	#endif /* __ASM__ */	183	#endif /* __ASM__ */
182		184
183	#endif /* KERNEL */	185	#endif /* KERNEL */
184		186
185	#endif	187	#endif
186		188
187	/** @}	189	/** @}
188	*/	190	*/
189		191