WebSVN – HelenOS – Diff – /trunk/kernel/arch/amd64/src/amd64.c


/*
 * Copyright (c) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64
 * @{
 */
/** @file
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <proc/thread.h>
#include <arch/drivers/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/kbd/i8042.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
#endif
 
#include <arch/bios/bios.h>
#include <arch/mm/memory_init.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
#include <ddi/device.h>
 
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm (
        "pushfq\n"
        "pop %%rax\n"
        "and $~(0x7000), %%rax\n"
        "pushq %%rax\n"
        "popfq\n"
        :
        :
        : "%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm (
        "mov %%cr0, %%rax\n"
        "and $~(0x40000), %%rax\n"
        "mov %%rax, %%cr0\n"
        :
        :
        : "%rax"
    );
}
 
void arch_pre_mm_init(void)
{
    /* Enable no-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
   
    /* Disable I/O on nonprivileged levels
     * clear the NT (nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
    if (config.cpu_active == 1) {
        interrupt_init();
        bios_init();
       
        /* PIC */
        i8259_init();
    }
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        /* Initialize IRQ routing */
        irq_init(IRQ_COUNT, IRQ_COUNT);
       
        /* hard clock */
        i8254_init();
               
#ifdef CONFIG_FB
        if (vesa_present())
            vesa_init();
        else
#endif
            ega_init(); /* video */
       
        /* Enable debugger */
        debugger_init();
        /* Merge all memory zones to 1 big zone */
        zone_merge_all();
    }
   
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
}
 
void arch_post_cpu_init()
{
#ifdef CONFIG_SMP
    if (config.cpu_active > 1) {
        l_apic_init();
        l_apic_debug();
    }
#endif
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
 
 
#ifdef CONFIG_SMP
        acpi_init();
#endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
    /* keyboard controller */
    i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    if (config.cpu_active == 1) {
        /*
         * This has to be done only on UP.
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
         */
        i8254_normal_operation();
    }
}
 
/** Set thread-local-storage pointer
 *
 * TLS pointer is set in FS register. Unfortunately the 64-bit
 * part can be set only in CPL0 mode.
 *
 * The specs say, that on %fs:0 there is stored contents of %fs register,
 * we need not to go to CPL0 to read it.
 */
unative_t sys_tls_set(unative_t addr)
{
    THREAD->arch.tls = addr;
    write_msr(AMD_MSR_FS, addr);
    return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
    i8042_grab();
}
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
    i8042_release();
}
 
/** @}
 */
 

Rev 2697	Rev 2723
1	/*	1	/*
2	* Copyright (c) 2005 Ondrej Palkovsky	2	* Copyright (c) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64	29	/** @addtogroup amd64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36		36
37	#include <arch/types.h>	37	#include <arch/types.h>
38		38
39	#include <config.h>	39	#include <config.h>
40		40
41	#include <proc/thread.h>	41	#include <proc/thread.h>
42	#include <arch/drivers/ega.h>	42	#include <arch/drivers/ega.h>
43	#include <arch/drivers/vesa.h>	43	#include <arch/drivers/vesa.h>
44	#include <genarch/kbd/i8042.h>	44	#include <genarch/kbd/i8042.h>
45	#include <arch/drivers/i8254.h>	45	#include <arch/drivers/i8254.h>
46	#include <arch/drivers/i8259.h>	46	#include <arch/drivers/i8259.h>
47		47
48	#ifdef CONFIG_SMP	48	#ifdef CONFIG_SMP
49	#include <arch/smp/apic.h>	49	#include <arch/smp/apic.h>
50	#endif	50	#endif
51		51
52	#include <arch/bios/bios.h>	52	#include <arch/bios/bios.h>
53	#include <arch/mm/memory_init.h>	53	#include <arch/mm/memory_init.h>
54	#include <arch/cpu.h>	54	#include <arch/cpu.h>
55	#include <print.h>	55	#include <print.h>
56	#include <arch/cpuid.h>	56	#include <arch/cpuid.h>
57	#include <genarch/acpi/acpi.h>	57	#include <genarch/acpi/acpi.h>
58	#include <panic.h>	58	#include <panic.h>
59	#include <interrupt.h>	59	#include <interrupt.h>
60	#include <arch/syscall.h>	60	#include <arch/syscall.h>
61	#include <arch/debugger.h>	61	#include <arch/debugger.h>
62	#include <syscall/syscall.h>	62	#include <syscall/syscall.h>
63	#include <console/console.h>	63	#include <console/console.h>
64	#include <ddi/irq.h>	64	#include <ddi/irq.h>
65	#include <ddi/device.h>	65	#include <ddi/device.h>
66		66
67		67
68	/** Disable I/O on non-privileged levels	68	/** Disable I/O on non-privileged levels
69	*	69	*
70	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	70	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
71	*/	71	*/
72	static void clean_IOPL_NT_flags(void)	72	static void clean_IOPL_NT_flags(void)
73	{	73	{
74	asm (	74	asm (
75	"pushfq\n"	75	"pushfq\n"
76	"pop %%rax\n"	76	"pop %%rax\n"
77	"and $~(0x7000), %%rax\n"	77	"and $~(0x7000), %%rax\n"
78	"pushq %%rax\n"	78	"pushq %%rax\n"
79	"popfq\n"	79	"popfq\n"
80	:	80	:
81	:	81	:
82	: "%rax"	82	: "%rax"
83	);	83	);
84	}	84	}
85		85
86	/** Disable alignment check	86	/** Disable alignment check
87	*	87	*
88	* Clean AM(18) flag in CR0 register	88	* Clean AM(18) flag in CR0 register
89	*/	89	*/
90	static void clean_AM_flag(void)	90	static void clean_AM_flag(void)
91	{	91	{
92	asm (	92	asm (
93	"mov %%cr0, %%rax\n"	93	"mov %%cr0, %%rax\n"
94	"and $~(0x40000), %%rax\n"	94	"and $~(0x40000), %%rax\n"
95	"mov %%rax, %%cr0\n"	95	"mov %%rax, %%cr0\n"
96	:	96	:
97	:	97	:
98	: "%rax"	98	: "%rax"
99	);	99	);
100	}	100	}
101		101
102	void arch_pre_mm_init(void)	102	void arch_pre_mm_init(void)
103	{	103	{
104	/* Enable no-execute pages */	104	/* Enable no-execute pages */
105	set_efer_flag(AMD_NXE_FLAG);	105	set_efer_flag(AMD_NXE_FLAG);
106	/* Enable FPU */	106	/* Enable FPU */
107	cpu_setup_fpu();	107	cpu_setup_fpu();
108		108
109	/* Initialize segmentation */	109	/* Initialize segmentation */
110	pm_init();	110	pm_init();
111		111
112	/* Disable I/O on nonprivileged levels	112	/* Disable I/O on nonprivileged levels
113	* clear the NT (nested-thread) flag	113	* clear the NT (nested-thread) flag
114	*/	114	*/
115	clean_IOPL_NT_flags();	115	clean_IOPL_NT_flags();
116	/* Disable alignment check */	116	/* Disable alignment check */
117	clean_AM_flag();	117	clean_AM_flag();
118		118
119	if (config.cpu_active == 1) {	119	if (config.cpu_active == 1) {
120	interrupt_init();	120	interrupt_init();
121	bios_init();	121	bios_init();
122		122
123	/* PIC */	123	/* PIC */
124	i8259_init();	124	i8259_init();
125	}	125	}
126	}	126	}
127		127
128		128
129	void arch_post_mm_init(void)	129	void arch_post_mm_init(void)
130	{	130	{
131	if (config.cpu_active == 1) {	131	if (config.cpu_active == 1) {
132	/* Initialize IRQ routing */	132	/* Initialize IRQ routing */
133	irq_init(IRQ_COUNT, IRQ_COUNT);	133	irq_init(IRQ_COUNT, IRQ_COUNT);
134		134
135	/* hard clock */	135	/* hard clock */
136	i8254_init();	136	i8254_init();
137		137
138	#ifdef CONFIG_FB	138	#ifdef CONFIG_FB
139	if (vesa_present())	139	if (vesa_present())
140	vesa_init();	140	vesa_init();
141	else	141	else
142	#endif	142	#endif
143	ega_init(); /* video */	143	ega_init(); /* video */
144		144
145	/* Enable debugger */	145	/* Enable debugger */
146	debugger_init();	146	debugger_init();
147	/* Merge all memory zones to 1 big zone */	147	/* Merge all memory zones to 1 big zone */
148	zone_merge_all();	148	zone_merge_all();
149	}	149	}
150		150
151	/* Setup fast SYSCALL/SYSRET */	151	/* Setup fast SYSCALL/SYSRET */
152	syscall_setup_cpu();	152	syscall_setup_cpu();
153	}	153	}
154		154
155	void arch_post_cpu_init()	155	void arch_post_cpu_init()
156	{	156	{
157	#ifdef CONFIG_SMP	157	#ifdef CONFIG_SMP
158	if (config.cpu_active > 1) {	158	if (config.cpu_active > 1) {
159	l_apic_init();	159	l_apic_init();
160	l_apic_debug();	160	l_apic_debug();
161	}	161	}
162	#endif	162	#endif
163	}	163	}
164		164
165	void arch_pre_smp_init(void)	165	void arch_pre_smp_init(void)
166	{	166	{
167	if (config.cpu_active == 1) {	167	if (config.cpu_active == 1) {
168	memory_print_map();	-
169		-
170	#ifdef CONFIG_SMP	168	#ifdef CONFIG_SMP
171	acpi_init();	169	acpi_init();
172	#endif /* CONFIG_SMP */	170	#endif /* CONFIG_SMP */
173	}	171	}
174	}	172	}
175		173
176	void arch_post_smp_init(void)	174	void arch_post_smp_init(void)
177	{	175	{
178	/* keyboard controller */	176	/* keyboard controller */
179	i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);	177	i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);
180	}	178	}
181		179
182	void calibrate_delay_loop(void)	180	void calibrate_delay_loop(void)
183	{	181	{
184	i8254_calibrate_delay_loop();	182	i8254_calibrate_delay_loop();
185	if (config.cpu_active == 1) {	183	if (config.cpu_active == 1) {
186	/*	184	/*
187	* This has to be done only on UP.	185	* This has to be done only on UP.
188	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.	186	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
189	*/	187	*/
190	i8254_normal_operation();	188	i8254_normal_operation();
191	}	189	}
192	}	190	}
193		191
194	/** Set thread-local-storage pointer	192	/** Set thread-local-storage pointer
195	*	193	*
196	* TLS pointer is set in FS register. Unfortunately the 64-bit	194	* TLS pointer is set in FS register. Unfortunately the 64-bit
197	* part can be set only in CPL0 mode.	195	* part can be set only in CPL0 mode.
198	*	196	*
199	* The specs say, that on %fs:0 there is stored contents of %fs register,	197	* The specs say, that on %fs:0 there is stored contents of %fs register,
200	* we need not to go to CPL0 to read it.	198	* we need not to go to CPL0 to read it.
201	*/	199	*/
202	unative_t sys_tls_set(unative_t addr)	200	unative_t sys_tls_set(unative_t addr)
203	{	201	{
204	THREAD->arch.tls = addr;	202	THREAD->arch.tls = addr;
205	write_msr(AMD_MSR_FS, addr);	203	write_msr(AMD_MSR_FS, addr);
206	return 0;	204	return 0;
207	}	205	}
208		206
209	/** Acquire console back for kernel	207	/** Acquire console back for kernel
210	*	208	*
211	*/	209	*/
212	void arch_grab_console(void)	210	void arch_grab_console(void)
213	{	211	{
214	i8042_grab();	212	i8042_grab();
215	}	213	}
216	/** Return console to userspace	214	/** Return console to userspace
217	*	215	*
218	*/	216	*/
219	void arch_release_console(void)	217	void arch_release_console(void)
220	{	218	{
221	i8042_release();	219	i8042_release();
222	}	220	}
223		221
224	/** @}	222	/** @}
225	*/	223	*/
226		224

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(root)/trunk/kernel/arch/amd64/src/amd64.c – Rev 2697 → 2723