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Line 67... Line 67...
67
        return x - 0xffffffff80000000;
67
        return x - 0xffffffff80000000;
68
    else
68
    else
69
        return x - 0xffff800000000000;
69
        return x - 0xffff800000000000;
70
}
70
}
71
 
71
 
72
#   define KA2PA(x)      ka2pa((uintptr_t)x)
72
#   define KA2PA(x)     ka2pa((uintptr_t) x)
73
#   define PA2KA_CODE(x)      (((uintptr_t) (x)) + 0xffffffff80000000)
73
#   define PA2KA_CODE(x)    (((uintptr_t) (x)) + 0xffffffff80000000)
74
#   define PA2KA(x)      (((uintptr_t) (x)) + 0xffff800000000000)
74
#   define PA2KA(x)     (((uintptr_t) (x)) + 0xffff800000000000)
75
#else
75
#else
76
#   define KA2PA(x)      ((x) - 0xffffffff80000000)
76
#   define KA2PA(x)     ((x) - 0xffffffff80000000)
77
#   define PA2KA(x)      ((x) + 0xffffffff80000000)
77
#   define PA2KA(x)     ((x) + 0xffffffff80000000)
78
#endif
78
#endif
79
 
79
 
-
 
80
/* Number of entries in each level. */
80
#define PTL0_ENTRIES_ARCH   512
81
#define PTL0_ENTRIES_ARCH   512
81
#define PTL1_ENTRIES_ARCH   512
82
#define PTL1_ENTRIES_ARCH   512
82
#define PTL2_ENTRIES_ARCH   512
83
#define PTL2_ENTRIES_ARCH   512
83
#define PTL3_ENTRIES_ARCH   512
84
#define PTL3_ENTRIES_ARCH   512
84
 
85
 
-
 
86
/* Page table sizes for each level. */
85
#define PTL0_SIZE_ARCH       ONE_FRAME
87
#define PTL0_SIZE_ARCH      ONE_FRAME
86
#define PTL1_SIZE_ARCH       ONE_FRAME
88
#define PTL1_SIZE_ARCH      ONE_FRAME
87
#define PTL2_SIZE_ARCH       ONE_FRAME
89
#define PTL2_SIZE_ARCH      ONE_FRAME
88
#define PTL3_SIZE_ARCH       ONE_FRAME
90
#define PTL3_SIZE_ARCH      ONE_FRAME
89
 
91
 
-
 
92
/* Macros calculating indices into page tables in each level. */
90
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr)>>39)&0x1ff)
93
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 39) & 0x1ff)
91
#define PTL1_INDEX_ARCH(vaddr)  (((vaddr)>>30)&0x1ff)
94
#define PTL1_INDEX_ARCH(vaddr)  (((vaddr) >> 30) & 0x1ff)
92
#define PTL2_INDEX_ARCH(vaddr)  (((vaddr)>>21)&0x1ff)
95
#define PTL2_INDEX_ARCH(vaddr)  (((vaddr) >> 21) & 0x1ff)
93
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>12)&0x1ff)
96
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x1ff)
94
 
97
 
-
 
98
/* Get PTE address accessors for each level. */
-
 
99
#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
95
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl0))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl0))[(i)].addr_32_51)<<32 )))
100
    ((pte_t *) ((((uint64_t) ((pte_t *) (ptl0))[(i)].addr_12_31) << 12) | \
-
 
101
        (((uint64_t) ((pte_t *) (ptl0))[(i)].addr_32_51) << 32)))
-
 
102
#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
96
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl1))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl1))[(i)].addr_32_51)<<32 )))
103
    ((pte_t *) ((((uint64_t) ((pte_t *) (ptl1))[(i)].addr_12_31) << 12) | \
-
 
104
        (((uint64_t) ((pte_t *) (ptl1))[(i)].addr_32_51) << 32)))
-
 
105
#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
97
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      ((pte_t *) ((((uint64_t) ((pte_t *)(ptl2))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl2))[(i)].addr_32_51)<<32 )))
106
    ((pte_t *) ((((uint64_t) ((pte_t *) (ptl2))[(i)].addr_12_31) << 12) | \
-
 
107
        (((uint64_t) ((pte_t *) (ptl2))[(i)].addr_32_51) << 32)))
-
 
108
#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
-
 
109
    ((uintptr_t *) \
98
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t *) ((((uint64_t) ((pte_t *)(ptl3))[(i)].addr_12_31)<<12) | (((uint64_t) ((pte_t *)(ptl3))[(i)].addr_32_51)<<32 )))
110
        ((((uint64_t) ((pte_t *) (ptl3))[(i)].addr_12_31) << 12) | \
-
 
111
        (((uint64_t) ((pte_t *) (ptl3))[(i)].addr_32_51) << 32)))
99
 
112
 
-
 
113
/* Set PTE address accessors for each level. */
-
 
114
#define SET_PTL0_ADDRESS_ARCH(ptl0) \
-
 
115
    (write_cr3((uintptr_t) (ptl0)))
100
#define SET_PTL0_ADDRESS_ARCH(ptl0)     (write_cr3((uintptr_t) (ptl0)))
116
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
101
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   set_pt_addr((pte_t *)(ptl0), (index_t)(i), a)
117
    set_pt_addr((pte_t *) (ptl0), (index_t) (i), a)
-
 
118
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) \
102
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)       set_pt_addr((pte_t *)(ptl1), (index_t)(i), a)
119
    set_pt_addr((pte_t *) (ptl1), (index_t) (i), a)
-
 
120
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \
103
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)       set_pt_addr((pte_t *)(ptl2), (index_t)(i), a)
121
    set_pt_addr((pte_t *) (ptl2), (index_t) (i), a)
-
 
122
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
104
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  set_pt_addr((pte_t *)(ptl3), (index_t)(i), a)
123
    set_pt_addr((pte_t *) (ptl3), (index_t) (i), a)
105
 
124
 
-
 
125
/* Get PTE flags accessors for each level. */
-
 
126
#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
106
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
127
    get_pt_flags((pte_t *) (ptl0), (index_t) (i))
-
 
128
#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
107
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        get_pt_flags((pte_t *)(ptl1), (index_t)(i))
129
    get_pt_flags((pte_t *) (ptl1), (index_t) (i))
-
 
130
#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
108
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        get_pt_flags((pte_t *)(ptl2), (index_t)(i))
131
    get_pt_flags((pte_t *) (ptl2), (index_t) (i))
-
 
132
#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
109
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
133
    get_pt_flags((pte_t *) (ptl3), (index_t) (i))
110
 
134
 
-
 
135
/* Set PTE flags accessors for each level. */
-
 
136
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
111
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
137
    set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
-
 
138
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \
112
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)         set_pt_flags((pte_t *)(ptl1), (index_t)(i), (x))
139
    set_pt_flags((pte_t *) (ptl1), (index_t) (i), (x))
-
 
140
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \
113
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)         set_pt_flags((pte_t *)(ptl2), (index_t)(i), (x))
141
    set_pt_flags((pte_t *) (ptl2), (index_t) (i), (x))
-
 
142
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
114
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
143
    set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
115
 
144
 
-
 
145
/* Macros for querying the last-level PTE entries. */
-
 
146
#define PTE_VALID_ARCH(p) \
116
#define PTE_VALID_ARCH(p)           (*((uint64_t *) (p)) != 0)
147
    (*((uint64_t *) (p)) != 0)
117
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
148
#define PTE_PRESENT_ARCH(p) \
-
 
149
    ((p)->present != 0)
-
 
150
#define PTE_GET_FRAME_ARCH(p) \
118
#define PTE_GET_FRAME_ARCH(p)           ((((uintptr_t)(p)->addr_12_31)<<12) | ((uintptr_t)(p)->addr_32_51<<32))
151
    ((((uintptr_t) (p)->addr_12_31) << 12) | \
-
 
152
        ((uintptr_t) (p)->addr_32_51 << 32))
119
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
153
#define PTE_WRITABLE_ARCH(p) \
-
 
154
    ((p)->writeable != 0)
120
#define PTE_EXECUTABLE_ARCH(p)          ((p)->no_execute == 0)
155
#define PTE_EXECUTABLE_ARCH(p) \
-
 
156
    ((p)->no_execute == 0)
121
 
157
 
122
#ifndef __ASM__
158
#ifndef __ASM__
123
 
159
 
124
/* Page fault error codes. */
160
/* Page fault error codes. */
125
 
161
 
126
/** When bit on this position is 0, the page fault was caused by a not-present page. */
162
/** When bit on this position is 0, the page fault was caused by a not-present
-
 
163
 * page.
-
 
164
 */
127
#define PFERR_CODE_P            (1<<0)  
165
#define PFERR_CODE_P            (1 << 0)  
128
 
166
 
129
/** When bit on this position is 1, the page fault was caused by a write. */
167
/** When bit on this position is 1, the page fault was caused by a write. */
130
#define PFERR_CODE_RW           (1<<1)
168
#define PFERR_CODE_RW           (1 << 1)
131
 
169
 
132
/** When bit on this position is 1, the page fault was caused in user mode. */
170
/** When bit on this position is 1, the page fault was caused in user mode. */
133
#define PFERR_CODE_US           (1<<2)
171
#define PFERR_CODE_US           (1 << 2)
134
 
172
 
135
/** When bit on this position is 1, a reserved bit was set in page directory. */
173
/** When bit on this position is 1, a reserved bit was set in page directory. */
136
#define PFERR_CODE_RSVD         (1<<3)
174
#define PFERR_CODE_RSVD         (1 << 3)
137
 
175
 
138
/** When bit on this position os 1, the page fault was caused during instruction fecth. */
176
/** When bit on this position os 1, the page fault was caused during instruction
-
 
177
 * fecth.
-
 
178
 */
139
#define PFERR_CODE_ID       (1<<4)
179
#define PFERR_CODE_ID       (1 << 4)
140
 
180
 
141
static inline int get_pt_flags(pte_t *pt, index_t i)
181
static inline int get_pt_flags(pte_t *pt, index_t i)
142
{
182
{
143
    pte_t *p = &pt[i];
183
    pte_t *p = &pt[i];
144
   
184
   
145
    return (
-
 
146
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
185
    return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT |
147
        (!p->present)<<PAGE_PRESENT_SHIFT |
186
        (!p->present) << PAGE_PRESENT_SHIFT |
148
        p->uaccessible<<PAGE_USER_SHIFT |
187
        p->uaccessible << PAGE_USER_SHIFT |
149
        1<<PAGE_READ_SHIFT |
188
        1 << PAGE_READ_SHIFT |
150
        p->writeable<<PAGE_WRITE_SHIFT |
189
        p->writeable << PAGE_WRITE_SHIFT |
151
        (!p->no_execute)<<PAGE_EXEC_SHIFT |
190
        (!p->no_execute) << PAGE_EXEC_SHIFT |
152
        p->global<<PAGE_GLOBAL_SHIFT
191
        p->global << PAGE_GLOBAL_SHIFT);
153
    );
-
 
154
}
192
}
155
 
193
 
156
static inline void set_pt_addr(pte_t *pt, index_t i, uintptr_t a)
194
static inline void set_pt_addr(pte_t *pt, index_t i, uintptr_t a)
157
{
195
{
158
    pte_t *p = &pt[i];
196
    pte_t *p = &pt[i];