WebSVN – HelenOS – Diff – /trunk/boot/arch/ppc32/loader/asm.S


#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
 
.macro FLUSH_CACHE addr
	dcbst 0, \addr
	sync
	icbi 0, \addr
	isync
.endm
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r7 = real_mode (pa)
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	# disable interrupts
	
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set real_mode meeting point address
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			FLUSH_CACHE r30
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
			
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	# initially fill segment registers
	
	li r31, 0
	
	li r29, 8
	mtctr r29
	li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
	
	seg_fill_uspace:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_uspace
	
	li r29, 8
	mtctr r29
	lis r30, 0x4000               # priviledged access only
	ori r30, r30, 8               # ASID 0 (VSIDs 8 .. 15)
	
	seg_fill_kernel:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_kernel
	
	# invalidate block address translation registers
	
	li r30, 0
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create empty Page Hash Table
	# on top of memory, size 64 KB
	
	lwz r31, 0(r3)                # r31 = memory size
	
	lis r30, 65536@h
	ori r30, r30, 65536@l         # r30 = 65536
	
	subi r29, r30, 1              # r29 = 65535
	
	sub r31, r31, r30
	andc r31, r31, r29            # pht = ALIGN_DOWN(memory_size - 65536, 65536)
	
	mtsdr1 r31
	
	li r29, 2
	srw r30, r30, r29             # r30 = 16384
	li r29, 0
	
	pht_clear:
		
		# write zeroes
		
		stw r29, 0(r31)
		FLUSH_CACHE r31
		
		addi r31, r31, 4
		subi r30, r30, 4
		
		cmpwi r30, 0
		beq clear_end
		
		bdnz pht_clear
		
	clear_end:
	
#ifdef CONFIG_BAT
	
	# create BAT identity mapping
	
	lwz r31, 0(r3)                # r31 = memory size
	
	lis r29, 0x0002
	cmpw r31, r29
	blt no_bat                    # less than 128 KB -> no BAT
	
	li r29, 18
	srw r31, r31, r29             # r31 = total >> 18
	
	# create Block Length mask by replicating
	# the leading logical one 14 times
	
	li r29, 14
	mtctr r31
	li r29, 1
	
	bat_mask:
		srw r30, r31, r29         # r30 = mask >> 1
		or r31, r31, r30          # mask = mask | r30
		
		bdnz bat_mask
	
	andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
	
	li r29, 2
	slw r31, r31, r29             # mask = mask << 2
	ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
	
	lis r29, 0x8000
	or r29, r29, r31
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r29
	mtspr ibat0l, r30
	
	mtspr dbat0u, r29
	mtspr dbat0l, r30
	
	no_bat:
	
#endif
	
	tlbsync
	
	# start the kernel
	#
	# pc = KERNEL_START_ADDR
	# r3 = bootinfo (pa)
	# sprg0 = KA2PA(KERNEL_START_ADDR)
	# sprg3 = physical memory size
	# sp = 0 (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	subis r31, r31, 0x8000
	mtsprg0 r31
	
	lwz r31, 0(r3)
	mtsprg3 r31
	
	li sp, 0
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 3827	Rev 3855
1	#	1	#
2	# Copyright (c) 2006 Martin Decky	2	# Copyright (c) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31		31
-		32	.macro FLUSH_CACHE addr
-		33	dcbst 0, \addr
-		34	sync
-		35	icbi 0, \addr
-		36	isync
-		37	.endm
-		38
32	.text	39	.text
33		40
34	.global halt	41	.global halt
35	.global memcpy	42	.global memcpy
36	.global jump_to_kernel	43	.global jump_to_kernel
37		44
38	halt:	45	halt:
39	b halt	46	b halt
40		47
41	memcpy:	48	memcpy:
42	srwi. r7, r5, 3	49	srwi. r7, r5, 3
43	addi r6, r3, -4	50	addi r6, r3, -4
44	addi r4, r4, -4	51	addi r4, r4, -4
45	beq 2f	52	beq 2f
46		53
47	andi. r0, r6, 3	54	andi. r0, r6, 3
48	mtctr r7	55	mtctr r7
49	bne 5f	56	bne 5f
50		57
51	1:	58	1:
52		59
53	lwz r7, 4(r4)	60	lwz r7, 4(r4)
54	lwzu r8, 8(r4)	61	lwzu r8, 8(r4)
55	stw r7, 4(r6)	62	stw r7, 4(r6)
56	stwu r8, 8(r6)	63	stwu r8, 8(r6)
57	bdnz 1b	64	bdnz 1b
58		65
59	andi. r5, r5, 7	66	andi. r5, r5, 7
60		67
61	2:	68	2:
62		69
63	cmplwi 0, r5, 4	70	cmplwi 0, r5, 4
64	blt 3f	71	blt 3f
65		72
66	lwzu r0, 4(r4)	73	lwzu r0, 4(r4)
67	addi r5, r5, -4	74	addi r5, r5, -4
68	stwu r0, 4(r6)	75	stwu r0, 4(r6)
69		76
70	3:	77	3:
71		78
72	cmpwi 0, r5, 0	79	cmpwi 0, r5, 0
73	beqlr	80	beqlr
74	mtctr r5	81	mtctr r5
75	addi r4, r4, 3	82	addi r4, r4, 3
76	addi r6, r6, 3	83	addi r6, r6, 3
77		84
78	4:	85	4:
79		86
80	lbzu r0, 1(r4)	87	lbzu r0, 1(r4)
81	stbu r0, 1(r6)	88	stbu r0, 1(r6)
82	bdnz 4b	89	bdnz 4b
83	blr	90	blr
84		91
85	5:	92	5:
86		93
87	subfic r0, r0, 4	94	subfic r0, r0, 4
88	mtctr r0	95	mtctr r0
89		96
90	6:	97	6:
91		98
92	lbz r7, 4(r4)	99	lbz r7, 4(r4)
93	addi r4, r4, 1	100	addi r4, r4, 1
94	stb r7, 4(r6)	101	stb r7, 4(r6)
95	addi r6, r6, 1	102	addi r6, r6, 1
96	bdnz 6b	103	bdnz 6b
97	subf r5, r0, r5	104	subf r5, r0, r5
98	rlwinm. r7, r5, 32-3, 3, 31	105	rlwinm. r7, r5, 32-3, 3, 31
99	beq 2b	106	beq 2b
100	mtctr r7	107	mtctr r7
101	b 1b	108	b 1b
102		109
103		110
104	jump_to_kernel:	111	jump_to_kernel:
105		112
106	# r3 = bootinfo (pa)	113	# r3 = bootinfo (pa)
107	# r4 = bootinfo_size	114	# r4 = bootinfo_size
108	# r5 = trans (pa)	115	# r5 = trans (pa)
109	# r6 = bytes to copy	116	# r6 = bytes to copy
110	# r7 = real_mode (pa)	117	# r7 = real_mode (pa)
111	# r8 = framebuffer (pa)	118	# r8 = framebuffer (pa)
112	# r9 = scanline	119	# r9 = scanline
113		120
114	# disable interrupts	121	# disable interrupts
115		122
116	mfmsr r31	123	mfmsr r31
117	rlwinm r31, r31, 0, 17, 15	124	rlwinm r31, r31, 0, 17, 15
118	mtmsr r31	125	mtmsr r31
119		126
120	# set real_mode meeting point address	127	# set real_mode meeting point address
121		128
122	mtspr srr0, r7	129	mtspr srr0, r7
123		130
124	# jumps to real_mode	131	# jumps to real_mode
125		132
126	mfmsr r31	133	mfmsr r31
127	lis r30, ~0@h	134	lis r30, ~0@h
128	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l	135	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l
129	and r31, r31, r30	136	and r31, r31, r30
130	mtspr srr1, r31	137	mtspr srr1, r31
131		138
132	sync	139	sync
133	isync	140	isync
134	rfi	141	rfi
135		142
136	.section REALMODE, "ax"	143	.section REALMODE, "ax"
137	.align PAGE_WIDTH	144	.align PAGE_WIDTH
138	.global real_mode	145	.global real_mode
139		146
140	real_mode:	147	real_mode:
141		148
142	# copy kernel to proper location	149	# copy kernel to proper location
143	#	150	#
144	# r5 = trans (pa)	151	# r5 = trans (pa)
145	# r6 = bytes to copy	152	# r6 = bytes to copy
146	# r8 = framebuffer (pa)	153	# r8 = framebuffer (pa)
147	# r9 = scanline	154	# r9 = scanline
148		155
149	li r31, PAGE_SIZE >> 2	156	li r31, PAGE_SIZE >> 2
150	li r30, 0	157	li r30, 0
151		158
152	page_copy:	159	page_copy:
153		160
154	cmpwi r6, 0	161	cmpwi r6, 0
155	beq copy_end	162	beq copy_end
156		163
157	# copy page	164	# copy page
158		165
159	mtctr r31	166	mtctr r31
160	lwz r29, 0(r5)	167	lwz r29, 0(r5)
161		168
162	copy_loop:	169	copy_loop:
163		170
164	lwz r28, 0(r29)	171	lwz r28, 0(r29)
165	stw r28, 0(r30)	172	stw r28, 0(r30)
166		173
-		174	FLUSH_CACHE r30
-		175
167	addi r29, r29, 4	176	addi r29, r29, 4
168	addi r30, r30, 4	177	addi r30, r30, 4
169	subi r6, r6, 4	178	subi r6, r6, 4
170		179
171	cmpwi r6, 0	180	cmpwi r6, 0
172	beq copy_end	181	beq copy_end
173		182
174	bdnz copy_loop	183	bdnz copy_loop
175		184
176	addi r5, r5, 4	185	addi r5, r5, 4
177	b page_copy	186	b page_copy
178		187
179	copy_end:	188	copy_end:
180		189
181	# initially fill segment registers	190	# initially fill segment registers
182		191
183	li r31, 0	192	li r31, 0
184		193
185	li r29, 8	194	li r29, 8
186	mtctr r29	195	mtctr r29
187	li r30, 0 # ASID 0 (VSIDs 0 .. 7)	196	li r30, 0 # ASID 0 (VSIDs 0 .. 7)
188		197
189	seg_fill_uspace:	198	seg_fill_uspace:
190		199
191	mtsrin r30, r31	200	mtsrin r30, r31
192	addi r30, r30, 1	201	addi r30, r30, 1
193	addis r31, r31, 0x1000 # move to next SR	202	addis r31, r31, 0x1000 # move to next SR
194		203
195	bdnz seg_fill_uspace	204	bdnz seg_fill_uspace
196		205
197	li r29, 8	206	li r29, 8
198	mtctr r29	207	mtctr r29
199	lis r30, 0x4000 # priviledged access only	208	lis r30, 0x4000 # priviledged access only
200	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)	209	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
201		210
202	seg_fill_kernel:	211	seg_fill_kernel:
203		212
204	mtsrin r30, r31	213	mtsrin r30, r31
205	addi r30, r30, 1	214	addi r30, r30, 1
206	addis r31, r31, 0x1000 # move to next SR	215	addis r31, r31, 0x1000 # move to next SR
207		216
208	bdnz seg_fill_kernel	217	bdnz seg_fill_kernel
209		218
210	# invalidate block address translation registers	219	# invalidate block address translation registers
211		220
212	li r30, 0	221	li r30, 0
213		222
214	mtspr ibat0u, r30	223	mtspr ibat0u, r30
215	mtspr ibat0l, r30	224	mtspr ibat0l, r30
216		225
217	mtspr ibat1u, r30	226	mtspr ibat1u, r30
218	mtspr ibat1l, r30	227	mtspr ibat1l, r30
219		228
220	mtspr ibat2u, r30	229	mtspr ibat2u, r30
221	mtspr ibat2l, r30	230	mtspr ibat2l, r30
222		231
223	mtspr ibat3u, r30	232	mtspr ibat3u, r30
224	mtspr ibat3l, r30	233	mtspr ibat3l, r30
225		234
226	mtspr dbat0u, r30	235	mtspr dbat0u, r30
227	mtspr dbat0l, r30	236	mtspr dbat0l, r30
228		237
229	mtspr dbat1u, r30	238	mtspr dbat1u, r30
230	mtspr dbat1l, r30	239	mtspr dbat1l, r30
231		240
232	mtspr dbat2u, r30	241	mtspr dbat2u, r30
233	mtspr dbat2l, r30	242	mtspr dbat2l, r30
234		243
235	mtspr dbat3u, r30	244	mtspr dbat3u, r30
236	mtspr dbat3l, r30	245	mtspr dbat3l, r30
237		246
238	# create empty Page Hash Table	247	# create empty Page Hash Table
239	# on top of memory, size 64 KB	248	# on top of memory, size 64 KB
240		249
241	lwz r31, 0(r3) # r31 = memory size	250	lwz r31, 0(r3) # r31 = memory size
242		251
243	lis r30, 65536@h	252	lis r30, 65536@h
244	ori r30, r30, 65536@l # r30 = 65536	253	ori r30, r30, 65536@l # r30 = 65536
245		254
246	subi r29, r30, 1 # r29 = 65535	255	subi r29, r30, 1 # r29 = 65535
247		256
248	sub r31, r31, r30	257	sub r31, r31, r30
249	andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)	258	andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
250		259
251	mtsdr1 r31	260	mtsdr1 r31
252		261
253	li r29, 2	262	li r29, 2
254	srw r30, r30, r29 # r30 = 16384	263	srw r30, r30, r29 # r30 = 16384
255	li r29, 0	264	li r29, 0
256		265
257	pht_clear:	266	pht_clear:
258		267
259	# write zeroes	268	# write zeroes
260		269
261	stw r29, 0(r31)	270	stw r29, 0(r31)
-		271	FLUSH_CACHE r31
262		272
263	addi r31, r31, 4	273	addi r31, r31, 4
264	subi r30, r30, 4	274	subi r30, r30, 4
265		275
266	cmpwi r30, 0	276	cmpwi r30, 0
267	beq clear_end	277	beq clear_end
268		278
269	bdnz pht_clear	279	bdnz pht_clear
270		280
271	clear_end:	281	clear_end:
272		282
273	#ifdef CONFIG_BAT	283	#ifdef CONFIG_BAT
274		284
275	# create BAT identity mapping	285	# create BAT identity mapping
276		286
277	lwz r31, 0(r3) # r31 = memory size	287	lwz r31, 0(r3) # r31 = memory size
278		288
279	lis r29, 0x0002	289	lis r29, 0x0002
280	cmpw r31, r29	290	cmpw r31, r29
281	blt no_bat # less than 128 KB -> no BAT	291	blt no_bat # less than 128 KB -> no BAT
282		292
283	li r29, 18	293	li r29, 18
284	srw r31, r31, r29 # r31 = total >> 18	294	srw r31, r31, r29 # r31 = total >> 18
285		295
286	# create Block Length mask by replicating	296	# create Block Length mask by replicating
287	# the leading logical one 14 times	297	# the leading logical one 14 times
288		298
289	li r29, 14	299	li r29, 14
290	mtctr r31	300	mtctr r31
291	li r29, 1	301	li r29, 1
292		302
293	bat_mask:	303	bat_mask:
294	srw r30, r31, r29 # r30 = mask >> 1	304	srw r30, r31, r29 # r30 = mask >> 1
295	or r31, r31, r30 # mask = mask \| r30	305	or r31, r31, r30 # mask = mask \| r30
296		306
297	bdnz bat_mask	307	bdnz bat_mask
298		308
299	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)	309	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
300		310
301	li r29, 2	311	li r29, 2
302	slw r31, r31, r29 # mask = mask << 2	312	slw r31, r31, r29 # mask = mask << 2
303	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)	313	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)
304		314
305	lis r29, 0x8000	315	lis r29, 0x8000
306	or r29, r29, r31	316	or r29, r29, r31
307		317
308	lis r30, 0x0000	318	lis r30, 0x0000
309	ori r30, r30, 0x0002	319	ori r30, r30, 0x0002
310		320
311	mtspr ibat0u, r29	321	mtspr ibat0u, r29
312	mtspr ibat0l, r30	322	mtspr ibat0l, r30
313		323
314	mtspr dbat0u, r29	324	mtspr dbat0u, r29
315	mtspr dbat0l, r30	325	mtspr dbat0l, r30
316		326
317	no_bat:	327	no_bat:
318		328
319	#endif	329	#endif
320		330
321	tlbsync	331	tlbsync
322		332
323	# start the kernel	333	# start the kernel
324	#	334	#
325	# pc = KERNEL_START_ADDR	335	# pc = KERNEL_START_ADDR
326	# r3 = bootinfo (pa)	336	# r3 = bootinfo (pa)
327	# sprg0 = KA2PA(KERNEL_START_ADDR)	337	# sprg0 = KA2PA(KERNEL_START_ADDR)
328	# sprg3 = physical memory size	338	# sprg3 = physical memory size
329	# sp = 0 (pa)	339	# sp = 0 (pa)
330		340
331	lis r31, KERNEL_START_ADDR@ha	341	lis r31, KERNEL_START_ADDR@ha
332	addi r31, r31, KERNEL_START_ADDR@l	342	addi r31, r31, KERNEL_START_ADDR@l
333		343
334	mtspr srr0, r31	344	mtspr srr0, r31
335		345
336	subis r31, r31, 0x8000	346	subis r31, r31, 0x8000
337	mtsprg0 r31	347	mtsprg0 r31
338		348
339	lwz r31, 0(r3)	349	lwz r31, 0(r3)
340	mtsprg3 r31	350	mtsprg3 r31
341		351
342	li sp, 0	352	li sp, 0
343		353
344	mfmsr r31	354	mfmsr r31
345	ori r31, r31, (msr_ir \| msr_dr)@l	355	ori r31, r31, (msr_ir \| msr_dr)@l
346	mtspr srr1, r31	356	mtspr srr1, r31
347		357
348	sync	358	sync
349	isync	359	isync
350	rfi	360	rfi
351		361
352	.align PAGE_WIDTH	362	.align PAGE_WIDTH
353	.global trans	363	.global trans
354	trans:	364	trans:
355	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	365	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
356		366

Subversion Repositories HelenOS

(root)/trunk/boot/arch/ppc32/loader/asm.S – Rev 3827 → 3855