WebSVN – HelenOS – Diff – /trunk/boot/arch/ppc32/loader/asm.S


#
# Copyright (c) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r7 = real_mode (pa)
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	# disable interrupts
	
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set real_mode meeting point address
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
			
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	# initially fill segment registers
	
	li r31, 0
	
	li r29, 8
	mtctr r29
	li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
 
	seg_fill_uspace:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_uspace
	
	li r29, 8
	mtctr r29
	lis r30, 0x4000               # priviledged access only
	ori r30, r30, 8               # ASID 0 (VSIDs 8 .. 15)
	
	seg_fill_kernel:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_kernel
	
	# invalidate block address translation registers
	
	li r30, 0
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create empty Page Hash Table
	# on top of memory, size 64 KB
	
	lwz r31, 0(r3)                # r31 = memory size
	
	lis r30, 65536@h
	ori r30, r30, 65536@l         # r30 = 65536
	
	subi r29, r30, 1              # r29 = 65535
	
	sub r31, r31, r30
	andc r31, r31, r29            # pht = ALIGN_DOWN(memory_size - 65536, 65536)
	
	mtsdr1 r31
	
	li r29, 2
	srw r30, r30, r29             # r30 = 16384
	li r29, 0
	
	pht_clear:
		
		# write zeroes
		
		stw r29, 0(r31)
		
		addi r31, r31, 4
		subi r30, r30, 4
		
		cmpwi r30, 0
		beq clear_end
		
		bdnz pht_clear
		
	clear_end:
	
#ifdef CONFIG_BAT
	
	# create BAT identity mapping
	
	lwz r31, 0(r3)                # r31 = memory size
	
	lis r29, 0x0002
	cmpw r31, r29
	blt no_bat                    # less than 128 KB -> no BAT
	
	li r29, 18
	srw r31, r31, r29             # r31 = total >> 18
	
	# create Block Length mask by replicating
	# the leading logical one 14 times
	
	li r29, 14
	mtctr r31
	li r29, 1
	
	bat_mask:
		srw r30, r31, r29         # r30 = mask >> 1
		or r31, r31, r30          # mask = mask | r30
		
		bdnz bat_mask
	
	andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
	
	li r29, 2
	slw r31, r31, r29             # mask = mask << 2
	ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
	
	lis r29, 0x8000
	or r29, r29, r31
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r29
	mtspr ibat0l, r30
	
	mtspr dbat0u, r29
	mtspr dbat0l, r30
	
	no_bat:
	
#endif
	
 
	tlbsync
	
	# start the kernel
	#
	# pc = KERNEL_START_ADDR
	# r3 = bootinfo (pa)
	# sprg0 = KA2PA(KERNEL_START_ADDR)
	# sprg3 = physical memory size
	# sp = 0 (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	subis r31, r31, 0x8000
	mtsprg0 r31
	
	lwz r31, 0(r3)
	mtsprg3 r31
	
	li sp, 0
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 3824	Rev 3827
1	#	1	#
2	# Copyright (c) 2006 Martin Decky	2	# Copyright (c) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31		31
32	.text	32	.text
33		33
34	.global halt	34	.global halt
35	.global memcpy	35	.global memcpy
36	.global jump_to_kernel	36	.global jump_to_kernel
37		37
38	halt:	38	halt:
39	b halt	39	b halt
40		40
41	memcpy:	41	memcpy:
42	srwi. r7, r5, 3	42	srwi. r7, r5, 3
43	addi r6, r3, -4	43	addi r6, r3, -4
44	addi r4, r4, -4	44	addi r4, r4, -4
45	beq 2f	45	beq 2f
46		46
47	andi. r0, r6, 3	47	andi. r0, r6, 3
48	mtctr r7	48	mtctr r7
49	bne 5f	49	bne 5f
50		50
51	1:	51	1:
52		52
53	lwz r7, 4(r4)	53	lwz r7, 4(r4)
54	lwzu r8, 8(r4)	54	lwzu r8, 8(r4)
55	stw r7, 4(r6)	55	stw r7, 4(r6)
56	stwu r8, 8(r6)	56	stwu r8, 8(r6)
57	bdnz 1b	57	bdnz 1b
58		58
59	andi. r5, r5, 7	59	andi. r5, r5, 7
60		60
61	2:	61	2:
62		62
63	cmplwi 0, r5, 4	63	cmplwi 0, r5, 4
64	blt 3f	64	blt 3f
65		65
66	lwzu r0, 4(r4)	66	lwzu r0, 4(r4)
67	addi r5, r5, -4	67	addi r5, r5, -4
68	stwu r0, 4(r6)	68	stwu r0, 4(r6)
69		69
70	3:	70	3:
71		71
72	cmpwi 0, r5, 0	72	cmpwi 0, r5, 0
73	beqlr	73	beqlr
74	mtctr r5	74	mtctr r5
75	addi r4, r4, 3	75	addi r4, r4, 3
76	addi r6, r6, 3	76	addi r6, r6, 3
77		77
78	4:	78	4:
79		79
80	lbzu r0, 1(r4)	80	lbzu r0, 1(r4)
81	stbu r0, 1(r6)	81	stbu r0, 1(r6)
82	bdnz 4b	82	bdnz 4b
83	blr	83	blr
84		84
85	5:	85	5:
86		86
87	subfic r0, r0, 4	87	subfic r0, r0, 4
88	mtctr r0	88	mtctr r0
89		89
90	6:	90	6:
91		91
92	lbz r7, 4(r4)	92	lbz r7, 4(r4)
93	addi r4, r4, 1	93	addi r4, r4, 1
94	stb r7, 4(r6)	94	stb r7, 4(r6)
95	addi r6, r6, 1	95	addi r6, r6, 1
96	bdnz 6b	96	bdnz 6b
97	subf r5, r0, r5	97	subf r5, r0, r5
98	rlwinm. r7, r5, 32-3, 3, 31	98	rlwinm. r7, r5, 32-3, 3, 31
99	beq 2b	99	beq 2b
100	mtctr r7	100	mtctr r7
101	b 1b	101	b 1b
102		102
103		103
104	jump_to_kernel:	104	jump_to_kernel:
105		105
106	# r3 = bootinfo (pa)	106	# r3 = bootinfo (pa)
107	# r4 = bootinfo_size	107	# r4 = bootinfo_size
108	# r5 = trans (pa)	108	# r5 = trans (pa)
109	# r6 = bytes to copy	109	# r6 = bytes to copy
110	# r7 = real_mode (pa)	110	# r7 = real_mode (pa)
111	# r8 = framebuffer (pa)	111	# r8 = framebuffer (pa)
112	# r9 = scanline	112	# r9 = scanline
113		113
114	# disable interrupts	114	# disable interrupts
115		115
116	mfmsr r31	116	mfmsr r31
117	rlwinm r31, r31, 0, 17, 15	117	rlwinm r31, r31, 0, 17, 15
118	mtmsr r31	118	mtmsr r31
119		119
120	# set real_mode meeting point address	120	# set real_mode meeting point address
121		121
122	mtspr srr0, r7	122	mtspr srr0, r7
123		123
124	# jumps to real_mode	124	# jumps to real_mode
125		125
126	mfmsr r31	126	mfmsr r31
127	lis r30, ~0@h	127	lis r30, ~0@h
128	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l	128	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l
129	and r31, r31, r30	129	and r31, r31, r30
130	mtspr srr1, r31	130	mtspr srr1, r31
131		131
132	sync	132	sync
133	isync	133	isync
134	rfi	134	rfi
135		135
136	.section REALMODE, "ax"	136	.section REALMODE, "ax"
137	.align PAGE_WIDTH	137	.align PAGE_WIDTH
138	.global real_mode	138	.global real_mode
139		139
140	real_mode:	140	real_mode:
141		141
142	# copy kernel to proper location	142	# copy kernel to proper location
143	#	143	#
144	# r5 = trans (pa)	144	# r5 = trans (pa)
145	# r6 = bytes to copy	145	# r6 = bytes to copy
146	# r8 = framebuffer (pa)	146	# r8 = framebuffer (pa)
147	# r9 = scanline	147	# r9 = scanline
148		148
149	li r31, PAGE_SIZE >> 2	149	li r31, PAGE_SIZE >> 2
150	li r30, 0	150	li r30, 0
151		151
152	page_copy:	152	page_copy:
153		153
154	cmpwi r6, 0	154	cmpwi r6, 0
155	beq copy_end	155	beq copy_end
156		156
157	# copy page	157	# copy page
158		158
159	mtctr r31	159	mtctr r31
160	lwz r29, 0(r5)	160	lwz r29, 0(r5)
161		161
162	copy_loop:	162	copy_loop:
163		163
164	lwz r28, 0(r29)	164	lwz r28, 0(r29)
165	stw r28, 0(r30)	165	stw r28, 0(r30)
166		166
167	addi r29, r29, 4	167	addi r29, r29, 4
168	addi r30, r30, 4	168	addi r30, r30, 4
169	subi r6, r6, 4	169	subi r6, r6, 4
170		170
171	cmpwi r6, 0	171	cmpwi r6, 0
172	beq copy_end	172	beq copy_end
173		173
174	bdnz copy_loop	174	bdnz copy_loop
175		175
176	addi r5, r5, 4	176	addi r5, r5, 4
177	b page_copy	177	b page_copy
178		178
179	copy_end:	179	copy_end:
180		180
181	# initially fill segment registers	181	# initially fill segment registers
182		182
183	li r31, 0	183	li r31, 0
184		184
185	li r29, 8	185	li r29, 8
186	mtctr r29	186	mtctr r29
187	li r30, 0 # ASID 0 (VSIDs 0 .. 7)	187	li r30, 0 # ASID 0 (VSIDs 0 .. 7)
188		188
189	seg_fill_uspace:	189	seg_fill_uspace:
190		190
191	mtsrin r30, r31	191	mtsrin r30, r31
192	addi r30, r30, 1	192	addi r30, r30, 1
193	addis r31, r31, 0x1000 # move to next SR	193	addis r31, r31, 0x1000 # move to next SR
194		194
195	bdnz seg_fill_uspace	195	bdnz seg_fill_uspace
196		196
197	li r29, 8	197	li r29, 8
198	mtctr r29	198	mtctr r29
199	lis r30, 0x4000 # priviledged access only	199	lis r30, 0x4000 # priviledged access only
200	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)	200	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
201		201
202	seg_fill_kernel:	202	seg_fill_kernel:
203		203
204	mtsrin r30, r31	204	mtsrin r30, r31
205	addi r30, r30, 1	205	addi r30, r30, 1
206	addis r31, r31, 0x1000 # move to next SR	206	addis r31, r31, 0x1000 # move to next SR
207		207
208	bdnz seg_fill_kernel	208	bdnz seg_fill_kernel
209		209
210	# invalidate block address translation registers	210	# invalidate block address translation registers
211		211
212	li r30, 0	212	li r30, 0
213		213
214	mtspr ibat0u, r30	214	mtspr ibat0u, r30
215	mtspr ibat0l, r30	215	mtspr ibat0l, r30
216		216
217	mtspr ibat1u, r30	217	mtspr ibat1u, r30
218	mtspr ibat1l, r30	218	mtspr ibat1l, r30
219		219
220	mtspr ibat2u, r30	220	mtspr ibat2u, r30
221	mtspr ibat2l, r30	221	mtspr ibat2l, r30
222		222
223	mtspr ibat3u, r30	223	mtspr ibat3u, r30
224	mtspr ibat3l, r30	224	mtspr ibat3l, r30
225		225
226	mtspr dbat0u, r30	226	mtspr dbat0u, r30
227	mtspr dbat0l, r30	227	mtspr dbat0l, r30
228		228
229	mtspr dbat1u, r30	229	mtspr dbat1u, r30
230	mtspr dbat1l, r30	230	mtspr dbat1l, r30
231		231
232	mtspr dbat2u, r30	232	mtspr dbat2u, r30
233	mtspr dbat2l, r30	233	mtspr dbat2l, r30
234		234
235	mtspr dbat3u, r30	235	mtspr dbat3u, r30
236	mtspr dbat3l, r30	236	mtspr dbat3l, r30
237		237
238	# create empty Page Hash Table	238	# create empty Page Hash Table
239	# on top of memory, size 64 KB	239	# on top of memory, size 64 KB
240		240
241	lwz r31, 0(r3) # r31 = memory size	241	lwz r31, 0(r3) # r31 = memory size
242		242
243	lis r30, 65536@h	243	lis r30, 65536@h
244	ori r30, r30, 65536@l # r30 = 65536	244	ori r30, r30, 65536@l # r30 = 65536
245		245
246	subi r29, r30, 1 # r29 = 65535	246	subi r29, r30, 1 # r29 = 65535
247		247
248	sub r31, r31, r30	248	sub r31, r31, r30
249	andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)	249	andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
250		250
251	mtsdr1 r31	251	mtsdr1 r31
252		252
253	li r29, 2	253	li r29, 2
254	srw r30, r30, r29 # r30 = 16384	254	srw r30, r30, r29 # r30 = 16384
255	li r29, 0	255	li r29, 0
256		256
257	pht_clear:	257	pht_clear:
258		258
259	# write zeroes	259	# write zeroes
260		260
261	stw r29, 0(r31)	261	stw r29, 0(r31)
262		262
263	addi r31, r31, 4	263	addi r31, r31, 4
264	subi r30, r30, 4	264	subi r30, r30, 4
265		265
266	cmpwi r30, 0	266	cmpwi r30, 0
267	beq clear_end	267	beq clear_end
268		268
269	bdnz pht_clear	269	bdnz pht_clear
270		270
271	clear_end:	271	clear_end:
272		272
273	#ifdef CONFIG_BAT	273	#ifdef CONFIG_BAT
274		274
275	# create BAT identity mapping	275	# create BAT identity mapping
276		276
277	lwz r31, 0(r3) # r31 = memory size	277	lwz r31, 0(r3) # r31 = memory size
278		278
279	lis r29, 0x0002	279	lis r29, 0x0002
280	cmpw r31, r29	280	cmpw r31, r29
281	blt no_bat # less than 128 KB -> no BAT	281	blt no_bat # less than 128 KB -> no BAT
282		282
283	li r29, 18	283	li r29, 18
284	srw r31, r31, r29 # r31 = total >> 18	284	srw r31, r31, r29 # r31 = total >> 18
285		285
286	# create Block Length mask by replicating	286	# create Block Length mask by replicating
287	# the leading logical one 14 times	287	# the leading logical one 14 times
288		288
289	li r29, 14	289	li r29, 14
290	mtctr r31	290	mtctr r31
291	li r29, 1	291	li r29, 1
292		292
293	bat_mask:	293	bat_mask:
294	srw r30, r31, r29 # r30 = mask >> 1	294	srw r30, r31, r29 # r30 = mask >> 1
295	or r31, r31, r30 # mask = mask \| r30	295	or r31, r31, r30 # mask = mask \| r30
296		296
297	bdnz bat_mask	297	bdnz bat_mask
298		298
299	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)	299	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
300		300
301	li r29, 2	301	li r29, 2
302	slw r31, r31, r29 # mask = mask << 2	302	slw r31, r31, r29 # mask = mask << 2
303	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)	303	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)
304		304
305	lis r29, 0x8000	305	lis r29, 0x8000
306	or r29, r29, r31	306	or r29, r29, r31
307		307
308	lis r30, 0x0000	308	lis r30, 0x0000
309	ori r30, r30, 0x0002	309	ori r30, r30, 0x0002
310		310
311	mtspr ibat0u, r29	311	mtspr ibat0u, r29
312	mtspr ibat0l, r30	312	mtspr ibat0l, r30
313		313
314	mtspr dbat0u, r29	314	mtspr dbat0u, r29
315	mtspr dbat0l, r30	315	mtspr dbat0l, r30
316		316
317	no_bat:	317	no_bat:
318		318
319	#endif	319	#endif
320		320
321	tlbia	-
322	tlbsync	321	tlbsync
323		322
324	# start the kernel	323	# start the kernel
325	#	324	#
326	# pc = KERNEL_START_ADDR	325	# pc = KERNEL_START_ADDR
327	# r3 = bootinfo (pa)	326	# r3 = bootinfo (pa)
328	# sprg0 = KA2PA(KERNEL_START_ADDR)	327	# sprg0 = KA2PA(KERNEL_START_ADDR)
329	# sprg3 = physical memory size	328	# sprg3 = physical memory size
330	# sp = 0 (pa)	329	# sp = 0 (pa)
331		330
332	lis r31, KERNEL_START_ADDR@ha	331	lis r31, KERNEL_START_ADDR@ha
333	addi r31, r31, KERNEL_START_ADDR@l	332	addi r31, r31, KERNEL_START_ADDR@l
334		333
335	mtspr srr0, r31	334	mtspr srr0, r31
336		335
337	subis r31, r31, 0x8000	336	subis r31, r31, 0x8000
338	mtsprg0 r31	337	mtsprg0 r31
339		338
340	lwz r31, 0(r3)	339	lwz r31, 0(r3)
341	mtsprg3 r31	340	mtsprg3 r31
342		341
343	li sp, 0	342	li sp, 0
344		343
345	mfmsr r31	344	mfmsr r31
346	ori r31, r31, (msr_ir \| msr_dr)@l	345	ori r31, r31, (msr_ir \| msr_dr)@l
347	mtspr srr1, r31	346	mtspr srr1, r31
348		347
349	sync	348	sync
350	isync	349	isync
351	rfi	350	rfi
352		351
353	.align PAGE_WIDTH	352	.align PAGE_WIDTH
354	.global trans	353	.global trans
355	trans:	354	trans:
356	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	355	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
357		356

Subversion Repositories HelenOS

(root)/trunk/boot/arch/ppc32/loader/asm.S – Rev 3824 → 3827