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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | # |
27 | # |
| 28 | 28 | ||
| 29 | #include "regname.h" |
29 | #include "regname.h" |
| 30 | - | ||
| 31 | #define INITIAL_STACK 0x80040000 |
- | |
| 32 | #define MSIM_DORDER_ADDRESS 0x90000004 |
30 | #include "main.h" |
| 33 | 31 | ||
| 34 | .set noat |
32 | .set noat |
| 35 | .set noreorder |
33 | .set noreorder |
| 36 | .set nomacro |
34 | .set nomacro |
| 37 | 35 | ||
| 38 | .section BOOTSTRAP |
36 | .section BOOTSTRAP |
| 39 | 37 | ||
| 40 | .global start |
38 | .global start |
| 41 | start: |
39 | start: |
| 42 | 40 | ||
| - | 41 | /* Setup CPU map (on msim this code |
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| - | 42 | is executed in parallel on all CPUs, |
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| - | 43 | but it not an issue) */ |
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| - | 44 | la $a0, CPUMAP |
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| - | 45 | ||
| - | 46 | sw $zero, 0($a0) |
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| - | 47 | sw $zero, 4($a0) |
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| - | 48 | sw $zero, 8($a0) |
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| - | 49 | sw $zero, 12($a0) |
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| - | 50 | ||
| - | 51 | sw $zero, 16($a0) |
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| - | 52 | sw $zero, 20($a0) |
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| - | 53 | sw $zero, 24($a0) |
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| - | 54 | sw $zero, 28($a0) |
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| - | 55 | ||
| - | 56 | sw $zero, 32($a0) |
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| - | 57 | sw $zero, 36($a0) |
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| - | 58 | sw $zero, 40($a0) |
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| - | 59 | sw $zero, 44($a0) |
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| - | 60 | ||
| - | 61 | sw $zero, 48($a0) |
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| - | 62 | sw $zero, 52($a0) |
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| - | 63 | sw $zero, 56($a0) |
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| - | 64 | sw $zero, 60($a0) |
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| - | 65 | ||
| - | 66 | sw $zero, 64($a0) |
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| - | 67 | sw $zero, 68($a0) |
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| - | 68 | sw $zero, 72($a0) |
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| - | 69 | sw $zero, 76($a0) |
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| - | 70 | ||
| - | 71 | sw $zero, 80($a0) |
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| - | 72 | sw $zero, 84($a0) |
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| - | 73 | sw $zero, 88($a0) |
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| - | 74 | sw $zero, 92($a0) |
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| - | 75 | ||
| - | 76 | sw $zero, 96($a0) |
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| - | 77 | sw $zero, 100($a0) |
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| - | 78 | sw $zero, 104($a0) |
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| - | 79 | sw $zero, 108($a0) |
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| - | 80 | ||
| - | 81 | sw $zero, 112($a0) |
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| - | 82 | sw $zero, 116($a0) |
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| - | 83 | sw $zero, 120($a0) |
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| - | 84 | sw $zero, 124($a0) |
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| - | 85 | ||
| - | 86 | lui $a1, 1 |
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| - | 87 | ||
| 43 | #ifdef MACHINE_msim |
88 | #ifdef MACHINE_msim |
| - | 89 | ||
| 44 | /* Read dorder value */ |
90 | /* Read dorder value */ |
| 45 | la $k0, MSIM_DORDER_ADDRESS |
91 | la $k0, MSIM_DORDER_ADDRESS |
| 46 | lw $k0, ($k0) |
92 | lw $k1, ($k0) |
| 47 | 93 | ||
| 48 | /* If we are not running on BSP |
94 | /* If we are not running on BSP |
| 49 | end in an infinite loop */ |
95 | then end in an infinite loop */ |
| 50 | beq $k0, $zero, bsp |
96 | beq $k1, $zero, bsp |
| 51 | nop |
97 | nop |
| 52 | 98 | ||
| - | 99 | /* Record CPU presence */ |
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| - | 100 | sll $a2, $k1, 2 |
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| - | 101 | addu $a2, $a2, $a0 |
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| - | 102 | sw $a1, ($a2) |
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| - | 103 | ||
| 53 | loop: |
104 | loop: |
| 54 | j loop |
105 | j loop |
| 55 | nop |
106 | nop |
| 56 | 107 | ||
| 57 | #endif |
108 | #endif |
| 58 | 109 | ||
| 59 | bsp: |
110 | bsp: |
| - | 111 | /* Record CPU presence */ |
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| - | 112 | sw $a1, ($a0) |
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| - | 113 | ||
| 60 | /* Setup initial stack */ |
114 | /* Setup initial stack */ |
| 61 | lui $sp, INITIAL_STACK >> 16 |
115 | la $sp, INITIAL_STACK |
| 62 | ori $sp, $sp, INITIAL_STACK & 0xffff |
- | |
| 63 | 116 | ||
| 64 | j bootstrap |
117 | j bootstrap |
| 65 | nop |
118 | nop |