WebSVN – HelenOS – Diff – /kernel/trunk/generic/src/ipc/irq.c


/*
 * Copyright (C) 2006 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** IRQ notification framework
 *
 * This framework allows applications to register to receive a notification
 * when interrupt is detected. The application may provide a simple 'top-half'
 * handler as part of its registration, which can perform simple operations
 * (read/write port/memory, add information to notification ipc message).
 *
 * The structure of a notification message is as follows:
 
 * - METHOD: interrupt number
 * - ARG1: payload modified by a 'top-half' handler
 * - ARG2: payload
 * - ARG3: payload
 * - in_phone_hash: interrupt counter (may be needed to assure correct order
 *         in multithreaded drivers)
 */
 
#include <arch.h>
#include <mm/slab.h>
#include <errno.h>
#include <ipc/ipc.h>
#include <ipc/irq.h>
#include <atomic.h>
#include <syscall/copy.h>
#include <console/console.h>
 
typedef struct {
    SPINLOCK_DECLARE(lock);
    answerbox_t *box;
    irq_code_t *code;
    atomic_t counter;
} ipc_irq_t;
 
 
static ipc_irq_t *irq_conns = NULL;
static int irq_conns_size;
 
#include <print.h>
/* Execute code associated with IRQ notification */
static void code_execute(call_t *call, irq_code_t *code)
{
    int i;
    __native dstval = 0;
   
    if (!code)
        return;
   
    for (i=0; i < code->cmdcount;i++) {
        switch (code->cmds[i].cmd) {
        case CMD_MEM_READ_1:
            dstval = *((__u8 *)code->cmds[i].addr);
            break;
        case CMD_MEM_READ_2:
            dstval = *((__u16 *)code->cmds[i].addr);
            break;
        case CMD_MEM_READ_4:
            dstval = *((__u32 *)code->cmds[i].addr);
            break;
        case CMD_MEM_READ_8:
            dstval = *((__u64 *)code->cmds[i].addr);
            break;
        case CMD_MEM_WRITE_1:
            *((__u8 *)code->cmds[i].addr) = code->cmds[i].value;
            break;
        case CMD_MEM_WRITE_2:
            *((__u16 *)code->cmds[i].addr) = code->cmds[i].value;
            break;
        case CMD_MEM_WRITE_4:
            *((__u32 *)code->cmds[i].addr) = code->cmds[i].value;
            break;
        case CMD_MEM_WRITE_8:
            *((__u64 *)code->cmds[i].addr) = code->cmds[i].value;
            break;
#if defined(ia32) || defined(amd64)
        case CMD_PORT_READ_1:
            dstval = inb((long)code->cmds[i].addr);
            break;
        case CMD_PORT_WRITE_1:
            outb((long)code->cmds[i].addr, code->cmds[i].value);
            break;
#endif
#if defined(ia64) 
        case CMD_IA64_GETCHAR:
            dstval = _getc(&ski_uconsole);
            break;
#endif
#if defined(ppc32)
        case CMD_PPC32_GETCHAR:
            dstval = cuda_get_scancode();
            break;
#endif
        default:
            break;
        }
        if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) {
            call->data.args[code->cmds[i].dstarg] = dstval;
        }
    }
}
 
static void code_free(irq_code_t *code)
{
    if (code) {
        free(code->cmds);
        free(code);
    }
}
 
static irq_code_t * code_from_uspace(irq_code_t *ucode)
{
    irq_code_t *code;
    irq_cmd_t *ucmds;
    int rc;
 
    code = malloc(sizeof(*code), 0);
    rc = copy_from_uspace(code, ucode, sizeof(*code));
    if (rc != 0) {
        free(code);
        return NULL;
    }
   
    if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
        free(code);
        return NULL;
    }
    ucmds = code->cmds;
    code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);
    rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));
    if (rc != 0) {
        free(code->cmds);
        free(code);
        return NULL;
    }
 
    return code;
}
 
/** Unregister task from irq */
void ipc_irq_unregister(answerbox_t *box, int irq)
{
    ipl_t ipl;
    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
 
    ipl = interrupts_disable();
    spinlock_lock(&irq_conns[mq].lock);
    if (irq_conns[mq].box == box) {
        irq_conns[mq].box = NULL;
        code_free(irq_conns[mq].code);
        irq_conns[mq].code = NULL;
    }
 
    spinlock_unlock(&irq_conns[mq].lock);
    interrupts_restore(ipl);
}
 
/** Register an answerbox as a receiving end of interrupts notifications */
int ipc_irq_register(answerbox_t *box, int irq, irq_code_t *ucode)
{
    ipl_t ipl;
    irq_code_t *code;
    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
 
    ASSERT(irq_conns);
 
    if (ucode) {
        code = code_from_uspace(ucode);
        if (!code)
            return EBADMEM;
    } else
        code = NULL;
 
    ipl = interrupts_disable();
    spinlock_lock(&irq_conns[mq].lock);
 
    if (irq_conns[mq].box) {
        spinlock_unlock(&irq_conns[mq].lock);
        interrupts_restore(ipl);
        code_free(code);
        return EEXISTS;
    }
    irq_conns[mq].box = box;
    irq_conns[mq].code = code;
    atomic_set(&irq_conns[mq].counter, 0);
    spinlock_unlock(&irq_conns[mq].lock);
    interrupts_restore(ipl);
 
    return 0;
}
 
/** Add call to proper answerbox queue
 *
 * Assume irq_conns[mq].lock is locked */
static void send_call(int mq, call_t *call)
{
    spinlock_lock(&irq_conns[mq].box->irq_lock);
    list_append(&call->link, &irq_conns[mq].box->irq_notifs);
    spinlock_unlock(&irq_conns[mq].box->irq_lock);
       
    waitq_wakeup(&irq_conns[mq].box->wq, 0);
}
 
/** Send notification message
 *
 */
void ipc_irq_send_msg(int irq, __native a1, __native a2, __native a3)
{
    call_t *call;
    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
 
    spinlock_lock(&irq_conns[mq].lock);
 
    if (irq_conns[mq].box) {
        call = ipc_call_alloc(FRAME_ATOMIC);
        if (!call) {
            spinlock_unlock(&irq_conns[mq].lock);
            return;
        }
        call->flags |= IPC_CALL_NOTIF;
        IPC_SET_METHOD(call->data, irq);
        IPC_SET_ARG1(call->data, a1);
        IPC_SET_ARG2(call->data, a2);
        IPC_SET_ARG3(call->data, a3);
        /* Put a counter to the message */
        call->private = atomic_preinc(&irq_conns[mq].counter);
       
        send_call(mq, call);
    }
    spinlock_unlock(&irq_conns[mq].lock);
}
 
/** Notify process that an irq had happend
 *
 * We expect interrupts to be disabled
 */
void ipc_irq_send_notif(int irq)
{
    call_t *call;
    int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
 
    ASSERT(irq_conns);
    spinlock_lock(&irq_conns[mq].lock);
 
    if (irq_conns[mq].box) {
        call = ipc_call_alloc(FRAME_ATOMIC);
        if (!call) {
            spinlock_unlock(&irq_conns[mq].lock);
            return;
        }
        call->flags |= IPC_CALL_NOTIF;
        /* Put a counter to the message */
        call->private = atomic_preinc(&irq_conns[mq].counter);
        /* Set up args */
        IPC_SET_METHOD(call->data, irq);
 
        /* Execute code to handle irq */
        code_execute(call, irq_conns[mq].code);
       
        send_call(mq, call);
    }
       
    spinlock_unlock(&irq_conns[mq].lock);
}
 
 
/** Initialize table of interrupt handlers
 *
 * @param irqcount Count of required hardware IRQs to be supported
 */
void ipc_irq_make_table(int irqcount)
{
    int i;
 
    irqcount +=  IPC_IRQ_RESERVED_VIRTUAL;
 
    irq_conns_size = irqcount;
    irq_conns = malloc(irqcount * (sizeof(*irq_conns)), 0);
    for (i=0; i < irqcount; i++) {
        spinlock_initialize(&irq_conns[i].lock, "irq_ipc_lock");
        irq_conns[i].box = NULL;
        irq_conns[i].code = NULL;
    }
}
 
/** Disconnect all irq's notifications
 *
 * TODO: It may be better to do some linked list, so that
 *       we wouldn't need to go through whole array every cleanup
 */
void ipc_irq_cleanup(answerbox_t *box)
{
    int i;
    ipl_t ipl;
   
    for (i=0; i < irq_conns_size; i++) {
        ipl = interrupts_disable();
        spinlock_lock(&irq_conns[i].lock);
        if (irq_conns[i].box == box)
            irq_conns[i].box = NULL;
        spinlock_unlock(&irq_conns[i].lock);
        interrupts_restore(ipl);
    }
}
 

Rev 1628	Rev 1693
1	/*	1	/*
2	* Copyright (C) 2006 Ondrej Palkovsky	2	* Copyright (C) 2006 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** IRQ notification framework	29	/** IRQ notification framework
30	*	30	*
31	* This framework allows applications to register to receive a notification	31	* This framework allows applications to register to receive a notification
32	* when interrupt is detected. The application may provide a simple 'top-half'	32	* when interrupt is detected. The application may provide a simple 'top-half'
33	* handler as part of its registration, which can perform simple operations	33	* handler as part of its registration, which can perform simple operations
34	* (read/write port/memory, add information to notification ipc message).	34	* (read/write port/memory, add information to notification ipc message).
35	*	35	*
36	* The structure of a notification message is as follows:	36	* The structure of a notification message is as follows:
37	* - METHOD: IPC_M_INTERRUPT	-
38	* - ARG1: interrupt number	37	* - METHOD: interrupt number
39	* - ARG2: payload modified by a 'top-half' handler	38	* - ARG1: payload modified by a 'top-half' handler
-		39	* - ARG2: payload
-		40	* - ARG3: payload
40	* - ARG3: interrupt counter (may be needed to assure correct order	41	* - in_phone_hash: interrupt counter (may be needed to assure correct order
41	* in multithreaded drivers)	42	* in multithreaded drivers)
42	*/	43	*/
43		44
44	#include <arch.h>	45	#include <arch.h>
45	#include <mm/slab.h>	46	#include <mm/slab.h>
46	#include <errno.h>	47	#include <errno.h>
47	#include <ipc/ipc.h>	48	#include <ipc/ipc.h>
48	#include <ipc/irq.h>	49	#include <ipc/irq.h>
49	#include <atomic.h>	50	#include <atomic.h>
50	#include <syscall/copy.h>	51	#include <syscall/copy.h>
51	#include <console/console.h>	52	#include <console/console.h>
52		53
53	typedef struct {	54	typedef struct {
54	SPINLOCK_DECLARE(lock);	55	SPINLOCK_DECLARE(lock);
55	answerbox_t *box;	56	answerbox_t *box;
56	irq_code_t *code;	57	irq_code_t *code;
57	atomic_t counter;	58	atomic_t counter;
58	} ipc_irq_t;	59	} ipc_irq_t;
59		60
60		61
61	static ipc_irq_t *irq_conns = NULL;	62	static ipc_irq_t *irq_conns = NULL;
62	static int irq_conns_size;	63	static int irq_conns_size;
63		64
64	#include <print.h>	65	#include <print.h>
65	/* Execute code associated with IRQ notification */	66	/* Execute code associated with IRQ notification */
66	static void code_execute(call_t call, irq_code_t code)	67	static void code_execute(call_t call, irq_code_t code)
67	{	68	{
68	int i;	69	int i;
-		70	__native dstval = 0;
69		71
70	if (!code)	72	if (!code)
71	return;	73	return;
72		74
73	for (i=0; i < code->cmdcount;i++) {	75	for (i=0; i < code->cmdcount;i++) {
74	switch (code->cmds[i].cmd) {	76	switch (code->cmds[i].cmd) {
75	case CMD_MEM_READ_1:	77	case CMD_MEM_READ_1:
76	IPC_SET_ARG2(call->data, ((__u8 )code->cmds[i].addr));	78	dstval = ((__u8 )code->cmds[i].addr);
77	break;	79	break;
78	case CMD_MEM_READ_2:	80	case CMD_MEM_READ_2:
79	IPC_SET_ARG2(call->data, ((__u16 )code->cmds[i].addr));	81	dstval = ((__u16 )code->cmds[i].addr);
80	break;	82	break;
81	case CMD_MEM_READ_4:	83	case CMD_MEM_READ_4:
82	IPC_SET_ARG2(call->data, ((__u32 )code->cmds[i].addr));	84	dstval = ((__u32 )code->cmds[i].addr);
83	break;	85	break;
84	case CMD_MEM_READ_8:	86	case CMD_MEM_READ_8:
85	IPC_SET_ARG2(call->data, ((__u64 )code->cmds[i].addr));	87	dstval = ((__u64 )code->cmds[i].addr);
86	break;	88	break;
87	case CMD_MEM_WRITE_1:	89	case CMD_MEM_WRITE_1:
88	((__u8 )code->cmds[i].addr) = code->cmds[i].value;	90	((__u8 )code->cmds[i].addr) = code->cmds[i].value;
89	break;	91	break;
90	case CMD_MEM_WRITE_2:	92	case CMD_MEM_WRITE_2:
91	((__u16 )code->cmds[i].addr) = code->cmds[i].value;	93	((__u16 )code->cmds[i].addr) = code->cmds[i].value;
92	break;	94	break;
93	case CMD_MEM_WRITE_4:	95	case CMD_MEM_WRITE_4:
94	((__u32 )code->cmds[i].addr) = code->cmds[i].value;	96	((__u32 )code->cmds[i].addr) = code->cmds[i].value;
95	break;	97	break;
96	case CMD_MEM_WRITE_8:	98	case CMD_MEM_WRITE_8:
97	((__u64 )code->cmds[i].addr) = code->cmds[i].value;	99	((__u64 )code->cmds[i].addr) = code->cmds[i].value;
98	break;	100	break;
99	#if defined(ia32) \|\| defined(amd64)	101	#if defined(ia32) \|\| defined(amd64)
100	case CMD_PORT_READ_1:	102	case CMD_PORT_READ_1:
101	IPC_SET_ARG2(call->data, inb((long)code->cmds[i].addr));	103	dstval = inb((long)code->cmds[i].addr);
102	break;	104	break;
103	case CMD_PORT_WRITE_1:	105	case CMD_PORT_WRITE_1:
104	outb((long)code->cmds[i].addr, code->cmds[i].value);	106	outb((long)code->cmds[i].addr, code->cmds[i].value);
105	break;	107	break;
106	#endif	108	#endif
107	#if defined(ia64)	109	#if defined(ia64)
108	case CMD_IA64_GETCHAR:	110	case CMD_IA64_GETCHAR:
109	IPC_SET_ARG2(call->data, _getc(&ski_uconsole));	111	dstval = _getc(&ski_uconsole);
110	break;	112	break;
111	#endif	113	#endif
112	#if defined(ppc32)	114	#if defined(ppc32)
113	case CMD_PPC32_GETCHAR:	115	case CMD_PPC32_GETCHAR:
114	IPC_SET_ARG2(call->data, cuda_get_scancode());	116	dstval = cuda_get_scancode();
115	break;	117	break;
116	#endif	118	#endif
117	default:	119	default:
118	break;	120	break;
119	}	121	}
-		122	if (code->cmds[i].dstarg && code->cmds[i].dstarg < 4) {
-		123	call->data.args[code->cmds[i].dstarg] = dstval;
-		124	}
120	}	125	}
121	}	126	}
122		127
123	static void code_free(irq_code_t *code)	128	static void code_free(irq_code_t *code)
124	{	129	{
125	if (code) {	130	if (code) {
126	free(code->cmds);	131	free(code->cmds);
127	free(code);	132	free(code);
128	}	133	}
129	}	134	}
130		135
131	static irq_code_t * code_from_uspace(irq_code_t *ucode)	136	static irq_code_t * code_from_uspace(irq_code_t *ucode)
132	{	137	{
133	irq_code_t *code;	138	irq_code_t *code;
134	irq_cmd_t *ucmds;	139	irq_cmd_t *ucmds;
135	int rc;	140	int rc;
136		141
137	code = malloc(sizeof(*code), 0);	142	code = malloc(sizeof(*code), 0);
138	rc = copy_from_uspace(code, ucode, sizeof(*code));	143	rc = copy_from_uspace(code, ucode, sizeof(*code));
139	if (rc != 0) {	144	if (rc != 0) {
140	free(code);	145	free(code);
141	return NULL;	146	return NULL;
142	}	147	}
143		148
144	if (code->cmdcount > IRQ_MAX_PROG_SIZE) {	149	if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
145	free(code);	150	free(code);
146	return NULL;	151	return NULL;
147	}	152	}
148	ucmds = code->cmds;	153	ucmds = code->cmds;
149	code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);	154	code->cmds = malloc(sizeof(code->cmds[0]) * (code->cmdcount), 0);
150	rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));	155	rc = copy_from_uspace(code->cmds, ucmds, sizeof(code->cmds[0]) * (code->cmdcount));
151	if (rc != 0) {	156	if (rc != 0) {
152	free(code->cmds);	157	free(code->cmds);
153	free(code);	158	free(code);
154	return NULL;	159	return NULL;
155	}	160	}
156		161
157	return code;	162	return code;
158	}	163	}
159		164
160	/** Unregister task from irq */	165	/** Unregister task from irq */
161	void ipc_irq_unregister(answerbox_t *box, int irq)	166	void ipc_irq_unregister(answerbox_t *box, int irq)
162	{	167	{
163	ipl_t ipl;	168	ipl_t ipl;
164	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;	169	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
165		170
166	ipl = interrupts_disable();	171	ipl = interrupts_disable();
167	spinlock_lock(&irq_conns[mq].lock);	172	spinlock_lock(&irq_conns[mq].lock);
168	if (irq_conns[mq].box == box) {	173	if (irq_conns[mq].box == box) {
169	irq_conns[mq].box = NULL;	174	irq_conns[mq].box = NULL;
170	code_free(irq_conns[mq].code);	175	code_free(irq_conns[mq].code);
171	irq_conns[mq].code = NULL;	176	irq_conns[mq].code = NULL;
172	}	177	}
173		178
174	spinlock_unlock(&irq_conns[mq].lock);	179	spinlock_unlock(&irq_conns[mq].lock);
175	interrupts_restore(ipl);	180	interrupts_restore(ipl);
176	}	181	}
177		182
178	/** Register an answerbox as a receiving end of interrupts notifications */	183	/** Register an answerbox as a receiving end of interrupts notifications */
179	int ipc_irq_register(answerbox_t box, int irq, irq_code_t ucode)	184	int ipc_irq_register(answerbox_t box, int irq, irq_code_t ucode)
180	{	185	{
181	ipl_t ipl;	186	ipl_t ipl;
182	irq_code_t *code;	187	irq_code_t *code;
183	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;	188	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
184		189
185	ASSERT(irq_conns);	190	ASSERT(irq_conns);
186		191
187	if (ucode) {	192	if (ucode) {
188	code = code_from_uspace(ucode);	193	code = code_from_uspace(ucode);
189	if (!code)	194	if (!code)
190	return EBADMEM;	195	return EBADMEM;
191	} else	196	} else
192	code = NULL;	197	code = NULL;
193		198
194	ipl = interrupts_disable();	199	ipl = interrupts_disable();
195	spinlock_lock(&irq_conns[mq].lock);	200	spinlock_lock(&irq_conns[mq].lock);
196		201
197	if (irq_conns[mq].box) {	202	if (irq_conns[mq].box) {
198	spinlock_unlock(&irq_conns[mq].lock);	203	spinlock_unlock(&irq_conns[mq].lock);
199	interrupts_restore(ipl);	204	interrupts_restore(ipl);
200	code_free(code);	205	code_free(code);
201	return EEXISTS;	206	return EEXISTS;
202	}	207	}
203	irq_conns[mq].box = box;	208	irq_conns[mq].box = box;
204	irq_conns[mq].code = code;	209	irq_conns[mq].code = code;
205	atomic_set(&irq_conns[mq].counter, 0);	210	atomic_set(&irq_conns[mq].counter, 0);
206	spinlock_unlock(&irq_conns[mq].lock);	211	spinlock_unlock(&irq_conns[mq].lock);
207	interrupts_restore(ipl);	212	interrupts_restore(ipl);
208		213
209	return 0;	214	return 0;
210	}	215	}
211		216
212	/** Add call to proper answerbox queue	217	/** Add call to proper answerbox queue
213	*	218	*
214	* Assume irq_conns[mq].lock is locked */	219	* Assume irq_conns[mq].lock is locked */
215	static void send_call(int mq, call_t *call)	220	static void send_call(int mq, call_t *call)
216	{	221	{
217	spinlock_lock(&irq_conns[mq].box->irq_lock);	222	spinlock_lock(&irq_conns[mq].box->irq_lock);
218	list_append(&call->link, &irq_conns[mq].box->irq_notifs);	223	list_append(&call->link, &irq_conns[mq].box->irq_notifs);
219	spinlock_unlock(&irq_conns[mq].box->irq_lock);	224	spinlock_unlock(&irq_conns[mq].box->irq_lock);
220		225
221	waitq_wakeup(&irq_conns[mq].box->wq, 0);	226	waitq_wakeup(&irq_conns[mq].box->wq, 0);
222	}	227	}
223		228
224	/** Send notification message	229	/** Send notification message
225	*	230	*
226	*/	231	*/
227	void ipc_irq_send_msg(int irq, __native a2, __native a3)	232	void ipc_irq_send_msg(int irq, __native a1, __native a2, __native a3)
228	{	233	{
229	call_t *call;	234	call_t *call;
230	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;	235	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
231		236
232	spinlock_lock(&irq_conns[mq].lock);	237	spinlock_lock(&irq_conns[mq].lock);
233		238
234	if (irq_conns[mq].box) {	239	if (irq_conns[mq].box) {
235	call = ipc_call_alloc(FRAME_ATOMIC);	240	call = ipc_call_alloc(FRAME_ATOMIC);
236	if (!call) {	241	if (!call) {
237	spinlock_unlock(&irq_conns[mq].lock);	242	spinlock_unlock(&irq_conns[mq].lock);
238	return;	243	return;
239	}	244	}
240	call->flags \|= IPC_CALL_NOTIF;	245	call->flags \|= IPC_CALL_NOTIF;
241	IPC_SET_METHOD(call->data, IPC_M_INTERRUPT);	246	IPC_SET_METHOD(call->data, irq);
242	IPC_SET_ARG1(call->data, irq);	247	IPC_SET_ARG1(call->data, a1);
243	IPC_SET_ARG2(call->data, a2);	248	IPC_SET_ARG2(call->data, a2);
244	IPC_SET_ARG3(call->data, a3);	249	IPC_SET_ARG3(call->data, a3);
-		250	/* Put a counter to the message */
-		251	call->private = atomic_preinc(&irq_conns[mq].counter);
245		252
246	send_call(mq, call);	253	send_call(mq, call);
247	}	254	}
248	spinlock_unlock(&irq_conns[mq].lock);	255	spinlock_unlock(&irq_conns[mq].lock);
249	}	256	}
250		257
251	/** Notify process that an irq had happend	258	/** Notify process that an irq had happend
252	*	259	*
253	* We expect interrupts to be disabled	260	* We expect interrupts to be disabled
254	*/	261	*/
255	void ipc_irq_send_notif(int irq)	262	void ipc_irq_send_notif(int irq)
256	{	263	{
257	call_t *call;	264	call_t *call;
258	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;	265	int mq = irq + IPC_IRQ_RESERVED_VIRTUAL;
259		266
260	ASSERT(irq_conns);	267	ASSERT(irq_conns);
261	spinlock_lock(&irq_conns[mq].lock);	268	spinlock_lock(&irq_conns[mq].lock);
262		269
263	if (irq_conns[mq].box) {	270	if (irq_conns[mq].box) {
264	call = ipc_call_alloc(FRAME_ATOMIC);	271	call = ipc_call_alloc(FRAME_ATOMIC);
265	if (!call) {	272	if (!call) {
266	spinlock_unlock(&irq_conns[mq].lock);	273	spinlock_unlock(&irq_conns[mq].lock);
267	return;	274	return;
268	}	275	}
269	call->flags \|= IPC_CALL_NOTIF;	276	call->flags \|= IPC_CALL_NOTIF;
-		277	/* Put a counter to the message */
270	IPC_SET_METHOD(call->data, IPC_M_INTERRUPT);	278	call->private = atomic_preinc(&irq_conns[mq].counter);
271	IPC_SET_ARG1(call->data, irq);	279	/* Set up args */
272	IPC_SET_ARG3(call->data, atomic_preinc(&irq_conns[mq].counter));	280	IPC_SET_METHOD(call->data, irq);
273		281
274	/* Execute code to handle irq */	282	/* Execute code to handle irq */
275	code_execute(call, irq_conns[mq].code);	283	code_execute(call, irq_conns[mq].code);
276		284
277	send_call(mq, call);	285	send_call(mq, call);
278	}	286	}
279		287
280	spinlock_unlock(&irq_conns[mq].lock);	288	spinlock_unlock(&irq_conns[mq].lock);
281	}	289	}
282		290
283		291
284	/** Initialize table of interrupt handlers	292	/** Initialize table of interrupt handlers
285	*	293	*
286	* @param irqcount Count of required hardware IRQs to be supported	294	* @param irqcount Count of required hardware IRQs to be supported
287	*/	295	*/
288	void ipc_irq_make_table(int irqcount)	296	void ipc_irq_make_table(int irqcount)
289	{	297	{
290	int i;	298	int i;
291		299
292	irqcount += IPC_IRQ_RESERVED_VIRTUAL;	300	irqcount += IPC_IRQ_RESERVED_VIRTUAL;
293		301
294	irq_conns_size = irqcount;	302	irq_conns_size = irqcount;
295	irq_conns = malloc(irqcount * (sizeof(*irq_conns)), 0);	303	irq_conns = malloc(irqcount * (sizeof(*irq_conns)), 0);
296	for (i=0; i < irqcount; i++) {	304	for (i=0; i < irqcount; i++) {
297	spinlock_initialize(&irq_conns[i].lock, "irq_ipc_lock");	305	spinlock_initialize(&irq_conns[i].lock, "irq_ipc_lock");
298	irq_conns[i].box = NULL;	306	irq_conns[i].box = NULL;
299	irq_conns[i].code = NULL;	307	irq_conns[i].code = NULL;
300	}	308	}
301	}	309	}
302		310
303	/** Disconnect all irq's notifications	311	/** Disconnect all irq's notifications
304	*	312	*
305	* TODO: It may be better to do some linked list, so that	313	* TODO: It may be better to do some linked list, so that
306	* we wouldn't need to go through whole array every cleanup	314	* we wouldn't need to go through whole array every cleanup
307	*/	315	*/
308	void ipc_irq_cleanup(answerbox_t *box)	316	void ipc_irq_cleanup(answerbox_t *box)
309	{	317	{
310	int i;	318	int i;
311	ipl_t ipl;	319	ipl_t ipl;
312		320
313	for (i=0; i < irq_conns_size; i++) {	321	for (i=0; i < irq_conns_size; i++) {
314	ipl = interrupts_disable();	322	ipl = interrupts_disable();
315	spinlock_lock(&irq_conns[i].lock);	323	spinlock_lock(&irq_conns[i].lock);
316	if (irq_conns[i].box == box)	324	if (irq_conns[i].box == box)
317	irq_conns[i].box = NULL;	325	irq_conns[i].box = NULL;
318	spinlock_unlock(&irq_conns[i].lock);	326	spinlock_unlock(&irq_conns[i].lock);
319	interrupts_restore(ipl);	327	interrupts_restore(ipl);
320	}	328	}
321	}	329	}
322		330

Subversion Repositories HelenOS

(root)/kernel/trunk/generic/src/ipc/irq.c – Rev 1628 → 1693