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Rev 3675 Rev 4377
Line 40... Line 40...
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#include <mm/page.h>
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#include <mm/page.h>
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#include <mm/slab.h>
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#include <mm/slab.h>
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#include <arch/types.h>
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#include <arch/types.h>
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#include <debug.h>
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#include <debug.h>
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#include <print.h>
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#include <print.h>
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#include <func.h>
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#include <string.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <sysinfo/sysinfo.h>
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#define SABRE_INTERNAL_REG  0
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#define SABRE_INTERNAL_REG  0
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#define PSYCHO_INTERNAL_REG 2   
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#define PSYCHO_INTERNAL_REG 2   
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#define OBIO_IMR_BASE   0x200
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#define OBIO_IMR_BASE   0x200
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    pci->model = PCI_SABRE;
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    pci->model = PCI_SABRE;
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    pci->op = &pci_sabre_ops;
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    pci->op = &pci_sabre_ops;
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    pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
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    pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
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    /*
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     * Set sysinfo data needed by the uspace OBIO driver.
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     */
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    sysinfo_set_item_val("obio.base.physical", NULL, paddr);
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    sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
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    return pci;
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    return pci;
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}
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}
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/** Initialize the Psycho PCI controller.
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/** Initialize the Psycho PCI controller.
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    pci->model = PCI_PSYCHO;
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    pci->model = PCI_PSYCHO;
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    pci->op = &pci_psycho_ops;
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    pci->op = &pci_psycho_ops;
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    pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
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    pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
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    /*
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     * Set sysinfo data needed by the uspace OBIO driver.
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     */
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    sysinfo_set_item_val("obio.base.physical", NULL, paddr);
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    sysinfo_set_item_val("kbd.cir.obio", NULL, 1);
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    return pci;
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    return pci;
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}
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}
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void obio_enable_interrupt(pci_t *pci, int inr)
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void obio_enable_interrupt(pci_t *pci, int inr)
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{
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{
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    ofw_tree_property_t *prop;
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    ofw_tree_property_t *prop;
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    /*
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    /*
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     * First, verify this is a PCI node.
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     * First, verify this is a PCI node.
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     */
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     */
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    ASSERT(strcmp(ofw_tree_node_name(node), "pci") == 0);
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    ASSERT(str_cmp(ofw_tree_node_name(node), "pci") == 0);
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    /*
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    /*
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     * Determine PCI controller model.
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     * Determine PCI controller model.
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     */
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     */
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    prop = ofw_tree_getprop(node, "model");
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    prop = ofw_tree_getprop(node, "model");
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    if (!prop || !prop->value)
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    if (!prop || !prop->value)
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        return NULL;
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        return NULL;
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    if (strcmp(prop->value, "SUNW,sabre") == 0) {
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    if (str_cmp(prop->value, "SUNW,sabre") == 0) {
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        /*
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        /*
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         * PCI controller Sabre.
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         * PCI controller Sabre.
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         * This model is found on UltraSPARC IIi based machines.
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         * This model is found on UltraSPARC IIi based machines.
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         */
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         */
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        return pci_sabre_init(node);
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        return pci_sabre_init(node);
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    } else if (strcmp(prop->value, "SUNW,psycho") == 0) {
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    } else if (str_cmp(prop->value, "SUNW,psycho") == 0) {
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        /*
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        /*
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         * PCI controller Psycho.
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         * PCI controller Psycho.
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         * Used on UltraSPARC II based processors, for instance,
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         * Used on UltraSPARC II based processors, for instance,
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         * on Ultra 60.
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         * on Ultra 60.
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         */
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         */