WebSVN – HelenOS – Diff – /branches/tracing/kernel/arch/mips32/src/mm/frame.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32mm
 * @{
 */
/** @file
 */
 
#include <macros.h>
#include <arch/mm/frame.h>
#include <arch/mm/tlb.h>
#include <interrupt.h>
#include <mm/frame.h>
#include <mm/asid.h>
#include <config.h>
#include <arch/drivers/msim.h>
#include <print.h>
 
#define ZERO_PAGE_MASK    TLB_PAGE_MASK_256K
#define ZERO_FRAMES       2048
#define ZERO_PAGE_WIDTH   18  /* 256K */
#define ZERO_PAGE_SIZE    (1 << ZERO_PAGE_WIDTH)
#define ZERO_PAGE_ASID    ASID_INVALID
#define ZERO_PAGE_TLBI    0
#define ZERO_PAGE_ADDR    0
#define ZERO_PAGE_OFFSET  (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
#define ZERO_PAGE_VALUE   (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
 
#define ZERO_PAGE_VALUE_KSEG1(frame) \
    (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
 
#define MAX_REGIONS  32
 
typedef struct {
    pfn_t start;
    pfn_t count;
} phys_region_t;
 
static size_t phys_regions_count = 0;
static phys_region_t phys_regions[MAX_REGIONS];
 
/** Check whether frame is available
 *
 * Returns true if given frame is generally available for use.
 * Returns false if given frame is used for physical memory
 * mapped devices and cannot be used.
 *
 */
static bool frame_available(pfn_t frame)
{
#ifdef MACHINE_msim
    /* MSIM device (dprinter) */
    if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
        return false;
   
    /* MSIM device (dkeyboard) */
    if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
        return false;
#endif
   
#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
    /* gxemul devices */
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
        0x10000000, MB2SIZE(256)))
        return false;
#endif
   
    return true;
}
 
 
/** Check whether frame is safe to write
 *
 * Returns true if given frame is safe for read/write test.
 * Returns false if given frame should not be touched.
 *
 */
static bool frame_safe(pfn_t frame)
{
    /* Kernel structures */
    if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
        return false;
   
    /* Kernel */
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
        KA2PA(config.base), config.kernel_size))
        return false;
   
    /* Kernel stack */
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
        KA2PA(config.stack_base), config.stack_size))
        return false;
   
    /* Init tasks */
    bool safe = true;
    size_t i;
    for (i = 0; i < init.cnt; i++)
        if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
            KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
            safe = false;
            break;
        }
   
    return safe;
}
 
static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
{
    if (end_frame > start_frame) {
        /* Convert 1M frames to 16K frames */
        pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
        pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
       
        /* Interrupt vector frame is blacklisted */
        pfn_t conf_frame;
        if (first == 0)
            conf_frame = 1;
        else
            conf_frame = first;
       
        zone_create(first, count, conf_frame, 0);
       
        if (phys_regions_count < MAX_REGIONS) {
            phys_regions[phys_regions_count].start = first;
            phys_regions[phys_regions_count].count = count;
            phys_regions_count++;
        }
    }
}
 
 
/** Create memory zones
 *
 * Walk through available 256 KB chunks of physical
 * memory and create zones.
 *
 * Note: It is assumed that the TLB is not yet being
 * used in any way, thus there is no interference.
 *
 */
void frame_arch_init(void)
{
    ipl_t ipl = interrupts_disable();
   
    /* Clear and initialize TLB */
    cp0_pagemask_write(ZERO_PAGE_MASK);
    cp0_entry_lo0_write(0);
    cp0_entry_lo1_write(0);
    cp0_entry_hi_write(0);
 
    size_t i;
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
        cp0_index_write(i);
        tlbwi();
    }
       
    pfn_t start_frame = 0;
    pfn_t frame;
    bool avail = true;
   
    /* Walk through all 1 MB frames */
    for (frame = 0; frame < ZERO_FRAMES; frame++) {
        if (!frame_available(frame))
            avail = false;
        else {
            if (frame_safe(frame)) {
                entry_lo_t lo0;
                entry_lo_t lo1;
                entry_hi_t hi;
                tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
                tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
                tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
               
                cp0_pagemask_write(ZERO_PAGE_MASK);
                cp0_entry_lo0_write(lo0.value);
                cp0_entry_lo1_write(lo1.value);
                cp0_entry_hi_write(hi.value);
                cp0_index_write(ZERO_PAGE_TLBI);
                tlbwi();
               
                ZERO_PAGE_VALUE = 0;
                if (ZERO_PAGE_VALUE != 0)
                    avail = false;
                else {
                    ZERO_PAGE_VALUE = 0xdeadbeef;
                    if (ZERO_PAGE_VALUE != 0xdeadbeef)
                        avail = false;
#if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
                    else {
                        ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
                        if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
                            avail = false;
                    }
#endif
                }
            }
        }
       
        if (!avail) {
            frame_add_region(start_frame, frame);
            start_frame = frame + 1;
            avail = true;
        }
    }
   
    frame_add_region(start_frame, frame);
   
    /* Blacklist interrupt vector frame */
    frame_mark_unavailable(0, 1);
   
    /* Cleanup */
    cp0_pagemask_write(ZERO_PAGE_MASK);
    cp0_entry_lo0_write(0);
    cp0_entry_lo1_write(0);
    cp0_entry_hi_write(0);
    cp0_index_write(ZERO_PAGE_TLBI);
    tlbwi();
   
    interrupts_restore(ipl);
}
 
 
void physmem_print(void)
{
    printf("Base       Size\n");
    printf("---------- ----------\n");
   
    size_t i;
    for (i = 0; i < phys_regions_count; i++) {
        printf("%#010x %10u\n",
            PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
    }  
}
 
/** @}
 */
 

Rev 4377	Rev 4692
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32mm	29	/** @addtogroup mips32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <macros.h>	35	#include <macros.h>
36	#include <arch/mm/frame.h>	36	#include <arch/mm/frame.h>
37	#include <arch/mm/tlb.h>	37	#include <arch/mm/tlb.h>
38	#include <interrupt.h>	38	#include <interrupt.h>
39	#include <mm/frame.h>	39	#include <mm/frame.h>
40	#include <mm/asid.h>	40	#include <mm/asid.h>
41	#include <config.h>	41	#include <config.h>
42	#include <arch/drivers/msim.h>	42	#include <arch/drivers/msim.h>
43	#include <print.h>	43	#include <print.h>
44		44
45	#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K	45	#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
46	#define ZERO_FRAMES 2048	46	#define ZERO_FRAMES 2048
47	#define ZERO_PAGE_WIDTH 18 /* 256K */	47	#define ZERO_PAGE_WIDTH 18 /* 256K */
48	#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)	48	#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
49	#define ZERO_PAGE_ASID ASID_INVALID	49	#define ZERO_PAGE_ASID ASID_INVALID
50	#define ZERO_PAGE_TLBI 0	50	#define ZERO_PAGE_TLBI 0
51	#define ZERO_PAGE_ADDR 0	51	#define ZERO_PAGE_ADDR 0
52	#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)	52	#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
53	#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])	53	#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
54		54
55	#define ZERO_PAGE_VALUE_KSEG1(frame) \	55	#define ZERO_PAGE_VALUE_KSEG1(frame) \
56	(((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])	56	(((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
57		57
58	#define MAX_REGIONS 32	58	#define MAX_REGIONS 32
59		59
60	typedef struct {	60	typedef struct {
61	pfn_t start;	61	pfn_t start;
62	pfn_t count;	62	pfn_t count;
63	} phys_region_t;	63	} phys_region_t;
64		64
65	static count_t phys_regions_count = 0;	65	static size_t phys_regions_count = 0;
66	static phys_region_t phys_regions[MAX_REGIONS];	66	static phys_region_t phys_regions[MAX_REGIONS];
67		67
68	/** Check whether frame is available	68	/** Check whether frame is available
69	*	69	*
70	* Returns true if given frame is generally available for use.	70	* Returns true if given frame is generally available for use.
71	* Returns false if given frame is used for physical memory	71	* Returns false if given frame is used for physical memory
72	* mapped devices and cannot be used.	72	* mapped devices and cannot be used.
73	*	73	*
74	*/	74	*/
75	static bool frame_available(pfn_t frame)	75	static bool frame_available(pfn_t frame)
76	{	76	{
77	#ifdef MACHINE_msim	77	#ifdef MACHINE_msim
78	/* MSIM device (dprinter) */	78	/* MSIM device (dprinter) */
79	if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))	79	if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
80	return false;	80	return false;
81		81
82	/* MSIM device (dkeyboard) */	82	/* MSIM device (dkeyboard) */
83	if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))	83	if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
84	return false;	84	return false;
85	#endif	85	#endif
86		86
87	#if defined(MACHINE_lgxemul) \|\| defined(MACHINE_bgxemul)	87	#if defined(MACHINE_lgxemul) \|\| defined(MACHINE_bgxemul)
88	/* gxemul devices */	88	/* gxemul devices */
89	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	89	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
90	0x10000000, MB2SIZE(256)))	90	0x10000000, MB2SIZE(256)))
91	return false;	91	return false;
92	#endif	92	#endif
93		93
94	return true;	94	return true;
95	}	95	}
96		96
97		97
98	/** Check whether frame is safe to write	98	/** Check whether frame is safe to write
99	*	99	*
100	* Returns true if given frame is safe for read/write test.	100	* Returns true if given frame is safe for read/write test.
101	* Returns false if given frame should not be touched.	101	* Returns false if given frame should not be touched.
102	*	102	*
103	*/	103	*/
104	static bool frame_safe(pfn_t frame)	104	static bool frame_safe(pfn_t frame)
105	{	105	{
106	/* Kernel structures */	106	/* Kernel structures */
107	if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))	107	if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
108	return false;	108	return false;
109		109
110	/* Kernel */	110	/* Kernel */
111	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	111	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
112	KA2PA(config.base), config.kernel_size))	112	KA2PA(config.base), config.kernel_size))
113	return false;	113	return false;
114		114
115	/* Kernel stack */	115	/* Kernel stack */
116	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	116	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
117	KA2PA(config.stack_base), config.stack_size))	117	KA2PA(config.stack_base), config.stack_size))
118	return false;	118	return false;
119		119
120	/* Init tasks */	120	/* Init tasks */
121	bool safe = true;	121	bool safe = true;
122	count_t i;	122	size_t i;
123	for (i = 0; i < init.cnt; i++)	123	for (i = 0; i < init.cnt; i++)
124	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	124	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
125	KA2PA(init.tasks[i].addr), init.tasks[i].size)) {	125	KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
126	safe = false;	126	safe = false;
127	break;	127	break;
128	}	128	}
129		129
130	return safe;	130	return safe;
131	}	131	}
132		132
133	static void frame_add_region(pfn_t start_frame, pfn_t end_frame)	133	static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
134	{	134	{
135	if (end_frame > start_frame) {	135	if (end_frame > start_frame) {
136	/* Convert 1M frames to 16K frames */	136	/* Convert 1M frames to 16K frames */
137	pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);	137	pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
138	pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);	138	pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
139		139
140	/* Interrupt vector frame is blacklisted */	140	/* Interrupt vector frame is blacklisted */
141	pfn_t conf_frame;	141	pfn_t conf_frame;
142	if (first == 0)	142	if (first == 0)
143	conf_frame = 1;	143	conf_frame = 1;
144	else	144	else
145	conf_frame = first;	145	conf_frame = first;
146		146
147	zone_create(first, count, conf_frame, 0);	147	zone_create(first, count, conf_frame, 0);
148		148
149	if (phys_regions_count < MAX_REGIONS) {	149	if (phys_regions_count < MAX_REGIONS) {
150	phys_regions[phys_regions_count].start = first;	150	phys_regions[phys_regions_count].start = first;
151	phys_regions[phys_regions_count].count = count;	151	phys_regions[phys_regions_count].count = count;
152	phys_regions_count++;	152	phys_regions_count++;
153	}	153	}
154	}	154	}
155	}	155	}
156		156
157		157
158	/** Create memory zones	158	/** Create memory zones
159	*	159	*
160	* Walk through available 256 KB chunks of physical	160	* Walk through available 256 KB chunks of physical
161	* memory and create zones.	161	* memory and create zones.
162	*	162	*
163	* Note: It is assumed that the TLB is not yet being	163	* Note: It is assumed that the TLB is not yet being
164	* used in any way, thus there is no interference.	164	* used in any way, thus there is no interference.
165	*	165	*
166	*/	166	*/
167	void frame_arch_init(void)	167	void frame_arch_init(void)
168	{	168	{
169	ipl_t ipl = interrupts_disable();	169	ipl_t ipl = interrupts_disable();
170		170
171	/* Clear and initialize TLB */	171	/* Clear and initialize TLB */
172	cp0_pagemask_write(ZERO_PAGE_MASK);	172	cp0_pagemask_write(ZERO_PAGE_MASK);
173	cp0_entry_lo0_write(0);	173	cp0_entry_lo0_write(0);
174	cp0_entry_lo1_write(0);	174	cp0_entry_lo1_write(0);
175	cp0_entry_hi_write(0);	175	cp0_entry_hi_write(0);
176		176
177	count_t i;	177	size_t i;
178	for (i = 0; i < TLB_ENTRY_COUNT; i++) {	178	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
179	cp0_index_write(i);	179	cp0_index_write(i);
180	tlbwi();	180	tlbwi();
181	}	181	}
182		182
183	pfn_t start_frame = 0;	183	pfn_t start_frame = 0;
184	pfn_t frame;	184	pfn_t frame;
185	bool avail = true;	185	bool avail = true;
186		186
187	/* Walk through all 1 MB frames */	187	/* Walk through all 1 MB frames */
188	for (frame = 0; frame < ZERO_FRAMES; frame++) {	188	for (frame = 0; frame < ZERO_FRAMES; frame++) {
189	if (!frame_available(frame))	189	if (!frame_available(frame))
190	avail = false;	190	avail = false;
191	else {	191	else {
192	if (frame_safe(frame)) {	192	if (frame_safe(frame)) {
193	entry_lo_t lo0;	193	entry_lo_t lo0;
194	entry_lo_t lo1;	194	entry_lo_t lo1;
195	entry_hi_t hi;	195	entry_hi_t hi;
196	tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));	196	tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
197	tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);	197	tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
198	tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);	198	tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
199		199
200	cp0_pagemask_write(ZERO_PAGE_MASK);	200	cp0_pagemask_write(ZERO_PAGE_MASK);
201	cp0_entry_lo0_write(lo0.value);	201	cp0_entry_lo0_write(lo0.value);
202	cp0_entry_lo1_write(lo1.value);	202	cp0_entry_lo1_write(lo1.value);
203	cp0_entry_hi_write(hi.value);	203	cp0_entry_hi_write(hi.value);
204	cp0_index_write(ZERO_PAGE_TLBI);	204	cp0_index_write(ZERO_PAGE_TLBI);
205	tlbwi();	205	tlbwi();
206		206
207	ZERO_PAGE_VALUE = 0;	207	ZERO_PAGE_VALUE = 0;
208	if (ZERO_PAGE_VALUE != 0)	208	if (ZERO_PAGE_VALUE != 0)
209	avail = false;	209	avail = false;
210	else {	210	else {
211	ZERO_PAGE_VALUE = 0xdeadbeef;	211	ZERO_PAGE_VALUE = 0xdeadbeef;
212	if (ZERO_PAGE_VALUE != 0xdeadbeef)	212	if (ZERO_PAGE_VALUE != 0xdeadbeef)
213	avail = false;	213	avail = false;
214	#if defined(MACHINE_lgxemul) \|\| defined(MACHINE_bgxemul)	214	#if defined(MACHINE_lgxemul) \|\| defined(MACHINE_bgxemul)
215	else {	215	else {
216	ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;	216	ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
217	if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)	217	if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
218	avail = false;	218	avail = false;
219	}	219	}
220	#endif	220	#endif
221	}	221	}
222	}	222	}
223	}	223	}
224		224
225	if (!avail) {	225	if (!avail) {
226	frame_add_region(start_frame, frame);	226	frame_add_region(start_frame, frame);
227	start_frame = frame + 1;	227	start_frame = frame + 1;
228	avail = true;	228	avail = true;
229	}	229	}
230	}	230	}
231		231
232	frame_add_region(start_frame, frame);	232	frame_add_region(start_frame, frame);
233		233
234	/* Blacklist interrupt vector frame */	234	/* Blacklist interrupt vector frame */
235	frame_mark_unavailable(0, 1);	235	frame_mark_unavailable(0, 1);
236		236
237	/* Cleanup */	237	/* Cleanup */
238	cp0_pagemask_write(ZERO_PAGE_MASK);	238	cp0_pagemask_write(ZERO_PAGE_MASK);
239	cp0_entry_lo0_write(0);	239	cp0_entry_lo0_write(0);
240	cp0_entry_lo1_write(0);	240	cp0_entry_lo1_write(0);
241	cp0_entry_hi_write(0);	241	cp0_entry_hi_write(0);
242	cp0_index_write(ZERO_PAGE_TLBI);	242	cp0_index_write(ZERO_PAGE_TLBI);
243	tlbwi();	243	tlbwi();
244		244
245	interrupts_restore(ipl);	245	interrupts_restore(ipl);
246	}	246	}
247		247
248		248
249	void physmem_print(void)	249	void physmem_print(void)
250	{	250	{
251	printf("Base Size\n");	251	printf("Base Size\n");
252	printf("---------- ----------\n");	252	printf("---------- ----------\n");
253		253
254	count_t i;	254	size_t i;
255	for (i = 0; i < phys_regions_count; i++) {	255	for (i = 0; i < phys_regions_count; i++) {
256	printf("%#010x %10u\n",	256	printf("%#010x %10u\n",
257	PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));	257	PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
258	}	258	}
259	}	259	}
260		260
261	/** @}	261	/** @}
262	*/	262	*/
263		263

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(root)/branches/tracing/kernel/arch/mips32/src/mm/frame.c – Rev 4377 → 4692