Subversion Repositories HelenOS

Rev

Rev 3597 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 3597 Rev 4377
Line 25... Line 25...
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28
 */
28
 */
29
 
29
 
30
/** @addtogroup ia64mm 
30
/** @addtogroup ia64mm
31
 * @{
31
 * @{
32
 */
32
 */
33
/** @file
33
/** @file
34
 */
34
 */
35
 
35
 
Line 61... Line 61...
61
 
61
 
62
/** Initialize VHPT and region registers. */
62
/** Initialize VHPT and region registers. */
63
void set_environment(void)
63
void set_environment(void)
64
{
64
{
65
    region_register rr;
65
    region_register rr;
66
    pta_register pta;  
66
    pta_register pta;
67
    int i;
67
    int i;
68
#ifdef CONFIG_VHPT  
68
#ifdef CONFIG_VHPT
69
    uintptr_t vhpt_base;
69
    uintptr_t vhpt_base;
70
#endif
70
#endif
71
 
71
 
72
    /*
72
    /*
73
     * First set up kernel region register.
73
     * First set up kernel region register.
Line 121... Line 121...
121
 
121
 
122
/** Calculate address of collision chain from VPN and ASID.
122
/** Calculate address of collision chain from VPN and ASID.
123
 *
123
 *
124
 * Interrupts must be disabled.
124
 * Interrupts must be disabled.
125
 *
125
 *
126
 * @param page Address of virtual page including VRN bits.
126
 * @param page      Address of virtual page including VRN bits.
127
 * @param asid Address space identifier.
127
 * @param asid      Address space identifier.
128
 *
128
 *
129
 * @return VHPT entry address.
129
 * @return      VHPT entry address.
130
 */
130
 */
131
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
131
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
132
{
132
{
133
    region_register rr_save, rr;
133
    region_register rr_save, rr;
134
    index_t vrn;
134
    index_t vrn;
Line 165... Line 165...
165
 
165
 
166
/** Compare ASID and VPN against PTE.
166
/** Compare ASID and VPN against PTE.
167
 *
167
 *
168
 * Interrupts must be disabled.
168
 * Interrupts must be disabled.
169
 *
169
 *
170
 * @param page Address of virtual page including VRN bits.
170
 * @param page      Address of virtual page including VRN bits.
171
 * @param asid Address space identifier.
171
 * @param asid      Address space identifier.
172
 *
172
 *
173
 * @return True if page and asid match the page and asid of t, false otherwise.
173
 * @return      True if page and asid match the page and asid of t,
-
 
174
 *          false otherwise.
174
 */
175
 */
175
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
176
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
176
{
177
{
177
    region_register rr_save, rr;   
178
    region_register rr_save, rr;   
178
    index_t vrn;
179
    index_t vrn;
Line 209... Line 210...
209
}
210
}
210
 
211
 
211
/** Set up one VHPT entry.
212
/** Set up one VHPT entry.
212
 *
213
 *
213
 * @param v VHPT entry to be set up.
214
 * @param v VHPT entry to be set up.
214
 * @param page Virtual address of the page mapped by the entry.
215
 * @param page      Virtual address of the page mapped by the entry.
215
 * @param asid Address space identifier of the address space to which page belongs.
216
 * @param asid      Address space identifier of the address space to which
-
 
217
 *          page belongs.
216
 * @param frame Physical address of the frame to wich page is mapped.
218
 * @param frame     Physical address of the frame to wich page is mapped.
217
 * @param flags Different flags for the mapping.
219
 * @param flags     Different flags for the mapping.
218
 */
220
 */
-
 
221
void
219
void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags)
222
vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
-
 
223
    int flags)
220
{
224
{
221
    region_register rr_save, rr;   
225
    region_register rr_save, rr;   
222
    index_t vrn;
226
    index_t vrn;
223
    rid_t rid;
227
    rid_t rid;
224
    uint64_t tag;
228
    uint64_t tag;
Line 248... Line 252...
248
    v->word[1] = 0;
252
    v->word[1] = 0;
249
    v->word[2] = 0;
253
    v->word[2] = 0;
250
    v->word[3] = 0;
254
    v->word[3] = 0;
251
   
255
   
252
    v->present.p = true;
256
    v->present.p = true;
253
    v->present.ma = (flags & PAGE_CACHEABLE) ? MA_WRITEBACK : MA_UNCACHEABLE;
257
    v->present.ma = (flags & PAGE_CACHEABLE) ?
-
 
258
        MA_WRITEBACK : MA_UNCACHEABLE;
254
    v->present.a = false;   /* not accessed */
259
    v->present.a = false;   /* not accessed */
255
    v->present.d = false;   /* not dirty */
260
    v->present.d = false;   /* not dirty */
256
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
261
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
257
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
262
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
258
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
263
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
Line 261... Line 266...
261
    v->present.ps = PAGE_WIDTH;
266
    v->present.ps = PAGE_WIDTH;
262
    v->present.key = 0;
267
    v->present.key = 0;
263
    v->present.tag.tag_word = tag;
268
    v->present.tag.tag_word = tag;
264
}
269
}
265
 
270
 
266
extern uintptr_t last_frame;
-
 
267
 
-
 
268
 
-
 
269
uintptr_t hw_map(uintptr_t physaddr, size_t size)
271
uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
270
{
272
{
271
    if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-
 
272
        panic("Unable to map physical memory %p (%d bytes)", physaddr, size)
-
 
273
   
-
 
274
    uintptr_t virtaddr = PA2KA(last_frame);
-
 
275
    pfn_t i;
-
 
276
    for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++) {
-
 
277
        uintptr_t addr = PFN2ADDR(i);
273
    /* THIS is a dirty hack. */
278
        page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr, PAGE_NOT_CACHEABLE | PAGE_WRITE);
-
 
279
    }
-
 
280
   
-
 
281
    last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
274
    return (uintptr_t)((uint64_t)(PA2KA(physaddr)) + VIO_OFFSET);
282
   
-
 
283
    return virtaddr;
-
 
284
}
275
}
285
 
276
 
286
 
-
 
287
 
-
 
288
/** @}
277
/** @}
289
 */
278
 */