WebSVN – HelenOS – Diff – /branches/tracing/kernel/arch/ia32/src/smp/mps.c


/*
 * Copyright (c) 2008 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia32   
 * @{
 */
/** @file
 */
 
#ifdef CONFIG_SMP
 
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
 
/*
 * MultiProcessor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
static int mps_fs_check(uint8_t *base);
static int mps_ct_check(void);
 
static int configure_via_ct(void);
static int configure_via_default(uint8_t n);
 
static int ct_processor_entry(struct __processor_entry *pr);
static void ct_bus_entry(struct __bus_entry *bus);
static void ct_io_apic_entry(struct __io_apic_entry *ioa);
static void ct_io_intr_entry(struct __io_intr_entry *iointr);
static void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
static void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
unsigned int processor_entry_cnt = 0;
unsigned int bus_entry_cnt = 0;
unsigned int io_apic_entry_cnt = 0;
unsigned int io_intr_entry_cnt = 0;
unsigned int l_intr_entry_cnt = 0;
 
/*
 * Implementation of IA-32 SMP configuration interface.
 */
static size_t get_cpu_count(void);
static bool is_cpu_enabled(size_t i);
static bool is_bsp(size_t i);
static uint8_t get_cpu_apic_id(size_t i);
static int mps_irq_to_pin(unsigned int irq);
 
struct smp_config_operations mps_config_operations = {
    .cpu_count = get_cpu_count,
    .cpu_enabled = is_cpu_enabled,
    .cpu_bootstrap = is_bsp,
    .cpu_apic_id = get_cpu_apic_id,
    .irq_to_pin = mps_irq_to_pin
};
 
size_t get_cpu_count(void)
{
    return processor_entry_cnt;
}
 
bool is_cpu_enabled(size_t i)
{
    ASSERT(i < processor_entry_cnt);
    return (bool) ((processor_entries[i].cpu_flags & 0x01) == 0x01);
}
 
bool is_bsp(size_t i)
{
    ASSERT(i < processor_entry_cnt);
    return (bool) ((processor_entries[i].cpu_flags & 0x02) == 0x02);
}
 
uint8_t get_cpu_apic_id(size_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].l_apic_id;
}
 
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mps_fs_check(uint8_t *base)
{
    unsigned int i;
    uint8_t sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum = (uint8_t) (sum + base[i]);
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mps_ct_check(void)
{
    uint8_t *base = (uint8_t *) ct;
    uint8_t *ext = base + ct->base_table_length;
    uint8_t sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i = 0,sum = 0; i < ct->base_table_length; i++)
        sum = (uint8_t) (sum + base[i]);
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i = 0, sum = 0; i < ct->ext_table_length; i++)
        sum = (uint8_t) (sum + ext[i]);
       
    return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
    uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) };
    unsigned int i, j, length[2] = { 1024, 64 * 1024 };
   
 
    /*
     * Find MP Floating Pointer Structure
     * 1a. search first 1K of EBDA
     * 1b. if EBDA is undefined, search last 1K of base memory
     *  2. search 64K starting at 0xf0000
     */
 
    addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024);
    for (i = 0; i < 2; i++) {
        for (j = 0; j < length[i]; j += 16) {
            if (*((uint32_t *) &addr[i][j]) ==
                FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
                fs = (struct mps_fs *) &addr[i][j];
                goto fs_found;
            }
        }
    }
 
    return;
   
fs_found:
    printf("%p: MPS Floating Pointer Structure\n", fs);
 
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("%s: PIC mode not supported\n", __func__);
            return;
        }
 
        ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    return;
}
 
int configure_via_ct(void)
{
    uint8_t *cur;
    unsigned int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("%s: bad ct->signature\n", __func__);
        return 1;
    }
    if (!mps_ct_check()) {
        printf("%s: bad ct checksum\n", __func__);
        return 1;
    }
    if (ct->oem_table) {
        printf("%s: ct->oem_table not supported\n", __func__);
        return 1;
    }
   
    l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i = 0; i < ct->entry_count; i++) {
        switch (*cur) {
        /* Processor entry */
        case 0:
            processor_entries = processor_entries ?
                processor_entries :
                (struct __processor_entry *) cur;
            processor_entry_cnt++;
            cnt += ct_processor_entry((struct __processor_entry *)
                cur);
            cur += 20;
            break;
 
        /* Bus entry */
        case 1:
            bus_entries = bus_entries ?
                bus_entries : (struct __bus_entry *) cur;
            bus_entry_cnt++;
            ct_bus_entry((struct __bus_entry *) cur);
            cur += 8;
            break;
               
        /* I/O Apic */
        case 2:
            io_apic_entries = io_apic_entries ?
                io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
            ct_io_apic_entry((struct __io_apic_entry *) cur);
            cur += 8;
            break;
               
        /* I/O Interrupt Assignment */
        case 3:
            io_intr_entries = io_intr_entries ?
                io_intr_entries : (struct __io_intr_entry *) cur;
            io_intr_entry_cnt++;
            ct_io_intr_entry((struct __io_intr_entry *) cur);
            cur += 8;
            break;
 
        /* Local Interrupt Assignment */
        case 4:
            l_intr_entries = l_intr_entries ?
                l_intr_entries : (struct __l_intr_entry *) cur;
            l_intr_entry_cnt++;
            ct_l_intr_entry((struct __l_intr_entry *) cur);
            cur += 8;
            break;
 
        default:
            /*
             * Something is wrong. Fallback to UP mode.
             */
 
            printf("%s: ct badness\n", __func__);
            return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(uint8_t n __attribute__((unused)))
{
    /*
     * Not yet implemented.
     */
    printf("%s: not supported\n", __func__);
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr __attribute__((unused)))
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1 << 0)) == 0)
        return 0;
   
    apic_id_mask |= (1 << pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus __attribute__((unused)))
{
#ifdef MPSCT_VERBOSE
    char buf[7];
    memcpy((void *) buf, (void *) bus->bus_type, 6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static unsigned int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if ((ioa->io_apic_flags & 1) == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr __attribute__((unused)))
{
#ifdef MPSCT_VERBOSE
    switch (iointr->intr_type) {
    case 0:
        printf("INT");
        break;
    case 1:
        printf("NMI");
        break;
    case 2:
        printf("SMI");
        break;
    case 3:
        printf("ExtINT");
        break;
    }
    putchar(',');
    switch (iointr->poel & 3) {
    case 0:
        printf("bus-like");
        break;
    case 1:
        printf("active high");
        break;
    case 2:
        printf("reserved");
        break;
    case 3:
        printf("active low");
        break;
    }
    putchar(',');
    switch ((iointr->poel >> 2) & 3) {
    case 0:
        printf("bus-like");
        break;
    case 1:
        printf("edge-triggered");
        break;
    case 2:
        printf("reserved");
        break;
    case 3:
        printf("level-triggered");
        break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id,
        iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr __attribute__((unused)))
{
#ifdef MPSCT_VERBOSE
    switch (lintr->intr_type) {
    case 0:
        printf("INT");
        break;
    case 1:
        printf("NMI");
        break;
    case 2:
        printf("SMI");
        break;
    case 3:
        printf("ExtINT");
        break;
    }
    putchar(',');
    switch (lintr->poel & 3) {
    case 0:
        printf("bus-like");
        break;
    case 1:
        printf("active high");
        break;
    case 2:
        printf("reserved");
        break;
    case 3:
        printf("active low");
        break;
    }
    putchar(',');
    switch ((lintr->poel >> 2) & 3) {
    case 0:
        printf("bus-like");
        break;
    case 1:
        printf("edge-triggered");
        break;
    case 2:
        printf("reserved");
        break;
    case 3:
        printf("level-triggered");
        break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    uint8_t *ext = (uint8_t *) ct + ct->base_table_length;
    uint8_t *cur;
 
    for (cur = ext; cur < ext + ct->ext_table_length;
        cur += cur[CT_EXT_ENTRY_LEN]) {
        switch (cur[CT_EXT_ENTRY_TYPE]) {
        default:
            printf("%p: skipping MP Configuration Table extended "
                "entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
            break;
        }
    }
}
 
int mps_irq_to_pin(unsigned int irq)
{
    unsigned int i;
   
    for (i = 0; i < io_intr_entry_cnt; i++) {
        if (io_intr_entries[i].src_bus_irq == irq &&
            io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* CONFIG_SMP */
 
/** @}
 */
 

Rev 2787	Rev 4692
1	/*	1	/*
2	* Copyright (c) 2008 Jakub Jermar	2	* Copyright (c) 2008 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32	29	/** @addtogroup ia32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifdef CONFIG_SMP	35	#ifdef CONFIG_SMP
36		36
37	#include <config.h>	37	#include <config.h>
38	#include <print.h>	38	#include <print.h>
39	#include <debug.h>	39	#include <debug.h>
40	#include <arch/smp/mps.h>	40	#include <arch/smp/mps.h>
41	#include <arch/smp/apic.h>	41	#include <arch/smp/apic.h>
42	#include <arch/smp/smp.h>	42	#include <arch/smp/smp.h>
43	#include <func.h>	43	#include <func.h>
44	#include <arch/types.h>	44	#include <arch/types.h>
45	#include <cpu.h>	45	#include <cpu.h>
46	#include <arch/asm.h>	46	#include <arch/asm.h>
47	#include <arch/bios/bios.h>	47	#include <arch/bios/bios.h>
48	#include <mm/frame.h>	48	#include <mm/frame.h>
49		49
50	/*	50	/*
51	* MultiProcessor Specification detection code.	51	* MultiProcessor Specification detection code.
52	*/	52	*/
53		53
54	#define FS_SIGNATURE 0x5f504d5f	54	#define FS_SIGNATURE 0x5f504d5f
55	#define CT_SIGNATURE 0x504d4350	55	#define CT_SIGNATURE 0x504d4350
56		56
57	static int mps_fs_check(uint8_t *base);	57	static int mps_fs_check(uint8_t *base);
58	static int mps_ct_check(void);	58	static int mps_ct_check(void);
59		59
60	static int configure_via_ct(void);	60	static int configure_via_ct(void);
61	static int configure_via_default(uint8_t n);	61	static int configure_via_default(uint8_t n);
62		62
63	static int ct_processor_entry(struct __processor_entry *pr);	63	static int ct_processor_entry(struct __processor_entry *pr);
64	static void ct_bus_entry(struct __bus_entry *bus);	64	static void ct_bus_entry(struct __bus_entry *bus);
65	static void ct_io_apic_entry(struct __io_apic_entry *ioa);	65	static void ct_io_apic_entry(struct __io_apic_entry *ioa);
66	static void ct_io_intr_entry(struct __io_intr_entry *iointr);	66	static void ct_io_intr_entry(struct __io_intr_entry *iointr);
67	static void ct_l_intr_entry(struct __l_intr_entry *lintr);	67	static void ct_l_intr_entry(struct __l_intr_entry *lintr);
68		68
69	static void ct_extended_entries(void);	69	static void ct_extended_entries(void);
70		70
71	static struct mps_fs *fs;	71	static struct mps_fs *fs;
72	static struct mps_ct *ct;	72	static struct mps_ct *ct;
73		73
74	struct __processor_entry *processor_entries = NULL;	74	struct __processor_entry *processor_entries = NULL;
75	struct __bus_entry *bus_entries = NULL;	75	struct __bus_entry *bus_entries = NULL;
76	struct __io_apic_entry *io_apic_entries = NULL;	76	struct __io_apic_entry *io_apic_entries = NULL;
77	struct __io_intr_entry *io_intr_entries = NULL;	77	struct __io_intr_entry *io_intr_entries = NULL;
78	struct __l_intr_entry *l_intr_entries = NULL;	78	struct __l_intr_entry *l_intr_entries = NULL;
79		79
80	unsigned int processor_entry_cnt = 0;	80	unsigned int processor_entry_cnt = 0;
81	unsigned int bus_entry_cnt = 0;	81	unsigned int bus_entry_cnt = 0;
82	unsigned int io_apic_entry_cnt = 0;	82	unsigned int io_apic_entry_cnt = 0;
83	unsigned int io_intr_entry_cnt = 0;	83	unsigned int io_intr_entry_cnt = 0;
84	unsigned int l_intr_entry_cnt = 0;	84	unsigned int l_intr_entry_cnt = 0;
85		85
86	/*	86	/*
87	* Implementation of IA-32 SMP configuration interface.	87	* Implementation of IA-32 SMP configuration interface.
88	*/	88	*/
89	static count_t get_cpu_count(void);	89	static size_t get_cpu_count(void);
90	static bool is_cpu_enabled(index_t i);	90	static bool is_cpu_enabled(size_t i);
91	static bool is_bsp(index_t i);	91	static bool is_bsp(size_t i);
92	static uint8_t get_cpu_apic_id(index_t i);	92	static uint8_t get_cpu_apic_id(size_t i);
93	static int mps_irq_to_pin(unsigned int irq);	93	static int mps_irq_to_pin(unsigned int irq);
94		94
95	struct smp_config_operations mps_config_operations = {	95	struct smp_config_operations mps_config_operations = {
96	.cpu_count = get_cpu_count,	96	.cpu_count = get_cpu_count,
97	.cpu_enabled = is_cpu_enabled,	97	.cpu_enabled = is_cpu_enabled,
98	.cpu_bootstrap = is_bsp,	98	.cpu_bootstrap = is_bsp,
99	.cpu_apic_id = get_cpu_apic_id,	99	.cpu_apic_id = get_cpu_apic_id,
100	.irq_to_pin = mps_irq_to_pin	100	.irq_to_pin = mps_irq_to_pin
101	};	101	};
102		102
103	count_t get_cpu_count(void)	103	size_t get_cpu_count(void)
104	{	104	{
105	return processor_entry_cnt;	105	return processor_entry_cnt;
106	}	106	}
107		107
108	bool is_cpu_enabled(index_t i)	108	bool is_cpu_enabled(size_t i)
109	{	109	{
110	ASSERT(i < processor_entry_cnt);	110	ASSERT(i < processor_entry_cnt);
111	return (bool) ((processor_entries[i].cpu_flags & 0x01) == 0x01);	111	return (bool) ((processor_entries[i].cpu_flags & 0x01) == 0x01);
112	}	112	}
113		113
114	bool is_bsp(index_t i)	114	bool is_bsp(size_t i)
115	{	115	{
116	ASSERT(i < processor_entry_cnt);	116	ASSERT(i < processor_entry_cnt);
117	return (bool) ((processor_entries[i].cpu_flags & 0x02) == 0x02);	117	return (bool) ((processor_entries[i].cpu_flags & 0x02) == 0x02);
118	}	118	}
119		119
120	uint8_t get_cpu_apic_id(index_t i)	120	uint8_t get_cpu_apic_id(size_t i)
121	{	121	{
122	ASSERT(i < processor_entry_cnt);	122	ASSERT(i < processor_entry_cnt);
123	return processor_entries[i].l_apic_id;	123	return processor_entries[i].l_apic_id;
124	}	124	}
125		125
126		126
127	/*	127	/*
128	* Used to check the integrity of the MP Floating Structure.	128	* Used to check the integrity of the MP Floating Structure.
129	*/	129	*/
130	int mps_fs_check(uint8_t *base)	130	int mps_fs_check(uint8_t *base)
131	{	131	{
132	unsigned int i;	132	unsigned int i;
133	uint8_t sum;	133	uint8_t sum;
134		134
135	for (i = 0, sum = 0; i < 16; i++)	135	for (i = 0, sum = 0; i < 16; i++)
136	sum = (uint8_t) (sum + base[i]);	136	sum = (uint8_t) (sum + base[i]);
137		137
138	return !sum;	138	return !sum;
139	}	139	}
140		140
141	/*	141	/*
142	* Used to check the integrity of the MP Configuration Table.	142	* Used to check the integrity of the MP Configuration Table.
143	*/	143	*/
144	int mps_ct_check(void)	144	int mps_ct_check(void)
145	{	145	{
146	uint8_t base = (uint8_t ) ct;	146	uint8_t base = (uint8_t ) ct;
147	uint8_t *ext = base + ct->base_table_length;	147	uint8_t *ext = base + ct->base_table_length;
148	uint8_t sum;	148	uint8_t sum;
149	int i;	149	int i;
150		150
151	/* count the checksum for the base table */	151	/* count the checksum for the base table */
152	for (i = 0,sum = 0; i < ct->base_table_length; i++)	152	for (i = 0,sum = 0; i < ct->base_table_length; i++)
153	sum = (uint8_t) (sum + base[i]);	153	sum = (uint8_t) (sum + base[i]);
154		154
155	if (sum)	155	if (sum)
156	return 0;	156	return 0;
157		157
158	/* count the checksum for the extended table */	158	/* count the checksum for the extended table */
159	for (i = 0, sum = 0; i < ct->ext_table_length; i++)	159	for (i = 0, sum = 0; i < ct->ext_table_length; i++)
160	sum = (uint8_t) (sum + ext[i]);	160	sum = (uint8_t) (sum + ext[i]);
161		161
162	return sum == ct->ext_table_checksum;	162	return sum == ct->ext_table_checksum;
163	}	163	}
164		164
165	void mps_init(void)	165	void mps_init(void)
166	{	166	{
167	uint8_t addr[2] = { NULL, (uint8_t ) PA2KA(0xf0000) };	167	uint8_t addr[2] = { NULL, (uint8_t ) PA2KA(0xf0000) };
168	unsigned int i, j, length[2] = { 1024, 64 * 1024 };	168	unsigned int i, j, length[2] = { 1024, 64 * 1024 };
169		169
170		170
171	/*	171	/*
172	* Find MP Floating Pointer Structure	172	* Find MP Floating Pointer Structure
173	* 1a. search first 1K of EBDA	173	* 1a. search first 1K of EBDA
174	* 1b. if EBDA is undefined, search last 1K of base memory	174	* 1b. if EBDA is undefined, search last 1K of base memory
175	* 2. search 64K starting at 0xf0000	175	* 2. search 64K starting at 0xf0000
176	*/	176	*/
177		177
178	addr[0] = (uint8_t ) PA2KA(ebda ? ebda : 639 1024);	178	addr[0] = (uint8_t ) PA2KA(ebda ? ebda : 639 1024);
179	for (i = 0; i < 2; i++) {	179	for (i = 0; i < 2; i++) {
180	for (j = 0; j < length[i]; j += 16) {	180	for (j = 0; j < length[i]; j += 16) {
181	if (((uint32_t ) &addr[i][j]) ==	181	if (((uint32_t ) &addr[i][j]) ==
182	FS_SIGNATURE && mps_fs_check(&addr[i][j])) {	182	FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
183	fs = (struct mps_fs *) &addr[i][j];	183	fs = (struct mps_fs *) &addr[i][j];
184	goto fs_found;	184	goto fs_found;
185	}	185	}
186	}	186	}
187	}	187	}
188		188
189	return;	189	return;
190		190
191	fs_found:	191	fs_found:
192	printf("%p: MPS Floating Pointer Structure\n", fs);	192	printf("%p: MPS Floating Pointer Structure\n", fs);
193		193
194	if (fs->config_type == 0 && fs->configuration_table) {	194	if (fs->config_type == 0 && fs->configuration_table) {
195	if (fs->mpfib2 >> 7) {	195	if (fs->mpfib2 >> 7) {
196	printf("%s: PIC mode not supported\n", __func__);	196	printf("%s: PIC mode not supported\n", __func__);
197	return;	197	return;
198	}	198	}
199		199
200	ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);	200	ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
201	config.cpu_count = configure_via_ct();	201	config.cpu_count = configure_via_ct();
202	}	202	}
203	else	203	else
204	config.cpu_count = configure_via_default(fs->config_type);	204	config.cpu_count = configure_via_default(fs->config_type);
205		205
206	return;	206	return;
207	}	207	}
208		208
209	int configure_via_ct(void)	209	int configure_via_ct(void)
210	{	210	{
211	uint8_t *cur;	211	uint8_t *cur;
212	unsigned int i, cnt;	212	unsigned int i, cnt;
213		213
214	if (ct->signature != CT_SIGNATURE) {	214	if (ct->signature != CT_SIGNATURE) {
215	printf("%s: bad ct->signature\n", __func__);	215	printf("%s: bad ct->signature\n", __func__);
216	return 1;	216	return 1;
217	}	217	}
218	if (!mps_ct_check()) {	218	if (!mps_ct_check()) {
219	printf("%s: bad ct checksum\n", __func__);	219	printf("%s: bad ct checksum\n", __func__);
220	return 1;	220	return 1;
221	}	221	}
222	if (ct->oem_table) {	222	if (ct->oem_table) {
223	printf("%s: ct->oem_table not supported\n", __func__);	223	printf("%s: ct->oem_table not supported\n", __func__);
224	return 1;	224	return 1;
225	}	225	}
226		226
227	l_apic = (uint32_t *)(uintptr_t)ct->l_apic;	227	l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
228		228
229	cnt = 0;	229	cnt = 0;
230	cur = &ct->base_table[0];	230	cur = &ct->base_table[0];
231	for (i = 0; i < ct->entry_count; i++) {	231	for (i = 0; i < ct->entry_count; i++) {
232	switch (*cur) {	232	switch (*cur) {
233	/* Processor entry */	233	/* Processor entry */
234	case 0:	234	case 0:
235	processor_entries = processor_entries ?	235	processor_entries = processor_entries ?
236	processor_entries :	236	processor_entries :
237	(struct __processor_entry *) cur;	237	(struct __processor_entry *) cur;
238	processor_entry_cnt++;	238	processor_entry_cnt++;
239	cnt += ct_processor_entry((struct __processor_entry *)	239	cnt += ct_processor_entry((struct __processor_entry *)
240	cur);	240	cur);
241	cur += 20;	241	cur += 20;
242	break;	242	break;
243		243
244	/* Bus entry */	244	/* Bus entry */
245	case 1:	245	case 1:
246	bus_entries = bus_entries ?	246	bus_entries = bus_entries ?
247	bus_entries : (struct __bus_entry *) cur;	247	bus_entries : (struct __bus_entry *) cur;
248	bus_entry_cnt++;	248	bus_entry_cnt++;
249	ct_bus_entry((struct __bus_entry *) cur);	249	ct_bus_entry((struct __bus_entry *) cur);
250	cur += 8;	250	cur += 8;
251	break;	251	break;
252		252
253	/* I/O Apic */	253	/* I/O Apic */
254	case 2:	254	case 2:
255	io_apic_entries = io_apic_entries ?	255	io_apic_entries = io_apic_entries ?
256	io_apic_entries : (struct __io_apic_entry *) cur;	256	io_apic_entries : (struct __io_apic_entry *) cur;
257	io_apic_entry_cnt++;	257	io_apic_entry_cnt++;
258	ct_io_apic_entry((struct __io_apic_entry *) cur);	258	ct_io_apic_entry((struct __io_apic_entry *) cur);
259	cur += 8;	259	cur += 8;
260	break;	260	break;
261		261
262	/* I/O Interrupt Assignment */	262	/* I/O Interrupt Assignment */
263	case 3:	263	case 3:
264	io_intr_entries = io_intr_entries ?	264	io_intr_entries = io_intr_entries ?
265	io_intr_entries : (struct __io_intr_entry *) cur;	265	io_intr_entries : (struct __io_intr_entry *) cur;
266	io_intr_entry_cnt++;	266	io_intr_entry_cnt++;
267	ct_io_intr_entry((struct __io_intr_entry *) cur);	267	ct_io_intr_entry((struct __io_intr_entry *) cur);
268	cur += 8;	268	cur += 8;
269	break;	269	break;
270		270
271	/* Local Interrupt Assignment */	271	/* Local Interrupt Assignment */
272	case 4:	272	case 4:
273	l_intr_entries = l_intr_entries ?	273	l_intr_entries = l_intr_entries ?
274	l_intr_entries : (struct __l_intr_entry *) cur;	274	l_intr_entries : (struct __l_intr_entry *) cur;
275	l_intr_entry_cnt++;	275	l_intr_entry_cnt++;
276	ct_l_intr_entry((struct __l_intr_entry *) cur);	276	ct_l_intr_entry((struct __l_intr_entry *) cur);
277	cur += 8;	277	cur += 8;
278	break;	278	break;
279		279
280	default:	280	default:
281	/*	281	/*
282	* Something is wrong. Fallback to UP mode.	282	* Something is wrong. Fallback to UP mode.
283	*/	283	*/
284		284
285	printf("%s: ct badness\n", __func__);	285	printf("%s: ct badness\n", __func__);
286	return 1;	286	return 1;
287	}	287	}
288	}	288	}
289		289
290	/*	290	/*
291	* Process extended entries.	291	* Process extended entries.
292	*/	292	*/
293	ct_extended_entries();	293	ct_extended_entries();
294	return cnt;	294	return cnt;
295	}	295	}
296		296
297	int configure_via_default(uint8_t n __attribute__((unused)))	297	int configure_via_default(uint8_t n __attribute__((unused)))
298	{	298	{
299	/*	299	/*
300	* Not yet implemented.	300	* Not yet implemented.
301	*/	301	*/
302	printf("%s: not supported\n", __func__);	302	printf("%s: not supported\n", __func__);
303	return 1;	303	return 1;
304	}	304	}
305		305
306		306
307	int ct_processor_entry(struct __processor_entry *pr __attribute__((unused)))	307	int ct_processor_entry(struct __processor_entry *pr __attribute__((unused)))
308	{	308	{
309	/*	309	/*
310	* Ignore processors which are not marked enabled.	310	* Ignore processors which are not marked enabled.
311	*/	311	*/
312	if ((pr->cpu_flags & (1 << 0)) == 0)	312	if ((pr->cpu_flags & (1 << 0)) == 0)
313	return 0;	313	return 0;
314		314
315	apic_id_mask \|= (1 << pr->l_apic_id);	315	apic_id_mask \|= (1 << pr->l_apic_id);
316	return 1;	316	return 1;
317	}	317	}
318		318
319	void ct_bus_entry(struct __bus_entry *bus __attribute__((unused)))	319	void ct_bus_entry(struct __bus_entry *bus __attribute__((unused)))
320	{	320	{
321	#ifdef MPSCT_VERBOSE	321	#ifdef MPSCT_VERBOSE
322	char buf[7];	322	char buf[7];
323	memcpy((void ) buf, (void ) bus->bus_type, 6);	323	memcpy((void ) buf, (void ) bus->bus_type, 6);
324	buf[6] = 0;	324	buf[6] = 0;
325	printf("bus%d: %s\n", bus->bus_id, buf);	325	printf("bus%d: %s\n", bus->bus_id, buf);
326	#endif	326	#endif
327	}	327	}
328		328
329	void ct_io_apic_entry(struct __io_apic_entry *ioa)	329	void ct_io_apic_entry(struct __io_apic_entry *ioa)
330	{	330	{
331	static unsigned int io_apic_count = 0;	331	static unsigned int io_apic_count = 0;
332		332
333	/* this ioapic is marked unusable */	333	/* this ioapic is marked unusable */
334	if ((ioa->io_apic_flags & 1) == 0)	334	if ((ioa->io_apic_flags & 1) == 0)
335	return;	335	return;
336		336
337	if (io_apic_count++ > 0) {	337	if (io_apic_count++ > 0) {
338	/*	338	/*
339	* Multiple IO APIC's are currently not supported.	339	* Multiple IO APIC's are currently not supported.
340	*/	340	*/
341	return;	341	return;
342	}	342	}
343		343
344	io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;	344	io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
345	}	345	}
346		346
347	//#define MPSCT_VERBOSE	347	//#define MPSCT_VERBOSE
348	void ct_io_intr_entry(struct __io_intr_entry *iointr __attribute__((unused)))	348	void ct_io_intr_entry(struct __io_intr_entry *iointr __attribute__((unused)))
349	{	349	{
350	#ifdef MPSCT_VERBOSE	350	#ifdef MPSCT_VERBOSE
351	switch (iointr->intr_type) {	351	switch (iointr->intr_type) {
352	case 0:	352	case 0:
353	printf("INT");	353	printf("INT");
354	break;	354	break;
355	case 1:	355	case 1:
356	printf("NMI");	356	printf("NMI");
357	break;	357	break;
358	case 2:	358	case 2:
359	printf("SMI");	359	printf("SMI");
360	break;	360	break;
361	case 3:	361	case 3:
362	printf("ExtINT");	362	printf("ExtINT");
363	break;	363	break;
364	}	364	}
365	putchar(',');	365	putchar(',');
366	switch (iointr->poel & 3) {	366	switch (iointr->poel & 3) {
367	case 0:	367	case 0:
368	printf("bus-like");	368	printf("bus-like");
369	break;	369	break;
370	case 1:	370	case 1:
371	printf("active high");	371	printf("active high");
372	break;	372	break;
373	case 2:	373	case 2:
374	printf("reserved");	374	printf("reserved");
375	break;	375	break;
376	case 3:	376	case 3:
377	printf("active low");	377	printf("active low");
378	break;	378	break;
379	}	379	}
380	putchar(',');	380	putchar(',');
381	switch ((iointr->poel >> 2) & 3) {	381	switch ((iointr->poel >> 2) & 3) {
382	case 0:	382	case 0:
383	printf("bus-like");	383	printf("bus-like");
384	break;	384	break;
385	case 1:	385	case 1:
386	printf("edge-triggered");	386	printf("edge-triggered");
387	break;	387	break;
388	case 2:	388	case 2:
389	printf("reserved");	389	printf("reserved");
390	break;	390	break;
391	case 3:	391	case 3:
392	printf("level-triggered");	392	printf("level-triggered");
393	break;	393	break;
394	}	394	}
395	putchar(',');	395	putchar(',');
396	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	396	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
397	putchar(',');	397	putchar(',');
398	printf("io_apic%d,pin%d", iointr->dst_io_apic_id,	398	printf("io_apic%d,pin%d", iointr->dst_io_apic_id,
399	iointr->dst_io_apic_pin);	399	iointr->dst_io_apic_pin);
400	putchar('\n');	400	putchar('\n');
401	#endif	401	#endif
402	}	402	}
403		403
404	void ct_l_intr_entry(struct __l_intr_entry *lintr __attribute__((unused)))	404	void ct_l_intr_entry(struct __l_intr_entry *lintr __attribute__((unused)))
405	{	405	{
406	#ifdef MPSCT_VERBOSE	406	#ifdef MPSCT_VERBOSE
407	switch (lintr->intr_type) {	407	switch (lintr->intr_type) {
408	case 0:	408	case 0:
409	printf("INT");	409	printf("INT");
410	break;	410	break;
411	case 1:	411	case 1:
412	printf("NMI");	412	printf("NMI");
413	break;	413	break;
414	case 2:	414	case 2:
415	printf("SMI");	415	printf("SMI");
416	break;	416	break;
417	case 3:	417	case 3:
418	printf("ExtINT");	418	printf("ExtINT");
419	break;	419	break;
420	}	420	}
421	putchar(',');	421	putchar(',');
422	switch (lintr->poel & 3) {	422	switch (lintr->poel & 3) {
423	case 0:	423	case 0:
424	printf("bus-like");	424	printf("bus-like");
425	break;	425	break;
426	case 1:	426	case 1:
427	printf("active high");	427	printf("active high");
428	break;	428	break;
429	case 2:	429	case 2:
430	printf("reserved");	430	printf("reserved");
431	break;	431	break;
432	case 3:	432	case 3:
433	printf("active low");	433	printf("active low");
434	break;	434	break;
435	}	435	}
436	putchar(',');	436	putchar(',');
437	switch ((lintr->poel >> 2) & 3) {	437	switch ((lintr->poel >> 2) & 3) {
438	case 0:	438	case 0:
439	printf("bus-like");	439	printf("bus-like");
440	break;	440	break;
441	case 1:	441	case 1:
442	printf("edge-triggered");	442	printf("edge-triggered");
443	break;	443	break;
444	case 2:	444	case 2:
445	printf("reserved");	445	printf("reserved");
446	break;	446	break;
447	case 3:	447	case 3:
448	printf("level-triggered");	448	printf("level-triggered");
449	break;	449	break;
450	}	450	}
451	putchar(',');	451	putchar(',');
452	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	452	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
453	putchar(',');	453	putchar(',');
454	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	454	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
455	putchar('\n');	455	putchar('\n');
456	#endif	456	#endif
457	}	457	}
458		458
459	void ct_extended_entries(void)	459	void ct_extended_entries(void)
460	{	460	{
461	uint8_t ext = (uint8_t ) ct + ct->base_table_length;	461	uint8_t ext = (uint8_t ) ct + ct->base_table_length;
462	uint8_t *cur;	462	uint8_t *cur;
463		463
464	for (cur = ext; cur < ext + ct->ext_table_length;	464	for (cur = ext; cur < ext + ct->ext_table_length;
465	cur += cur[CT_EXT_ENTRY_LEN]) {	465	cur += cur[CT_EXT_ENTRY_LEN]) {
466	switch (cur[CT_EXT_ENTRY_TYPE]) {	466	switch (cur[CT_EXT_ENTRY_TYPE]) {
467	default:	467	default:
468	printf("%p: skipping MP Configuration Table extended "	468	printf("%p: skipping MP Configuration Table extended "
469	"entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);	469	"entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
470	break;	470	break;
471	}	471	}
472	}	472	}
473	}	473	}
474		474
475	int mps_irq_to_pin(unsigned int irq)	475	int mps_irq_to_pin(unsigned int irq)
476	{	476	{
477	unsigned int i;	477	unsigned int i;
478		478
479	for (i = 0; i < io_intr_entry_cnt; i++) {	479	for (i = 0; i < io_intr_entry_cnt; i++) {
480	if (io_intr_entries[i].src_bus_irq == irq &&	480	if (io_intr_entries[i].src_bus_irq == irq &&
481	io_intr_entries[i].intr_type == 0)	481	io_intr_entries[i].intr_type == 0)
482	return io_intr_entries[i].dst_io_apic_pin;	482	return io_intr_entries[i].dst_io_apic_pin;
483	}	483	}
484		484
485	return -1;	485	return -1;
486	}	486	}
487		487
488	#endif /* CONFIG_SMP */	488	#endif /* CONFIG_SMP */
489		489
490	/** @}	490	/** @}
491	*/	491	*/
492		492

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(root)/branches/tracing/kernel/arch/ia32/src/smp/mps.c – Rev 2787 → 4692