WebSVN – HelenOS – Diff – /branches/sparc/kernel/generic/src/mm/tlb.c


/*
 * Copyright (c) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup genericmm
 * @{
 */
 
/**
 * @file
 * @brief   Generic TLB shootdown algorithm.
 *
 * The algorithm implemented here is based on the CMU TLB shootdown
 * algorithm and is further simplified (e.g. all CPUs receive all TLB
 * shootdown messages).
 */
 
#include <mm/tlb.h>
#include <mm/asid.h>
#include <smp/ipi.h>
#include <synch/spinlock.h>
#include <atomic.h>
#include <arch/asm.h>
#include <arch/interrupt.h>
#include <config.h>
#include <arch.h>
#include <panic.h>
#include <debug.h>
#include <cpu.h>
 
/**
 * This lock is used for synchronisation between sender and
 * recipients of TLB shootdown message. It must be acquired
 * before CPU structure lock.
 */
SPINLOCK_INITIALIZE(tlblock);
 
void tlb_init(void)
{
    tlb_arch_init();
}
 
#ifdef CONFIG_SMP
 
/** Send TLB shootdown message.
 *
 * This function attempts to deliver TLB shootdown message
 * to all other processors.
 *
 * This function must be called with interrupts disabled.
 *
 * @param type Type describing scope of shootdown.
 * @param asid Address space, if required by type.
 * @param page Virtual page address, if required by type.
 * @param count Number of pages, if required by type.
 */
void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid,
    uintptr_t page, count_t count)
{
    unsigned int i;
 
    CPU->tlb_active = 0;
 
    spinlock_lock(&tlblock);
   
    for (i = 0; i < config.cpu_count; i++) {
        cpu_t *cpu;
       
        if (i == CPU->id)
            continue;
 
        cpu = &cpus[i];
        spinlock_lock(&cpu->lock);
        if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
            /*
             * The message queue is full.
             * Erase the queue and store one TLB_INVL_ALL message.
             */
            cpu->tlb_messages_count = 1;
            cpu->tlb_messages[0].type = TLB_INVL_ALL;
            cpu->tlb_messages[0].asid = ASID_INVALID;
            cpu->tlb_messages[0].page = 0;
            cpu->tlb_messages[0].count = 0;
        } else {
            /*
             * Enqueue the message.
             */
            index_t idx = cpu->tlb_messages_count++;
            cpu->tlb_messages[idx].type = type;
            cpu->tlb_messages[idx].asid = asid;
            cpu->tlb_messages[idx].page = page;
            cpu->tlb_messages[idx].count = count;
        }
        spinlock_unlock(&cpu->lock);
    }
   
    tlb_shootdown_ipi_send();
busy_wait: 
    for (i = 0; i < config.cpu_count; i++) {
        if (cpus[i].tlb_active)
            goto busy_wait;
    }
}
 
/** Finish TLB shootdown sequence. */
void tlb_shootdown_finalize(void)
{
    spinlock_unlock(&tlblock);
    CPU->tlb_active = 1;
}
 
void tlb_shootdown_ipi_send(void)
{
    ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
}
 
/** Receive TLB shootdown message. */
void tlb_shootdown_ipi_recv(void)
{
    tlb_invalidate_type_t type;
    asid_t asid;
    uintptr_t page;
    count_t count;
    unsigned int i;
   
    ASSERT(CPU);
   
    CPU->tlb_active = 0;
    spinlock_lock(&tlblock);
    spinlock_unlock(&tlblock);
 
    spinlock_lock(&CPU->lock);
    ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
 
    for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
        type = CPU->tlb_messages[i].type;
        asid = CPU->tlb_messages[i].asid;
        page = CPU->tlb_messages[i].page;
        count = CPU->tlb_messages[i].count;
 
        switch (type) {
        case TLB_INVL_ALL:
            tlb_invalidate_all();
            break;
        case TLB_INVL_ASID:
            tlb_invalidate_asid(asid);
            break;
        case TLB_INVL_PAGES:
                ASSERT(count);
            tlb_invalidate_pages(asid, page, count);
            break;
        default:
            panic("unknown type (%d)\n", type);
            break;
        }
        if (type == TLB_INVL_ALL)
            break;
    }
   
    spinlock_unlock(&CPU->lock);
    CPU->tlb_active = 1;
}
 
#endif /* CONFIG_SMP */
 
/** @}
 */
 

Rev 4638	Rev 4679
1	/*	1	/*
2	* Copyright (c) 2001-2004 Jakub Jermar	2	* Copyright (c) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup genericmm	29	/** @addtogroup genericmm
30	* @{	30	* @{
31	*/	31	*/
32		32
33	/**	33	/**
34	* @file	34	* @file
35	* @brief Generic TLB shootdown algorithm.	35	* @brief Generic TLB shootdown algorithm.
36	*	36	*
37	* The algorithm implemented here is based on the CMU TLB shootdown	37	* The algorithm implemented here is based on the CMU TLB shootdown
38	* algorithm and is further simplified (e.g. all CPUs receive all TLB	38	* algorithm and is further simplified (e.g. all CPUs receive all TLB
39	* shootdown messages).	39	* shootdown messages).
40	*/	40	*/
41		41
42	#include <mm/tlb.h>	42	#include <mm/tlb.h>
43	#include <mm/asid.h>	43	#include <mm/asid.h>
44	#include <smp/ipi.h>	44	#include <smp/ipi.h>
45	#include <synch/spinlock.h>	45	#include <synch/spinlock.h>
46	#include <atomic.h>	46	#include <atomic.h>
47	#include <arch/asm.h>	47	#include <arch/asm.h>
48	#include <arch/interrupt.h>	48	#include <arch/interrupt.h>
49	#include <config.h>	49	#include <config.h>
50	#include <arch.h>	50	#include <arch.h>
51	#include <panic.h>	51	#include <panic.h>
52	#include <debug.h>	52	#include <debug.h>
53	#include <cpu.h>	53	#include <cpu.h>
54		54
55	/**	55	/**
56	* This lock is used for synchronisation between sender and	56	* This lock is used for synchronisation between sender and
57	* recipients of TLB shootdown message. It must be acquired	57	* recipients of TLB shootdown message. It must be acquired
58	* before CPU structure lock.	58	* before CPU structure lock.
59	*/	59	*/
60	SPINLOCK_INITIALIZE(tlblock);	60	SPINLOCK_INITIALIZE(tlblock);
61		61
62	void tlb_init(void)	62	void tlb_init(void)
63	{	63	{
64	tlb_arch_init();	64	tlb_arch_init();
65	}	65	}
66		66
67	#ifdef CONFIG_SMP	67	#ifdef CONFIG_SMP
68		68
69	/** Send TLB shootdown message.	69	/** Send TLB shootdown message.
70	*	70	*
71	* This function attempts to deliver TLB shootdown message	71	* This function attempts to deliver TLB shootdown message
72	* to all other processors.	72	* to all other processors.
73	*	73	*
74	* This function must be called with interrupts disabled.	74	* This function must be called with interrupts disabled.
75	*	75	*
76	* @param type Type describing scope of shootdown.	76	* @param type Type describing scope of shootdown.
77	* @param asid Address space, if required by type.	77	* @param asid Address space, if required by type.
78	* @param page Virtual page address, if required by type.	78	* @param page Virtual page address, if required by type.
79	* @param count Number of pages, if required by type.	79	* @param count Number of pages, if required by type.
80	*/	80	*/
81	void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid,	81	void tlb_shootdown_start(tlb_invalidate_type_t type, asid_t asid,
82	uintptr_t page, count_t count)	82	uintptr_t page, count_t count)
83	{	83	{
84	unsigned int i;	84	unsigned int i;
85		85
86	CPU->tlb_active = 0;	86	CPU->tlb_active = 0;
87		87
88	spinlock_lock(&tlblock);	88	spinlock_lock(&tlblock);
89		89
90	for (i = 0; i < config.cpu_count; i++) {	90	for (i = 0; i < config.cpu_count; i++) {
91	cpu_t *cpu;	91	cpu_t *cpu;
92		92
93	if (i == CPU->id)	93	if (i == CPU->id)
94	continue;	94	continue;
95		95
96	cpu = &cpus[i];	96	cpu = &cpus[i];
97	spinlock_lock(&cpu->lock);	97	spinlock_lock(&cpu->lock);
98	if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {	98	if (cpu->tlb_messages_count == TLB_MESSAGE_QUEUE_LEN) {
99	/*	99	/*
100	* The message queue is full.	100	* The message queue is full.
101	* Erase the queue and store one TLB_INVL_ALL message.	101	* Erase the queue and store one TLB_INVL_ALL message.
102	*/	102	*/
103	cpu->tlb_messages_count = 1;	103	cpu->tlb_messages_count = 1;
104	cpu->tlb_messages[0].type = TLB_INVL_ALL;	104	cpu->tlb_messages[0].type = TLB_INVL_ALL;
105	cpu->tlb_messages[0].asid = ASID_INVALID;	105	cpu->tlb_messages[0].asid = ASID_INVALID;
106	cpu->tlb_messages[0].page = 0;	106	cpu->tlb_messages[0].page = 0;
107	cpu->tlb_messages[0].count = 0;	107	cpu->tlb_messages[0].count = 0;
108	} else {	108	} else {
109	/*	109	/*
110	* Enqueue the message.	110	* Enqueue the message.
111	*/	111	*/
112	index_t idx = cpu->tlb_messages_count++;	112	index_t idx = cpu->tlb_messages_count++;
113	cpu->tlb_messages[idx].type = type;	113	cpu->tlb_messages[idx].type = type;
114	cpu->tlb_messages[idx].asid = asid;	114	cpu->tlb_messages[idx].asid = asid;
115	cpu->tlb_messages[idx].page = page;	115	cpu->tlb_messages[idx].page = page;
116	cpu->tlb_messages[idx].count = count;	116	cpu->tlb_messages[idx].count = count;
117	}	117	}
118	spinlock_unlock(&cpu->lock);	118	spinlock_unlock(&cpu->lock);
119	}	119	}
120		120
121	tlb_shootdown_ipi_send();	121	tlb_shootdown_ipi_send();
122	busy_wait:	122	busy_wait:
123	for (i = 0; i < config.cpu_count; i++) {	123	for (i = 0; i < config.cpu_count; i++) {
124	if (cpus[i].tlb_active)	124	if (cpus[i].tlb_active)
125	goto busy_wait;	125	goto busy_wait;
126	}	126	}
127	}	127	}
128		128
129	/** Finish TLB shootdown sequence. */	129	/** Finish TLB shootdown sequence. */
130	void tlb_shootdown_finalize(void)	130	void tlb_shootdown_finalize(void)
131	{	131	{
132	spinlock_unlock(&tlblock);	132	spinlock_unlock(&tlblock);
133	CPU->tlb_active = 1;	133	CPU->tlb_active = 1;
134	}	134	}
135		135
136	void tlb_shootdown_ipi_send(void)	136	void tlb_shootdown_ipi_send(void)
137	{	137	{
138	ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);	138	ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI);
139	}	139	}
140		140
141	/** Receive TLB shootdown message. */	141	/** Receive TLB shootdown message. */
142	void tlb_shootdown_ipi_recv(void)	142	void tlb_shootdown_ipi_recv(void)
143	{	143	{
144	tlb_invalidate_type_t type;	144	tlb_invalidate_type_t type;
145	asid_t asid;	145	asid_t asid;
146	uintptr_t page;	146	uintptr_t page;
147	count_t count;	147	count_t count;
148	unsigned int i;	148	unsigned int i;
149		149
150	ASSERT(CPU);	150	ASSERT(CPU);
151		151
152	CPU->tlb_active = 0;	152	CPU->tlb_active = 0;
153	spinlock_lock(&tlblock);	153	spinlock_lock(&tlblock);
154	spinlock_unlock(&tlblock);	154	spinlock_unlock(&tlblock);
155		155
156	spinlock_lock(&CPU->lock);	156	spinlock_lock(&CPU->lock);
157	ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);	157	ASSERT(CPU->tlb_messages_count <= TLB_MESSAGE_QUEUE_LEN);
158		158
159	for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {	159	for (i = 0; i < CPU->tlb_messages_count; CPU->tlb_messages_count--) {
160	type = CPU->tlb_messages[i].type;	160	type = CPU->tlb_messages[i].type;
161	asid = CPU->tlb_messages[i].asid;	161	asid = CPU->tlb_messages[i].asid;
162	page = CPU->tlb_messages[i].page;	162	page = CPU->tlb_messages[i].page;
163	count = CPU->tlb_messages[i].count;	163	count = CPU->tlb_messages[i].count;
164		164
165	switch (type) {	165	switch (type) {
166	case TLB_INVL_ALL:	166	case TLB_INVL_ALL:
167	tlb_invalidate_all();	167	tlb_invalidate_all();
168	break;	168	break;
169	case TLB_INVL_ASID:	169	case TLB_INVL_ASID:
170	tlb_invalidate_asid(asid);	170	tlb_invalidate_asid(asid);
171	break;	171	break;
172	case TLB_INVL_PAGES:	172	case TLB_INVL_PAGES:
173	ASSERT(count);	173	ASSERT(count);
174	tlb_invalidate_pages(asid, page, count);	174	tlb_invalidate_pages(asid, page, count);
175	break;	175	break;
176	default:	176	default:
177	panic("unknown type (%d)\n", type);	177	panic("unknown type (%d)\n", type);
178	break;	178	break;
179	}	179	}
180	if (type == TLB_INVL_ALL)	180	if (type == TLB_INVL_ALL)
181	break;	181	break;
182	}	182	}
183		183
184	spinlock_unlock(&CPU->lock);	184	spinlock_unlock(&CPU->lock);
185	CPU->tlb_active = 1;	185	CPU->tlb_active = 1;
186	}	186	}
187		187
188	#endif /* CONFIG_SMP */	188	#endif /* CONFIG_SMP */
189		189
190	/** @}	190	/** @}
191	*/	191	*/
192		192

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