WebSVN – HelenOS – Diff – /branches/sparc/kernel/arch/sparc64/src/sun4v/start.S


#
# Copyright (c) 2005 Jakub Jermar
# Copyright (c) 2008 Pavel Rimsky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/arch.h>
#include <arch/stack.h>
#include <arch/sun4v/regdef.h>
#include <arch/sun4v/hypercall.h>
#include <arch/mm/pagesize.h>
#include <arch/mm/sun4v/tte.h>
#include <arch/mm/sun4v/mmu.h>
#include <arch/mm/sun4v/tlb.h>
 
.register %g2, #scratch
.register %g3, #scratch
 
.section K_TEXT_START, "ax"
 
#define BSP_FLAG		1
#define PHYSMEM_ADDR_SIZE	56
 
/*
 
 
 
 
 
 
 
 * Flags set in the TTE data entry mapping the kernel.
 */
#ifdef CONFIG_VIRT_IDX_DCACHE
	#define TTE_FLAGS \
		(1 << TTE_V_SHIFT) \
		| (1 << TTE_EP_SHIFT) \
		| (1 << TTE_CP_SHIFT) \
		| (1 << TTE_CV_SHIFT) \
		| (1 << TTE_P_SHIFT) \
		| (1 << TTE_W_SHIFT)
#else
	#define TTE_FLAGS \
		(1 << TTE_V_SHIFT) \
		| (1 << TTE_EP_SHIFT) \
		| (1 << TTE_CP_SHIFT) \
		| (1 << TTE_P_SHIFT) \
		| (1 << TTE_W_SHIFT)
#endif
 
 
/*
 * Fills a register with a TTE Data item. The item will map the given virtual
 * address to a real address which will be computed by adding the starting
 * address of the physical memory to the virtual address.
 *
 * parameters:
 * 	addr:			virtual address to be mapped
 *	rphysmem_start:		register containing the starting address of the
 *				physical memory
 *	rtmp1:			a register to be used as temporary
 *	rtmp2:			a register to be used as temporary
 *	rd:			register where the result will be saved
 */
#define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \
	setx TTE_FLAGS | PAGESIZE_4M, rtmp1, rd; \
	add rd, rphysmem_start, rd; \
	setx (addr), rtmp1, rtmp2; \
	add rd, rtmp2, rd;
 
/*
 * Here is where the kernel is passed control from the boot loader.
 * 
 * The registers are expected to be in this state:
 * - %o0 starting address of physical memory + bootstrap processor flag
 * 	bits 63...1:	physical memory starting address / 2
 *	bit 0:		non-zero on BSP processor, zero on AP processors
 * - %o1 bootinfo structure address (BSP only)
 * - %o2 bootinfo structure size (BSP only)
 *
 * Moreover, we depend on boot having established the following environment:
 * - TLBs are on
 * - identity mapping for the kernel image
 */
.global kernel_image_start
kernel_image_start:
	mov BSP_FLAG, %l0
	and %o0, %l0, %l7			! l7 <= bootstrap processor?
	andn %o0, %l0, %l6			! l6 <= start of physical memory
	or %o1, %g0, %l1
	or %o2, %g0, %l2
 
	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
	srlx %l6, 13, %l5
	
	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5	
 
 
 
 
 
	/*
	 * Setup basic runtime environment.
	 */
	wrpr %g0, NWINDOWS - 2, %cansave	! set maximum saveable windows
	wrpr %g0, 0, %canrestore		! get rid of windows we will
						! never need again
	wrpr %g0, 0, %otherwin			! make sure the window state is
						! consistent
	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window
						! traps for kernel
						
	wrpr %g0, 0, %wstate			! use default spill/fill trap
 
	wrpr %g0, 0, %tl			! TL = 0, primary context
						! register is used
 
	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! disable interrupts and disable
						! 32-bit address masking
 
	wrpr %g0, 0, %pil			! intialize %pil
 
	/*
	 * Switch to kernel trap table.
	 */
	sethi %hi(trap_table), %g1
	wrpr %g1, %lo(trap_table), %tba
 
 
	/*
	 * Take over the MMU.
	 */
 
	! map kernel in context 1
	set kernel_image_start, %o0				! virt. address
	set 1, %o1						! context
	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2)	! TTE data
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
	__HYPERCALL_HYPERFAST(MMU_MAP_ADDR)
 
	! switch to context 1
	set 1, %o0
	set VA_PRIMARY_CONTEXT_REG, %o1
	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
 
	! demap all in context 0
	set 0, %o0						! reserved
	set 0, %o1						! reserved
	set 0, %o2						! context
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
	__HYPERCALL_FAST(MMU_DEMAP_CTX)
 
	! install permanent mapping for kernel in context 0
	set kernel_image_start, %o0				! virtual address
	set 0, %o1						! context
	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2)	! TTE data
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
	__HYPERCALL_FAST(MMU_MAP_PERM_ADDR)
 
	! switch to context 0
	mov 0, %o0
	set VA_PRIMARY_CONTEXT_REG, %o1
	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
 
	! demap all in context 1 (cleanup)
	set 0, %o0						! reserved
	set 0, %o1						! reserved
	set 1, %o2						! context
	set MMU_FLAG_DTLB | MMU_FLAG_ITLB, %o3			! MMU flags
	__HYPERCALL_FAST(MMU_DEMAP_CTX)
	
	/*
	 * Save physmem_base for use by the mm subsystem.
	 * %l6 contains starting physical address
	 */
	sethi %hi(physmem_base), %l4
	stx %l6, [%l4 + %lo(physmem_base)]
 
	/*
	 * So far, we have not touched the stack.
	 * It is a good idea to set the kernel stack to a known state now.
	 */
	sethi %hi(temporary_boot_stack), %sp
	or %sp, %lo(temporary_boot_stack), %sp
	sub %sp, STACK_BIAS, %sp
 
	or %l1, %g0, %o1
	or %l2, %g0, %o2
	sethi %hi(bootinfo), %o0
	call memcpy				! copy bootinfo
	or %o0, %lo(bootinfo), %o0
 
	call arch_pre_main
	nop
	
	call main_bsp
	nop
 
	/* Not reached. */
 
0:
	ba 0b
	nop
 
.section K_DATA_START, "aw", @progbits
 
#define INITIAL_STACK_SIZE		1024
 
.align STACK_ALIGNMENT
	.space INITIAL_STACK_SIZE
.align STACK_ALIGNMENT
temporary_boot_stack:
	.space STACK_WINDOW_SAVE_AREA_SIZE
 
 
.data
 
.align 8
.global physmem_base		! copy of the physical memory base address
physmem_base:
	.quad 0
 

Rev 3743	Rev 3770
1	#	1	#
2	# Copyright (c) 2005 Jakub Jermar	2	# Copyright (c) 2005 Jakub Jermar
3	# Copyright (c) 2008 Pavel Rimsky	3	# Copyright (c) 2008 Pavel Rimsky
4	# All rights reserved.	4	# All rights reserved.
5	#	5	#
6	# Redistribution and use in source and binary forms, with or without	6	# Redistribution and use in source and binary forms, with or without
7	# modification, are permitted provided that the following conditions	7	# modification, are permitted provided that the following conditions
8	# are met:	8	# are met:
9	#	9	#
10	# - Redistributions of source code must retain the above copyright	10	# - Redistributions of source code must retain the above copyright
11	# notice, this list of conditions and the following disclaimer.	11	# notice, this list of conditions and the following disclaimer.
12	# - Redistributions in binary form must reproduce the above copyright	12	# - Redistributions in binary form must reproduce the above copyright
13	# notice, this list of conditions and the following disclaimer in the	13	# notice, this list of conditions and the following disclaimer in the
14	# documentation and/or other materials provided with the distribution.	14	# documentation and/or other materials provided with the distribution.
15	# - The name of the author may not be used to endorse or promote products	15	# - The name of the author may not be used to endorse or promote products
16	# derived from this software without specific prior written permission.	16	# derived from this software without specific prior written permission.
17	#	17	#
18	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	#	28	#
29		29
30	#include <arch/arch.h>	30	#include <arch/arch.h>
31	#include <arch/stack.h>	31	#include <arch/stack.h>
32	#include <arch/sun4v/regdef.h>	32	#include <arch/sun4v/regdef.h>
33	#include <arch/sun4v/hypercall.h>	33	#include <arch/sun4v/hypercall.h>
-		34	#include <arch/mm/pagesize.h>
34	#include <arch/mm/sun4v/tte.h>	35	#include <arch/mm/sun4v/tte.h>
35	#include <arch/mm/sun4v/mmu.h>	36	#include <arch/mm/sun4v/mmu.h>
36	#include <arch/mm/tlb.h>	37	#include <arch/mm/sun4v/tlb.h>
37		38
38	.register %g2, #scratch	39	.register %g2, #scratch
39	.register %g3, #scratch	40	.register %g3, #scratch
40		41
41	.section K_TEXT_START, "ax"	42	.section K_TEXT_START, "ax"
42		43
43	#define BSP_FLAG 1	44	#define BSP_FLAG 1
44	#define PHYSMEM_ADDR_SIZE 56	45	#define PHYSMEM_ADDR_SIZE 56
45		46
46	/*	47	/*
47	* SILO for an unknown reason loads the image to MAPPING_OFFSET + 0x4000 bytes	-
48	* from the start of the physical memory. We pretend that the physical memory	-
49	* starts MAPPING_OFFSET bytes further than it actually does.	-
50	*/	-
51	#define MAPPING_OFFSET 0x400000	-
52		-
53	/*	-
54	* Flags set in the TTE data entry mapping the kernel.	48	* Flags set in the TTE data entry mapping the kernel.
55	*/	49	*/
56	#ifdef CONFIG_VIRT_IDX_DCACHE	50	#ifdef CONFIG_VIRT_IDX_DCACHE
57	#define TTE_FLAGS \	51	#define TTE_FLAGS \
58	(1 << TTE_V_SHIFT) \	52	(1 << TTE_V_SHIFT) \
59	\| (1 << TTE_EP_SHIFT) \	53	\| (1 << TTE_EP_SHIFT) \
60	\| (1 << TTE_CP_SHIFT) \	54	\| (1 << TTE_CP_SHIFT) \
61	\| (1 << TTE_CV_SHIFT) \	55	\| (1 << TTE_CV_SHIFT) \
62	\| (1 << TTE_P_SHIFT) \	56	\| (1 << TTE_P_SHIFT) \
63	\| (1 << TTE_W_SHIFT)	57	\| (1 << TTE_W_SHIFT)
64	#else	58	#else
65	#define TTE_FLAGS \	59	#define TTE_FLAGS \
66	(1 << TTE_V_SHIFT) \	60	(1 << TTE_V_SHIFT) \
67	\| (1 << TTE_EP_SHIFT) \	61	\| (1 << TTE_EP_SHIFT) \
68	\| (1 << TTE_CP_SHIFT) \	62	\| (1 << TTE_CP_SHIFT) \
69	\| (1 << TTE_P_SHIFT) \	63	\| (1 << TTE_P_SHIFT) \
70	\| (1 << TTE_W_SHIFT)	64	\| (1 << TTE_W_SHIFT)
71	#endif	65	#endif
72		66
73		67
74	/*	68	/*
75	* Fills a register with a TTE Data item. The item will map the given virtual	69	* Fills a register with a TTE Data item. The item will map the given virtual
76	* address to a real address which will be computed by adding the starting	70	* address to a real address which will be computed by adding the starting
77	* address of the physical memory to the virtual address.	71	* address of the physical memory to the virtual address.
78	*	72	*
79	* parameters:	73	* parameters:
80	* addr: virtual address to be mapped	74	* addr: virtual address to be mapped
81	* rphysmem_start: register containing the starting address of the	75	* rphysmem_start: register containing the starting address of the
82	* physical memory	76	* physical memory
83	* rtmp1: a register to be used as temporary	77	* rtmp1: a register to be used as temporary
84	* rtmp2: a register to be used as temporary	78	* rtmp2: a register to be used as temporary
85	* rd: register where the result will be saved	79	* rd: register where the result will be saved
86	*/	80	*/
87	#define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \	81	#define TTE_DATA(addr, rphysmem_start, rtmp1, rtmp2, rd) \
88	setx TTE_FLAGS \| PAGESIZE_4M, rtmp1, rd; \	82	setx TTE_FLAGS \| PAGESIZE_4M, rtmp1, rd; \
89	add rd, rphysmem_start, rd; \	83	add rd, rphysmem_start, rd; \
90	setx (addr), rtmp1, rtmp2; \	84	setx (addr), rtmp1, rtmp2; \
91	add rd, rtmp2, rd;	85	add rd, rtmp2, rd;
92		86
93	/*	87	/*
94	* Here is where the kernel is passed control from the boot loader.	88	* Here is where the kernel is passed control from the boot loader.
95	*	89	*
96	* The registers are expected to be in this state:	90	* The registers are expected to be in this state:
97	* - %o0 starting address of physical memory + bootstrap processor flag	91	* - %o0 starting address of physical memory + bootstrap processor flag
98	* bits 63...1: physical memory starting address / 2	92	* bits 63...1: physical memory starting address / 2
99	* bit 0: non-zero on BSP processor, zero on AP processors	93	* bit 0: non-zero on BSP processor, zero on AP processors
100	* - %o1 bootinfo structure address (BSP only)	94	* - %o1 bootinfo structure address (BSP only)
101	* - %o2 bootinfo structure size (BSP only)	95	* - %o2 bootinfo structure size (BSP only)
102	*	96	*
103	* Moreover, we depend on boot having established the following environment:	97	* Moreover, we depend on boot having established the following environment:
104	* - TLBs are on	98	* - TLBs are on
105	* - identity mapping for the kernel image	99	* - identity mapping for the kernel image
106	*/	100	*/
107	.global kernel_image_start	101	.global kernel_image_start
108	kernel_image_start:	102	kernel_image_start:
109	mov BSP_FLAG, %l0	103	mov BSP_FLAG, %l0
110	and %o0, %l0, %l7 ! l7 <= bootstrap processor?	104	and %o0, %l0, %l7 ! l7 <= bootstrap processor?
111	andn %o0, %l0, %l6 ! l6 <= start of physical memory	105	andn %o0, %l0, %l6 ! l6 <= start of physical memory
112	or %o1, %g0, %l1	106	or %o1, %g0, %l1
113	or %o2, %g0, %l2	107	or %o2, %g0, %l2
114		108
115	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.	109	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
116	srlx %l6, 13, %l5	110	srlx %l6, 13, %l5
117		111
118	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]	112	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
119	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5	113	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
120	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5	114	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
121		-
122	! pretend the physical memory starts further	-
123	set MAPPING_OFFSET, %g2	-
124	add %l5, %g2, %l5	-
125		115
126	/*	116	/*
127	* Setup basic runtime environment.	117	* Setup basic runtime environment.
128	*/	118	*/
129	wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows	119	wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows
130	wrpr %g0, 0, %canrestore ! get rid of windows we will	120	wrpr %g0, 0, %canrestore ! get rid of windows we will
131	! never need again	121	! never need again
132	wrpr %g0, 0, %otherwin ! make sure the window state is	122	wrpr %g0, 0, %otherwin ! make sure the window state is
133	! consistent	123	! consistent
134	wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window	124	wrpr %g0, NWINDOWS - 1, %cleanwin ! prevent needless clean_window
135	! traps for kernel	125	! traps for kernel
136		126
137	wrpr %g0, 0, %wstate ! use default spill/fill trap	127	wrpr %g0, 0, %wstate ! use default spill/fill trap
138		128
139	wrpr %g0, 0, %tl ! TL = 0, primary context	129	wrpr %g0, 0, %tl ! TL = 0, primary context
140	! register is used	130	! register is used
141		131
142	wrpr %g0, PSTATE_PRIV_BIT, %pstate ! disable interrupts and disable	132	wrpr %g0, PSTATE_PRIV_BIT, %pstate ! disable interrupts and disable
143	! 32-bit address masking	133	! 32-bit address masking
144		134
145	wrpr %g0, 0, %pil ! intialize %pil	135	wrpr %g0, 0, %pil ! intialize %pil
146		136
147	/*	137	/*
148	* Switch to kernel trap table.	138	* Switch to kernel trap table.
149	*/	139	*/
150	sethi %hi(trap_table), %g1	140	sethi %hi(trap_table), %g1
151	wrpr %g1, %lo(trap_table), %tba	141	wrpr %g1, %lo(trap_table), %tba
152		142
153		143
154	/*	144	/*
155	* Take over the MMU.	145	* Take over the MMU.
156	*/	146	*/
157		147
158	! map kernel in context 1	148	! map kernel in context 1
159	set kernel_image_start, %o0 ! virt. address	149	set kernel_image_start, %o0 ! virt. address
160	set 1, %o1 ! context	150	set 1, %o1 ! context
161	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data	151	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data
162	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags	152	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags
163	__HYPERCALL_HYPERFAST(MMU_MAP_ADDR)	153	__HYPERCALL_HYPERFAST(MMU_MAP_ADDR)
164		154
165	! switch to context 1	155	! switch to context 1
166	set 1, %o0	156	set 1, %o0
167	set VA_PRIMARY_CONTEXT_REG, %o1	157	set VA_PRIMARY_CONTEXT_REG, %o1
168	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG	158	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
169		159
170	! demap all in context 0	160	! demap all in context 0
171	set 0, %o0 ! reserved	161	set 0, %o0 ! reserved
172	set 0, %o1 ! reserved	162	set 0, %o1 ! reserved
173	set 0, %o2 ! context	163	set 0, %o2 ! context
174	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags	164	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags
175	__HYPERCALL_FAST(MMU_DEMAP_CTX)	165	__HYPERCALL_FAST(MMU_DEMAP_CTX)
176		166
177	! install permanent mapping for kernel in context 0	167	! install permanent mapping for kernel in context 0
178	set kernel_image_start, %o0 ! virtual address	168	set kernel_image_start, %o0 ! virtual address
179	set 0, %o1 ! context	169	set 0, %o1 ! context
180	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data	170	TTE_DATA(kernel_image_start, %l5, %g2, %g3, %o2) ! TTE data
181	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags	171	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags
182	__HYPERCALL_FAST(MMU_MAP_PERM_ADDR)	172	__HYPERCALL_FAST(MMU_MAP_PERM_ADDR)
183		173
184	! switch to context 0	174	! switch to context 0
185	mov 0, %o0	175	mov 0, %o0
186	set VA_PRIMARY_CONTEXT_REG, %o1	176	set VA_PRIMARY_CONTEXT_REG, %o1
187	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG	177	stxa %o0, [%o1] ASI_PRIMARY_CONTEXT_REG
188		178
189	! demap all in context 1 (cleanup)	179	! demap all in context 1 (cleanup)
190	set 0, %o0 ! reserved	180	set 0, %o0 ! reserved
191	set 0, %o1 ! reserved	181	set 0, %o1 ! reserved
192	set 1, %o2 ! context	182	set 1, %o2 ! context
193	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags	183	set MMU_FLAG_DTLB \| MMU_FLAG_ITLB, %o3 ! MMU flags
194	__HYPERCALL_FAST(MMU_DEMAP_CTX)	184	__HYPERCALL_FAST(MMU_DEMAP_CTX)
195		185
196	/*	186	/*
197	* Save physmem_base for use by the mm subsystem.	187	* Save physmem_base for use by the mm subsystem.
198	* %l6 contains starting physical address	188	* %l6 contains starting physical address
199	*/	189	*/
200	sethi %hi(physmem_base), %l4	190	sethi %hi(physmem_base), %l4
201	stx %l6, [%l4 + %lo(physmem_base)]	191	stx %l6, [%l4 + %lo(physmem_base)]
202		192
203	/*	193	/*
204	* So far, we have not touched the stack.	194	* So far, we have not touched the stack.
205	* It is a good idea to set the kernel stack to a known state now.	195	* It is a good idea to set the kernel stack to a known state now.
206	*/	196	*/
207	sethi %hi(temporary_boot_stack), %sp	197	sethi %hi(temporary_boot_stack), %sp
208	or %sp, %lo(temporary_boot_stack), %sp	198	or %sp, %lo(temporary_boot_stack), %sp
209	sub %sp, STACK_BIAS, %sp	199	sub %sp, STACK_BIAS, %sp
210		200
211	or %l1, %g0, %o1	201	or %l1, %g0, %o1
212	or %l2, %g0, %o2	202	or %l2, %g0, %o2
213	sethi %hi(bootinfo), %o0	203	sethi %hi(bootinfo), %o0
214	call memcpy ! copy bootinfo	204	call memcpy ! copy bootinfo
215	or %o0, %lo(bootinfo), %o0	205	or %o0, %lo(bootinfo), %o0
216		206
217	call arch_pre_main	207	call arch_pre_main
218	nop	208	nop
219		209
220	call main_bsp	210	call main_bsp
221	nop	211	nop
222		212
223	/* Not reached. */	213	/* Not reached. */
224		214
225	0:	215	0:
226	ba 0b	216	ba 0b
227	nop	217	nop
228		218
229	.section K_DATA_START, "aw", @progbits	219	.section K_DATA_START, "aw", @progbits
230		220
231	#define INITIAL_STACK_SIZE 1024	221	#define INITIAL_STACK_SIZE 1024
232		222
233	.align STACK_ALIGNMENT	223	.align STACK_ALIGNMENT
234	.space INITIAL_STACK_SIZE	224	.space INITIAL_STACK_SIZE
235	.align STACK_ALIGNMENT	225	.align STACK_ALIGNMENT
236	temporary_boot_stack:	226	temporary_boot_stack:
237	.space STACK_WINDOW_SAVE_AREA_SIZE	227	.space STACK_WINDOW_SAVE_AREA_SIZE
238		228
239		229
240	.data	230	.data
241		231
242	.align 8	232	.align 8
243	.global physmem_base ! copy of the physical memory base address	233	.global physmem_base ! copy of the physical memory base address
244	physmem_base:	234	physmem_base:
245	.quad 0	235	.quad 0
246		236

Subversion Repositories HelenOS

(root)/branches/sparc/kernel/arch/sparc64/src/sun4v/start.S – Rev 3743 → 3770