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#include <arch/arch.h>
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#include <arch/arch.h>
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <arch/sun4v/regdef.h>
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#include <arch/sun4v/regdef.h>
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#include <arch/sun4v/hypercall.h>
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#include <arch/sun4v/hypercall.h>
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#include <arch/mm/pagesize.h>
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#include <arch/mm/sun4v/tte.h>
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#include <arch/mm/sun4v/tte.h>
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#include <arch/mm/sun4v/mmu.h>
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#include <arch/mm/sun4v/mmu.h>
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#include <arch/mm/tlb.h>
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#include <arch/mm/sun4v/tlb.h>
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.register %g2, #scratch
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.register %g2, #scratch
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.register %g3, #scratch
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.register %g3, #scratch
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.section K_TEXT_START, "ax"
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.section K_TEXT_START, "ax"
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#define BSP_FLAG		1
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#define BSP_FLAG		1
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#define PHYSMEM_ADDR_SIZE	56
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#define PHYSMEM_ADDR_SIZE	56
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/*
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/*
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 * SILO for an unknown reason loads the image to MAPPING_OFFSET + 0x4000 bytes
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 * from the start of the physical memory. We pretend that the physical memory
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 * starts MAPPING_OFFSET bytes further than it actually does.
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 */
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#define MAPPING_OFFSET		0x400000
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/*
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 * Flags set in the TTE data entry mapping the kernel.
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 * Flags set in the TTE data entry mapping the kernel.
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 */
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 */
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#ifdef CONFIG_VIRT_IDX_DCACHE
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#ifdef CONFIG_VIRT_IDX_DCACHE
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	#define TTE_FLAGS \
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	#define TTE_FLAGS \
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		(1 << TTE_V_SHIFT) \
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		(1 << TTE_V_SHIFT) \
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	srlx %l6, 13, %l5
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	srlx %l6, 13, %l5
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	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
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	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
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	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
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	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
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	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
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	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
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	! pretend the physical memory starts further
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	set MAPPING_OFFSET, %g2
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	add %l5, %g2, %l5
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	/*
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	/*
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	 * Setup basic runtime environment.
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	 * Setup basic runtime environment.
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	 */
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	 */
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	wrpr %g0, NWINDOWS - 2, %cansave	! set maximum saveable windows
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	wrpr %g0, NWINDOWS - 2, %cansave	! set maximum saveable windows