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Rev 3343 Rev 3365
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.section K_TEXT_START, "ax"
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.section K_TEXT_START, "ax"
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#define BSP_FLAG	1
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#define BSP_FLAG	1
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/*
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/*
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 * 2^PHYSMEM_ADDR_SIZE is the size of the physical address space on
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 * a given processor.
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 */
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#if defined (US2)
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    #define PHYSMEM_ADDR_SIZE	41
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#elif defined (US3)
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    #define PHYSMEM_ADDR_SIZE	43
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#endif
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/*
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 * Here is where the kernel is passed control from the boot loader.
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 * Here is where the kernel is passed control from the boot loader.
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 *
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 *
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 * The registers are expected to be in this state:
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 * The registers are expected to be in this state:
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 * - %o0 starting address of physical memory + bootstrap processor flag
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 * - %o0 starting address of physical memory + bootstrap processor flag
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 * 	bits 63...1:	physical memory starting address / 2
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 * 	bits 63...1:	physical memory starting address / 2
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kernel_image_start:
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kernel_image_start:
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	mov BSP_FLAG, %l0
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	mov BSP_FLAG, %l0
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	and %o0, %l0, %l7			! l7 <= bootstrap processor?
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	and %o0, %l0, %l7			! l7 <= bootstrap processor?
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	andn %o0, %l0, %l6			! l6 <= start of physical memory
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	andn %o0, %l0, %l6			! l6 <= start of physical memory
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	! Get bits 40:13 of physmem_base.
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	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
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	srlx %l6, 13, %l5
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	srlx %l6, 13, %l5
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	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
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	sllx %l5, 13 + (63 - 40), %l5
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	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
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	srlx %l5, 63 - 40, %l5			! l5 <= physmem_base[40:13]
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	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
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	/*
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	/*
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	 * Setup basic runtime environment.
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	 * Setup basic runtime environment.
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	 */
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	 */
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						! never need again
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						! never need again
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	wrpr %g0, 0, %otherwin			! make sure the window state is
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	wrpr %g0, 0, %otherwin			! make sure the window state is
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						! consistent
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						! consistent
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	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window
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	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window
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						! traps for kernel
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						! traps for kernel
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	wrpr %g0, 0, %wstate			! use the default spill/fill trap
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	wrpr %g0, 0, %tl			! TL = 0, primary context
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	wrpr %g0, 0, %tl			! TL = 0, primary context
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						! register is used
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						! register is used
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	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! disable interrupts and disable
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	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! disable interrupts and disable
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	sethi %hi(physmem_base), %l4
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	sethi %hi(physmem_base), %l4
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	stx %l6, [%l4 + %lo(physmem_base)]
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	stx %l6, [%l4 + %lo(physmem_base)]
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	/*
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	/*
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	 * Precompute kernel 8K TLB data template.
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	 * Precompute kernel 8K TLB data template.
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	 * %l5 contains starting physical address bits [40:13]
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	 * %l5 contains starting physical address
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	 * bits [(PHYSMEM_ADDR_SIZE - 1):13]
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	 */
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	 */
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	sethi %hi(kernel_8k_tlb_data_template), %l4
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	sethi %hi(kernel_8k_tlb_data_template), %l4
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	ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
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	ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
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	or %l3, %l5, %l3
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	or %l3, %l5, %l3
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	stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)]
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	stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)]