Subversion Repositories HelenOS

Rev

Rev 3493 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 3493 Rev 3742
Line 172... Line 172...
172 
     * equal values and kernel misses (context 0, ie. the nucleus context)
 172 
     * equal values and kernel misses (context 0, ie. the nucleus context)
173 
     * are excluded from the TSB miss handler, so it makes no sense
 173 
     * are excluded from the TSB miss handler, so it makes no sense
174 
     * to have separate TSBs for primary, secondary and nucleus contexts.
 174 
     * to have separate TSBs for primary, secondary and nucleus contexts.
175 
     * Clearing the extension registers will ensure that the value of the
 175 
     * Clearing the extension registers will ensure that the value of the
176 
     * TSB Base register will be used as an address of TSB, making the code
 176 
     * TSB Base register will be used as an address of TSB, making the code
177 
     * compatible with  the US port.
 177 
     * compatible with the US port.
178 
     */
 178 
     */
179 
    itsb_primary_extension_write(0);
 179 
    itsb_primary_extension_write(0);
180 
    itsb_nucleus_extension_write(0);
 180 
    itsb_nucleus_extension_write(0);
181 
    dtsb_primary_extension_write(0);
 181 
    dtsb_primary_extension_write(0);
182 
    dtsb_secondary_extension_write(0);
 182 
    dtsb_secondary_extension_write(0);