WebSVN – HelenOS – Diff – /branches/sparc/kernel/arch/sparc64/include/trap/sun4v/mmu.h


/*
 * Copyright (c) 2006 Jakub Jermar
 * Copyright (c) 2008 Pavel Rimsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup sparc64interrupt
 * @{
 */
/**
 * @file
 * @brief This file contains fast MMU trap handlers.
 */
 
#ifndef KERN_sparc64_sun4v_MMU_TRAP_H_
#define KERN_sparc64_sun4v_MMU_TRAP_H_
 
#include <arch/stack.h>
#include <arch/regdef.h>
#include <arch/arch.h>
#include <arch/sun4v/hypercall.h>
#include <arch/mm/tlb.h>
#include <arch/mm/mmu.h>
#include <arch/mm/tte.h>
#include <arch/trap/regwin.h>
 
#ifdef CONFIG_TSB
#include <arch/mm/tsb.h>
#endif
 
#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
#define TT_FAST_DATA_ACCESS_MMU_MISS        0x68
#define TT_FAST_DATA_ACCESS_PROTECTION      0x6c
#define TT_CPU_MONDO                0x7c
 
#define FAST_MMU_HANDLER_SIZE           128
 
#ifdef __ASM__
 
/* MMU fault status area data fault offset */
#define FSA_DFA_OFFSET              0x48
 
/* MMU fault status area data context */
#define FSA_DFC_OFFSET              0x50
 
/* offset of the target address within the TTE Data entry */
#define TTE_DATA_TADDR_OFFSET           13
 
.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
    PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
.endm
 
/*
 * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel
 * (context 0), an identity mapping (with displacement) is installed. Otherwise
 * a higher level service routine is called.
 */
.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
 
    mov SCRATCHPAD_MMU_FSA, %g1
    ldxa [%g1] ASI_SCRATCHPAD, %g1          ! g1 <= RA of MMU fault status area
 
    /* read faulting context */
    add %g1, FSA_DFC_OFFSET, %g2            ! g2 <= RA of data fault context
    ldxa [%g2] ASI_REAL, %g3            ! read the fault context
 
    /* read the faulting address */
    add %g1, FSA_DFA_OFFSET, %g2            ! g2 <= RA of data fault address
    ldxa [%g2] ASI_REAL, %g1            ! read the fault address
    srlx %g1, TTE_DATA_TADDR_OFFSET, %g1        ! truncate it to page boundary
    sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
 
    /* service by higher-level routine when context != 0 */
    brnz %g3, 0f
    nop
 
    /* exclude page number 0 from installing the identity mapping */
    brz %g1, 0f
    nop
 
    /*
     * Installing the identity does not fit into 32 instructions, call
     * a separate routine. The routine performs RETRY, hence the call never
     * returns.
     */
    ba install_identity_mapping
    nop
 
    0:
 
    /*
     * One of the scenarios in which this trap can occur is when the
     * register window spill/fill handler accesses a memory which is not
     * mapped. In such a case, this handler will be called from TL = 1.
     * We handle the situation by pretending that the MMU miss occurred
     * on TL = 0. Once the MMU miss trap is services, the instruction which
     * caused the spill/fill trap is restarted, the spill/fill trap occurs,
     * but this time its handler accesse memory which IS mapped.
     */
    .if (\tl > 0)
        wrpr %g0, 1, %tl
    .endif
 
    /*
     * Save the faulting virtual page and faulting context to the %g2
     * register. The most significant 51 bits of the %g2 register will
     * contain the virtual address which caused the fault truncated to the
     * page boundary. The least significant 13 bits of the %g2 register
     * will contain the number of the context in which the fault occurred.
     * The value of the %g2 register will be passed as a parameter to the
     * higher level service routine.
     */
    or %g1, %g3, %g2
 
    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
.endm
 
/*
 * Handler of the Fast Data MMU Protection trap. Finds the trapping address
 * and context and calls higher level service routine.
 */
.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
    /*
     * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
     */
    .if (\tl > 0)
        wrpr %g0, 1, %tl
    .endif
 
    mov SCRATCHPAD_MMU_FSA, %g1
    ldxa [%g1] ASI_SCRATCHPAD, %g1          ! g1 <= RA of MMU fault status area
 
    /* read faulting context */
    add %g1, FSA_DFC_OFFSET, %g2            ! g2 <= RA of data fault context
    ldxa [%g2] ASI_REAL, %g3            ! read the fault context
 
    /* read the faulting address */
    add %g1, FSA_DFA_OFFSET, %g2            ! g2 <= RA of data fault address
    ldxa [%g2] ASI_REAL, %g1            ! read the fault address
    srlx %g1, TTE_DATA_TADDR_OFFSET, %g1        ! truncate it to page boundary
    sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
 
    /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */
    or %g1, %g3, %g2
 
    PREEMPTIBLE_HANDLER fast_data_access_protection
.endm
 
#endif /* __ASM__ */
 
#endif
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/branches/sparc/kernel/arch/sparc64/include/trap/sun4v/mmu.h @ 3748 – Rev 3993 → 4638

Rev 3993		Rev 4638
1	/*	1	/*
2	* Copyright (c) 2006 Jakub Jermar	2	* Copyright (c) 2006 Jakub Jermar
3	* Copyright (c) 2008 Pavel Rimsky	3	* Copyright (c) 2008 Pavel Rimsky
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup sparc64interrupt	30	/** @addtogroup sparc64interrupt
31	* @{	31	* @{
32	*/	32	*/
33	/**	33	/**
34	* @file	34	* @file
35	* @brief This file contains fast MMU trap handlers.	35	* @brief This file contains fast MMU trap handlers.
36	*/	36	*/
37		37
38	#ifndef KERN_sparc64_sun4v_MMU_TRAP_H_	38	#ifndef KERN_sparc64_sun4v_MMU_TRAP_H_
39	#define KERN_sparc64_sun4v_MMU_TRAP_H_	39	#define KERN_sparc64_sun4v_MMU_TRAP_H_
40		40
41	#include <arch/stack.h>	41	#include <arch/stack.h>
42	#include <arch/regdef.h>	42	#include <arch/regdef.h>
43	#include <arch/arch.h>	43	#include <arch/arch.h>
44	#include <arch/sun4v/hypercall.h>	44	#include <arch/sun4v/hypercall.h>
45	#include <arch/mm/tlb.h>	45	#include <arch/mm/tlb.h>
46	#include <arch/mm/mmu.h>	46	#include <arch/mm/mmu.h>
47	#include <arch/mm/tte.h>	47	#include <arch/mm/tte.h>
48	#include <arch/trap/regwin.h>	48	#include <arch/trap/regwin.h>
49		49
50	#ifdef CONFIG_TSB	50	#ifdef CONFIG_TSB
51	#include <arch/mm/tsb.h>	51	#include <arch/mm/tsb.h>
52	#endif	52	#endif
53		53
54	#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64	54	#define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
55	#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68	55	#define TT_FAST_DATA_ACCESS_MMU_MISS 0x68
56	#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c	56	#define TT_FAST_DATA_ACCESS_PROTECTION 0x6c
-		57	#define TT_CPU_MONDO 0x7c
57		58
58	#define FAST_MMU_HANDLER_SIZE 128	59	#define FAST_MMU_HANDLER_SIZE 128
59		60
60	#ifdef __ASM__	61	#ifdef __ASM__
61		62
62	/* MMU fault status area data fault offset */	63	/* MMU fault status area data fault offset */
63	#define FSA_DFA_OFFSET 0x48	64	#define FSA_DFA_OFFSET 0x48
64		65
65	/* MMU fault status area data context */	66	/* MMU fault status area data context */
66	#define FSA_DFC_OFFSET 0x50	67	#define FSA_DFC_OFFSET 0x50
67		68
68	/* offset of the target address within the TTE Data entry */	69	/* offset of the target address within the TTE Data entry */
69	#define TTE_DATA_TADDR_OFFSET 13	70	#define TTE_DATA_TADDR_OFFSET 13
70		71
71	.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER	72	.macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
72	PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss	73	PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
73	.endm	74	.endm
74		75
75	/*	76	/*
76	* Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel	77	* Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel
77	* (context 0), an identity mapping (with displacement) is installed. Otherwise	78	* (context 0), an identity mapping (with displacement) is installed. Otherwise
78	* a higher level service routine is called.	79	* a higher level service routine is called.
79	*/	80	*/
80	.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl	81	.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
81		82
82	mov SCRATCHPAD_MMU_FSA, %g1	83	mov SCRATCHPAD_MMU_FSA, %g1
83	ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area	84	ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area
84		85
85	/* read faulting context */	86	/* read faulting context */
86	add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context	87	add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context
87	ldxa [%g2] ASI_REAL, %g3 ! read the fault context	88	ldxa [%g2] ASI_REAL, %g3 ! read the fault context
88		89
89	/* read the faulting address */	90	/* read the faulting address */
90	add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address	91	add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address
91	ldxa [%g2] ASI_REAL, %g1 ! read the fault address	92	ldxa [%g2] ASI_REAL, %g1 ! read the fault address
92	srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary	93	srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary
93	sllx %g1, TTE_DATA_TADDR_OFFSET, %g1	94	sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
94		95
95	/* service by higher-level routine when context != 0 */	96	/* service by higher-level routine when context != 0 */
96	brnz %g3, 0f	97	brnz %g3, 0f
97	nop	98	nop
98		99
99	/* exclude page number 0 from installing the identity mapping */	100	/* exclude page number 0 from installing the identity mapping */
100	brz %g1, 0f	101	brz %g1, 0f
101	nop	102	nop
102		103
103	/*	104	/*
104	* Installing the identity does not fit into 32 instructions, call	105	* Installing the identity does not fit into 32 instructions, call
105	* a separate routine. The routine performs RETRY, hence the call never	106	* a separate routine. The routine performs RETRY, hence the call never
106	* returns.	107	* returns.
107	*/	108	*/
108	ba install_identity_mapping	109	ba install_identity_mapping
109	nop	110	nop
110		111
111	0:	112	0:
112		113
113	/*	114	/*
114	* One of the scenarios in which this trap can occur is when the	115	* One of the scenarios in which this trap can occur is when the
115	* register window spill/fill handler accesses a memory which is not	116	* register window spill/fill handler accesses a memory which is not
116	* mapped. In such a case, this handler will be called from TL = 1.	117	* mapped. In such a case, this handler will be called from TL = 1.
117	* We handle the situation by pretending that the MMU miss occurred	118	* We handle the situation by pretending that the MMU miss occurred
118	* on TL = 0. Once the MMU miss trap is services, the instruction which	119	* on TL = 0. Once the MMU miss trap is services, the instruction which
119	* caused the spill/fill trap is restarted, the spill/fill trap occurs,	120	* caused the spill/fill trap is restarted, the spill/fill trap occurs,
120	* but this time its handler accesse memory which IS mapped.	121	* but this time its handler accesse memory which IS mapped.
121	*/	122	*/
122	.if (\tl > 0)	123	.if (\tl > 0)
123	wrpr %g0, 1, %tl	124	wrpr %g0, 1, %tl
124	.endif	125	.endif
125		126
126	/*	127	/*
127	* Save the faulting virtual page and faulting context to the %g2	128	* Save the faulting virtual page and faulting context to the %g2
128	* register. The most significant 51 bits of the %g2 register will	129	* register. The most significant 51 bits of the %g2 register will
129	* contain the virtual address which caused the fault truncated to the	130	* contain the virtual address which caused the fault truncated to the
130	* page boundary. The least significant 13 bits of the %g2 register	131	* page boundary. The least significant 13 bits of the %g2 register
131	* will contain the number of the context in which the fault occurred.	132	* will contain the number of the context in which the fault occurred.
132	* The value of the %g2 register will be passed as a parameter to the	133	* The value of the %g2 register will be passed as a parameter to the
133	* higher level service routine.	134	* higher level service routine.
134	*/	135	*/
135	or %g1, %g3, %g2	136	or %g1, %g3, %g2
136		137
137	PREEMPTIBLE_HANDLER fast_data_access_mmu_miss	138	PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
138	.endm	139	.endm
139		140
140	/*	141	/*
141	* Handler of the Fast Data MMU Protection trap. Finds the trapping address	142	* Handler of the Fast Data MMU Protection trap. Finds the trapping address
142	* and context and calls higher level service routine.	143	* and context and calls higher level service routine.
143	*/	144	*/
144	.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl	145	.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
145	/*	146	/*
146	* The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.	147	* The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
147	*/	148	*/
148	.if (\tl > 0)	149	.if (\tl > 0)
149	wrpr %g0, 1, %tl	150	wrpr %g0, 1, %tl
150	.endif	151	.endif
151		152
152	mov SCRATCHPAD_MMU_FSA, %g1	153	mov SCRATCHPAD_MMU_FSA, %g1
153	ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area	154	ldxa [%g1] ASI_SCRATCHPAD, %g1 ! g1 <= RA of MMU fault status area
154		155
155	/* read faulting context */	156	/* read faulting context */
156	add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context	157	add %g1, FSA_DFC_OFFSET, %g2 ! g2 <= RA of data fault context
157	ldxa [%g2] ASI_REAL, %g3 ! read the fault context	158	ldxa [%g2] ASI_REAL, %g3 ! read the fault context
158		159
159	/* read the faulting address */	160	/* read the faulting address */
160	add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address	161	add %g1, FSA_DFA_OFFSET, %g2 ! g2 <= RA of data fault address
161	ldxa [%g2] ASI_REAL, %g1 ! read the fault address	162	ldxa [%g2] ASI_REAL, %g1 ! read the fault address
162	srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary	163	srlx %g1, TTE_DATA_TADDR_OFFSET, %g1 ! truncate it to page boundary
163	sllx %g1, TTE_DATA_TADDR_OFFSET, %g1	164	sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
164		165
165	/* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */	166	/* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */
166	or %g1, %g3, %g2	167	or %g1, %g3, %g2
167		168
168	PREEMPTIBLE_HANDLER fast_data_access_protection	169	PREEMPTIBLE_HANDLER fast_data_access_protection
169	.endm	170	.endm
170		171
171	#endif /* __ASM__ */	172	#endif /* __ASM__ */
172		173
173	#endif	174	#endif
174		175
175	/** @}	176	/** @}
176	*/	177	*/
177		178