WebSVN – HelenOS – Diff – /branches/sparc/kernel/arch/mips32/src/exception.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32 
 * @{
 */
/** @file
 */
 
#include <arch/exception.h>
#include <arch/interrupt.h>
#include <arch/mm/tlb.h>
#include <panic.h>
#include <arch/cp0.h>
#include <arch/types.h>
#include <arch.h>
#include <debug.h>
#include <proc/thread.h>
#include <symtab.h>
#include <print.h>
#include <interrupt.h>
#include <func.h>
 
#include <ddi/irq.h>
#include <arch/debugger.h>
 
static char * exctable[] = {
    "Interrupt",
    "TLB Modified",
    "TLB Invalid",
    "TLB Invalid Store",
    "Address Error - load/instr. fetch",
    "Address Error - store",
    "Bus Error - fetch instruction",
    "Bus Error - data reference",
    "Syscall",
    "BreakPoint",
    "Reserved Instruction",
    "Coprocessor Unusable",
    "Arithmetic Overflow",
    "Trap",
    "Virtual Coherency - instruction",
    "Floating Point",
    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    "WatchHi/WatchLo", /* 23 */
    NULL, NULL, NULL, NULL, NULL, NULL, NULL,
    "Virtual Coherency - data",
};
 
static void print_regdump(istate_t *istate)
{
    char *pcsymbol = "";
    char *rasymbol = "";
 
    char *s = get_symtab_entry(istate->epc);
    if (s)
        pcsymbol = s;
    s = get_symtab_entry(istate->ra);
    if (s)
        rasymbol = s;
   
    printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
}
 
static void unhandled_exception(int n, istate_t *istate)
{
    fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
   
    print_regdump(istate);
    panic("unhandled exception %s\n", exctable[n]);
}
 
static void reserved_instr_exception(int n, istate_t *istate)
{
    if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
        ASSERT(THREAD);
        istate->epc += 4;
        istate->v1 = istate->k1;
    } else
        unhandled_exception(n, istate);
}
 
static void breakpoint_exception(int n, istate_t *istate)
{
#ifdef CONFIG_DEBUG
    debugger_bpoint(istate);
#else
    /* it is necessary to not re-execute BREAK instruction after
       returning from Exception handler
       (see page 138 in R4000 Manual for more information) */
    istate->epc += 4;
#endif
}
 
static void tlbmod_exception(int n, istate_t *istate)
{
    tlb_modified(istate);
}
 
static void tlbinv_exception(int n, istate_t *istate)
{
    tlb_invalid(istate);
}
 
#ifdef CONFIG_FPU_LAZY
static void cpuns_exception(int n, istate_t *istate)
{
    if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
        scheduler_fpu_lazy_request();
    else {
        fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
        panic("unhandled Coprocessor Unusable Exception\n");
    }
}
#endif
 
static void interrupt_exception(int n, istate_t *istate)
{
    uint32_t cause;
    int i;
   
    /* decode interrupt number and process the interrupt */
    cause = (cp0_cause_read() >> 8) &0xff;
   
    for (i = 0; i < 8; i++) {
        if (cause & (1 << i)) {
            irq_t *irq = irq_dispatch_and_lock(i);
            if (irq) {
                /*
                 * The IRQ handler was found.
                 */
                irq->handler(irq, irq->arg);
                spinlock_unlock(&irq->lock);
            } else {
                /*
                 * Spurious interrupt.
                 */
#ifdef CONFIG_DEBUG
                printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, i);
#endif
            }
        }
    }
}
 
/** Handle syscall userspace call */
static void syscall_exception(int n, istate_t *istate)
{
    panic("Syscall is handled through shortcut");
}
 
void exception_init(void)
{
    int i;
 
    /* Clear exception table */
    for (i = 0; i < IVT_ITEMS; i++)
        exc_register(i, "undef", (iroutine) unhandled_exception);
   
    exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
    exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
    exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
    exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
    exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
    exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
#ifdef CONFIG_FPU_LAZY
    exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
#endif
    exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
}
 
/** @}
 */
 

Rev 3343	Rev 3742
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/exception.h>	35	#include <arch/exception.h>
36	#include <arch/interrupt.h>	36	#include <arch/interrupt.h>
37	#include <arch/mm/tlb.h>	37	#include <arch/mm/tlb.h>
38	#include <panic.h>	38	#include <panic.h>
39	#include <arch/cp0.h>	39	#include <arch/cp0.h>
40	#include <arch/types.h>	40	#include <arch/types.h>
41	#include <arch.h>	41	#include <arch.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <symtab.h>	44	#include <symtab.h>
45	#include <print.h>	45	#include <print.h>
46	#include <interrupt.h>	46	#include <interrupt.h>
47	#include <func.h>	47	#include <func.h>
48	#include <console/kconsole.h>	-
49	#include <ddi/irq.h>	48	#include <ddi/irq.h>
50	#include <arch/debugger.h>	49	#include <arch/debugger.h>
51		50
52	static char * exctable[] = {	51	static char * exctable[] = {
53	"Interrupt",	52	"Interrupt",
54	"TLB Modified",	53	"TLB Modified",
55	"TLB Invalid",	54	"TLB Invalid",
56	"TLB Invalid Store",	55	"TLB Invalid Store",
57	"Address Error - load/instr. fetch",	56	"Address Error - load/instr. fetch",
58	"Address Error - store",	57	"Address Error - store",
59	"Bus Error - fetch instruction",	58	"Bus Error - fetch instruction",
60	"Bus Error - data reference",	59	"Bus Error - data reference",
61	"Syscall",	60	"Syscall",
62	"BreakPoint",	61	"BreakPoint",
63	"Reserved Instruction",	62	"Reserved Instruction",
64	"Coprocessor Unusable",	63	"Coprocessor Unusable",
65	"Arithmetic Overflow",	64	"Arithmetic Overflow",
66	"Trap",	65	"Trap",
67	"Virtual Coherency - instruction",	66	"Virtual Coherency - instruction",
68	"Floating Point",	67	"Floating Point",
69	NULL, NULL, NULL, NULL, NULL, NULL, NULL,	68	NULL, NULL, NULL, NULL, NULL, NULL, NULL,
70	"WatchHi/WatchLo", /* 23 */	69	"WatchHi/WatchLo", /* 23 */
71	NULL, NULL, NULL, NULL, NULL, NULL, NULL,	70	NULL, NULL, NULL, NULL, NULL, NULL, NULL,
72	"Virtual Coherency - data",	71	"Virtual Coherency - data",
73	};	72	};
74		73
75	static void print_regdump(istate_t *istate)	74	static void print_regdump(istate_t *istate)
76	{	75	{
77	char *pcsymbol = "";	76	char *pcsymbol = "";
78	char *rasymbol = "";	77	char *rasymbol = "";
79		78
80	char *s = get_symtab_entry(istate->epc);	79	char *s = get_symtab_entry(istate->epc);
81	if (s)	80	if (s)
82	pcsymbol = s;	81	pcsymbol = s;
83	s = get_symtab_entry(istate->ra);	82	s = get_symtab_entry(istate->ra);
84	if (s)	83	if (s)
85	rasymbol = s;	84	rasymbol = s;
86		85
87	printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);	86	printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
88	}	87	}
89		88
90	static void unhandled_exception(int n, istate_t *istate)	89	static void unhandled_exception(int n, istate_t *istate)
91	{	90	{
92	fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);	91	fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
93		92
94	print_regdump(istate);	93	print_regdump(istate);
95	panic("unhandled exception %s\n", exctable[n]);	94	panic("unhandled exception %s\n", exctable[n]);
96	}	95	}
97		96
98	static void reserved_instr_exception(int n, istate_t *istate)	97	static void reserved_instr_exception(int n, istate_t *istate)
99	{	98	{
100	if (((uint32_t )istate->epc) == 0x7c03e83b) {	99	if (((uint32_t )istate->epc) == 0x7c03e83b) {
101	ASSERT(THREAD);	100	ASSERT(THREAD);
102	istate->epc += 4;	101	istate->epc += 4;
103	istate->v1 = istate->k1;	102	istate->v1 = istate->k1;
104	} else	103	} else
105	unhandled_exception(n, istate);	104	unhandled_exception(n, istate);
106	}	105	}
107		106
108	static void breakpoint_exception(int n, istate_t *istate)	107	static void breakpoint_exception(int n, istate_t *istate)
109	{	108	{
110	#ifdef CONFIG_DEBUG	109	#ifdef CONFIG_DEBUG
111	debugger_bpoint(istate);	110	debugger_bpoint(istate);
112	#else	111	#else
113	/* it is necessary to not re-execute BREAK instruction after	112	/* it is necessary to not re-execute BREAK instruction after
114	returning from Exception handler	113	returning from Exception handler
115	(see page 138 in R4000 Manual for more information) */	114	(see page 138 in R4000 Manual for more information) */
116	istate->epc += 4;	115	istate->epc += 4;
117	#endif	116	#endif
118	}	117	}
119		118
120	static void tlbmod_exception(int n, istate_t *istate)	119	static void tlbmod_exception(int n, istate_t *istate)
121	{	120	{
122	tlb_modified(istate);	121	tlb_modified(istate);
123	}	122	}
124		123
125	static void tlbinv_exception(int n, istate_t *istate)	124	static void tlbinv_exception(int n, istate_t *istate)
126	{	125	{
127	tlb_invalid(istate);	126	tlb_invalid(istate);
128	}	127	}
129		128
130	#ifdef CONFIG_FPU_LAZY	129	#ifdef CONFIG_FPU_LAZY
131	static void cpuns_exception(int n, istate_t *istate)	130	static void cpuns_exception(int n, istate_t *istate)
132	{	131	{
133	if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)	132	if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
134	scheduler_fpu_lazy_request();	133	scheduler_fpu_lazy_request();
135	else {	134	else {
136	fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");	135	fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
137	panic("unhandled Coprocessor Unusable Exception\n");	136	panic("unhandled Coprocessor Unusable Exception\n");
138	}	137	}
139	}	138	}
140	#endif	139	#endif
141		140
142	static void interrupt_exception(int n, istate_t *istate)	141	static void interrupt_exception(int n, istate_t *istate)
143	{	142	{
144	uint32_t cause;	143	uint32_t cause;
145	int i;	144	int i;
146		145
147	/* decode interrupt number and process the interrupt */	146	/* decode interrupt number and process the interrupt */
148	cause = (cp0_cause_read() >> 8) &0xff;	147	cause = (cp0_cause_read() >> 8) &0xff;
149		148
150	for (i = 0; i < 8; i++) {	149	for (i = 0; i < 8; i++) {
151	if (cause & (1 << i)) {	150	if (cause & (1 << i)) {
152	irq_t *irq = irq_dispatch_and_lock(i);	151	irq_t *irq = irq_dispatch_and_lock(i);
153	if (irq) {	152	if (irq) {
154	/*	153	/*
155	* The IRQ handler was found.	154	* The IRQ handler was found.
156	*/	155	*/
157	irq->handler(irq, irq->arg);	156	irq->handler(irq, irq->arg);
158	spinlock_unlock(&irq->lock);	157	spinlock_unlock(&irq->lock);
159	} else {	158	} else {
160	/*	159	/*
161	* Spurious interrupt.	160	* Spurious interrupt.
162	*/	161	*/
163	#ifdef CONFIG_DEBUG	162	#ifdef CONFIG_DEBUG
164	printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, i);	163	printf("cpu%u: spurious interrupt (inum=%d)\n", CPU->id, i);
165	#endif	164	#endif
166	}	165	}
167	}	166	}
168	}	167	}
169	}	168	}
170		169
171	/** Handle syscall userspace call */	170	/** Handle syscall userspace call */
172	static void syscall_exception(int n, istate_t *istate)	171	static void syscall_exception(int n, istate_t *istate)
173	{	172	{
174	panic("Syscall is handled through shortcut");	173	panic("Syscall is handled through shortcut");
175	}	174	}
176		175
177	void exception_init(void)	176	void exception_init(void)
178	{	177	{
179	int i;	178	int i;
180		179
181	/* Clear exception table */	180	/* Clear exception table */
182	for (i = 0; i < IVT_ITEMS; i++)	181	for (i = 0; i < IVT_ITEMS; i++)
183	exc_register(i, "undef", (iroutine) unhandled_exception);	182	exc_register(i, "undef", (iroutine) unhandled_exception);
184		183
185	exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);	184	exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
186	exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);	185	exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
187	exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);	186	exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
188	exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);	187	exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
189	exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);	188	exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
190	exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);	189	exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
191	#ifdef CONFIG_FPU_LAZY	190	#ifdef CONFIG_FPU_LAZY
192	exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);	191	exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
193	#endif	192	#endif
194	exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);	193	exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
195	}	194	}
196		195
197	/** @}	196	/** @}
198	*/	197	*/
199		198

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(root)/branches/sparc/kernel/arch/mips32/src/exception.c – Rev 3343 → 3742