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/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
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 * Copyright (c) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/drivers/ega.h>
54
#include <arch/drivers/ega.h>
55
#include <arch/bootinfo.h>
55
#include <arch/bootinfo.h>
56
#include <genarch/kbd/i8042.h>
56
#include <genarch/kbd/i8042.h>
-
 
57
#include <genarch/kbd/ns16550.h>
-
 
58
#include <smp/smp.h>
-
 
59
#include <smp/ipi.h>
-
 
60
#include <arch/atomic.h>
-
 
61
#include <panic.h>
-
 
62
#include <print.h>
-
 
63
 
-
 
64
/*NS16550 as a COM 1*/
-
 
65
#define NS16550_IRQ 4
-
 
66
#define NS16550_PORT 0x3f8
57
 
67
 
58
bootinfo_t *bootinfo;
68
bootinfo_t *bootinfo;
59
 
69
 
60
void arch_pre_main(void)
70
void arch_pre_main(void)
61
{
71
{
62
    /* Setup usermode init tasks. */
72
    /* Setup usermode init tasks. */
63
 
73
 
64
//#ifdef I460GX
74
//#ifdef I460GX
65
    unsigned int i;
75
    unsigned int i;
66
   
76
   
67
    init.cnt = bootinfo->taskmap.count;
77
    init.cnt = bootinfo->taskmap.count;
68
   
78
   
69
    for (i = 0; i < init.cnt; i++) {
79
    for (i = 0; i < init.cnt; i++) {
70
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
80
        init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK;
71
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
81
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
72
    }
82
    }
73
/*
83
/*
74
#else  
84
#else  
75
    init.cnt = 8;
85
    init.cnt = 8;
76
    init.tasks[0].addr = INIT0_ADDRESS;
86
    init.tasks[0].addr = INIT0_ADDRESS;
77
    init.tasks[0].size = INIT0_SIZE;
87
    init.tasks[0].size = INIT0_SIZE;
78
    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
88
    init.tasks[1].addr = INIT0_ADDRESS + 0x400000;
79
    init.tasks[1].size = INIT0_SIZE;
89
    init.tasks[1].size = INIT0_SIZE;
80
    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
90
    init.tasks[2].addr = INIT0_ADDRESS + 0x800000;
81
    init.tasks[2].size = INIT0_SIZE;
91
    init.tasks[2].size = INIT0_SIZE;
82
    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
92
    init.tasks[3].addr = INIT0_ADDRESS + 0xc00000;
83
    init.tasks[3].size = INIT0_SIZE;
93
    init.tasks[3].size = INIT0_SIZE;
84
    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
94
    init.tasks[4].addr = INIT0_ADDRESS + 0x1000000;
85
    init.tasks[4].size = INIT0_SIZE;
95
    init.tasks[4].size = INIT0_SIZE;
86
    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
96
    init.tasks[5].addr = INIT0_ADDRESS + 0x1400000;
87
    init.tasks[5].size = INIT0_SIZE;
97
    init.tasks[5].size = INIT0_SIZE;
88
    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
98
    init.tasks[6].addr = INIT0_ADDRESS + 0x1800000;
89
    init.tasks[6].size = INIT0_SIZE;
99
    init.tasks[6].size = INIT0_SIZE;
90
    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
100
    init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000;
91
    init.tasks[7].size = INIT0_SIZE;
101
    init.tasks[7].size = INIT0_SIZE;
92
#endif*/
102
#endif*/
93
}
103
}
94
 
104
 
95
void arch_pre_mm_init(void)
105
void arch_pre_mm_init(void)
96
{
106
{
97
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
107
    /* Set Interruption Vector Address (i.e. location of interruption vector table). */
98
    iva_write((uintptr_t) &ivt);
108
    iva_write((uintptr_t) &ivt);
99
    srlz_d();
109
    srlz_d();
100
   
110
   
101
}
111
}
102
 
112
 
103
void arch_post_mm_init(void)
113
void arch_post_mm_init(void)
104
{
114
{
-
 
115
    if(config.cpu_active==1)
-
 
116
    {
105
    irq_init(INR_COUNT, INR_COUNT);
117
        irq_init(INR_COUNT, INR_COUNT);
106
#ifdef SKI
118
#ifdef SKI
107
    ski_init_console();
119
        ski_init_console();
108
#else   
120
#else   
109
    ega_init();
121
        ega_init();
110
#endif  
122
#endif  
-
 
123
    }
111
    it_init(); 
124
    it_init(); 
112
}
125
}
113
 
126
 
114
void arch_post_cpu_init(void)
127
void arch_post_cpu_init(void)
115
{
128
{
116
}
129
}
117
 
130
 
118
void arch_pre_smp_init(void)
131
void arch_pre_smp_init(void)
119
{
132
{
120
}
133
}
121
 
134
 
122
 
135
 
123
#ifdef I460GX
136
#ifdef I460GX
124
#define POLL_INTERVAL       50000       /* 50 ms */
137
#define POLL_INTERVAL       50000       /* 50 ms */
125
/** Kernel thread for polling keyboard. */
138
/** Kernel thread for polling keyboard. */
126
static void i8042_kkbdpoll(void *arg)
139
static void i8042_kkbdpoll(void *arg)
127
{
140
{
128
    while (1) {
141
    while (1) {
129
        i8042_poll();
142
        i8042_poll();
-
 
143
#ifdef CONFIG_NS16550
-
 
144
        ns16550_poll();
-
 
145
#endif
130
        thread_usleep(POLL_INTERVAL);
146
        thread_usleep(POLL_INTERVAL);
131
    }
147
    }
132
}
148
}
133
#endif
149
#endif
134
 
150
 
135
void arch_post_smp_init(void)
151
void arch_post_smp_init(void)
136
{
152
{
137
 
153
 
138
    if (config.cpu_active == 1) {
154
    {
139
        /*
155
        /*
140
         * Create thread that polls keyboard.
156
         * Create thread that polls keyboard.
141
         */
157
         */
142
#ifdef SKI
158
#ifdef SKI
143
        thread_t *t;
159
        thread_t *t;
144
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
160
        t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
145
        if (!t)
161
        if (!t)
146
            panic("cannot create kkbdpoll\n");
162
            panic("cannot create kkbdpoll\n");
147
        thread_ready(t);
163
        thread_ready(t);
148
#endif      
164
#endif      
149
 
165
 
150
#ifdef I460GX
166
#ifdef I460GX
151
        devno_t kbd = device_assign_devno();
167
        devno_t kbd = device_assign_devno();
152
        devno_t mouse = device_assign_devno();
168
        devno_t mouse = device_assign_devno();
153
        /* keyboard controller */
169
        /* keyboard controller */
154
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
170
        i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
155
 
171
 
-
 
172
#ifdef CONFIG_NS16550
-
 
173
        ns16550_init(kbd, NS16550_IRQ, NS16550_PORT); // as a COM 1
-
 
174
#else
-
 
175
#endif
156
        thread_t *t;
176
        thread_t *t;
157
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
177
        t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
158
        if (!t)
178
        if (!t)
159
            panic("cannot create kkbdpoll\n");
179
            panic("cannot create kkbdpoll\n");
160
        thread_ready(t);
180
        thread_ready(t);
161
 
181
 
162
#endif
182
#endif
163
 
183
 
164
    }
184
    }
165
}
185
}
166
 
186
 
-
 
187
 
167
/** Enter userspace and never return. */
188
/** Enter userspace and never return. */
168
void userspace(uspace_arg_t *kernel_uarg)
189
void userspace(uspace_arg_t *kernel_uarg)
169
{
190
{
170
    psr_t psr;
191
    psr_t psr;
171
    rsc_t rsc;
192
    rsc_t rsc;
172
 
193
 
173
    psr.value = psr_read();
194
    psr.value = psr_read();
174
    psr.cpl = PL_USER;
195
    psr.cpl = PL_USER;
175
    psr.i = true;               /* start with interrupts enabled */
196
    psr.i = true;               /* start with interrupts enabled */
176
    psr.ic = true;
197
    psr.ic = true;
177
    psr.ri = 0;             /* start with instruction #0 */
198
    psr.ri = 0;             /* start with instruction #0 */
178
    psr.bn = 1;             /* start in bank 0 */
199
    psr.bn = 1;             /* start in bank 0 */
179
 
200
 
180
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
201
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
181
    rsc.loadrs = 0;
202
    rsc.loadrs = 0;
182
    rsc.be = false;
203
    rsc.be = false;
183
    rsc.pl = PL_USER;
204
    rsc.pl = PL_USER;
184
    rsc.mode = 3;               /* eager mode */
205
    rsc.mode = 3;               /* eager mode */
185
 
206
 
186
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
207
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
187
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
208
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
188
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
209
                ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE,
189
                (uintptr_t) kernel_uarg->uspace_uarg,
210
                (uintptr_t) kernel_uarg->uspace_uarg,
190
                psr.value, rsc.value);
211
                psr.value, rsc.value);
191
 
212
 
192
    while (1) {
213
    while (1) {
193
        ;
214
        ;
194
    }
215
    }
195
}
216
}
196
 
217
 
197
/** Set thread-local-storage pointer.
218
/** Set thread-local-storage pointer.
198
 *
219
 *
199
 * We use r13 (a.k.a. tp) for this purpose.
220
 * We use r13 (a.k.a. tp) for this purpose.
200
 */
221
 */
201
unative_t sys_tls_set(unative_t addr)
222
unative_t sys_tls_set(unative_t addr)
202
{
223
{
203
        return 0;
224
        return 0;
204
}
225
}
205
 
226
 
206
/** Acquire console back for kernel
227
/** Acquire console back for kernel
207
 *
228
 *
208
 */
229
 */
209
void arch_grab_console(void)
230
void arch_grab_console(void)
210
{
231
{
211
#ifdef SKI
232
#ifdef SKI
212
    ski_kbd_grab();
233
    ski_kbd_grab();
213
#endif  
234
#endif  
214
}
235
}
215
/** Return console to userspace
236
/** Return console to userspace
216
 *
237
 *
217
 */
238
 */
218
void arch_release_console(void)
239
void arch_release_console(void)
219
{
240
{
220
#ifdef SKI
241
#ifdef SKI
221
    ski_kbd_release();
242
    ski_kbd_release();
222
#endif
243
#endif
223
}
244
}
224
 
245
 
225
void arch_reboot(void)
246
void arch_reboot(void)
226
{
247
{
227
    // TODO
248
    outb(0x64,0xfe);
228
    while (1);
249
    while (1);
229
}
250
}
230
 
251
 
231
/** @}
252
/** @}
232
 */
253
 */
233
 
254