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	/*
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	/*
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	 * We have copied code and now we need to guarantee cache coherence.
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	 * We have copied code and now we need to guarantee cache coherence.
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	 * 1. Make sure that the code we have moved has drained to main memory.
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	 * 1. Make sure that the code we have moved has drained to main memory.
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	 * 2. Invalidate I-cache.
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	 * 2. Invalidate I-cache.
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	 * 3. Flush instruction pipeline.
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	 * 3. Flush instruction pipeline.
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	 */
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	/*
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	 * US-III processors have a write-invalidate cache, so flushing it is
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	 * not required. We only use the FLUSH instruction to flush the
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	 * pipeline.
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	 */
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	 */
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#ifdef US2
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	call	icache_flush
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	call	icache_flush
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#endif
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	membar	#StoreStore
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	membar	#StoreStore
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	flush	%i7
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	flush	%i7
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	mov %o0, %l1
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	mov %o0, %l1
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	mov %o1, %o0
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	mov %o1, %o0