WebSVN – HelenOS – Diff – /branches/network/kernel/arch/ia64/include/mm/tlb.h


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64mm 
 * @{
 */
/** @file
 */
 
#ifndef KERN_ia64_TLB_H_
#define KERN_ia64_TLB_H_
 
#include <arch/mm/page.h>
#include <arch/mm/asid.h>
#include <arch/interrupt.h>
#include <arch/types.h>
 
/** Data and instruction Translation Register indices. */
#define DTR_KERNEL  0
#define ITR_KERNEL  0
#define DTR_KSTACK1 4
#define DTR_KSTACK2 5
 
/** Portion of TLB insertion format data structure. */
union tlb_entry {
    uint64_t word[2];
    struct {
        /* Word 0 */
        unsigned p : 1;         /**< Present. */
        unsigned : 1;
        unsigned ma : 3;        /**< Memory attribute. */
        unsigned a : 1;         /**< Accessed. */
        unsigned d : 1;         /**< Dirty. */
        unsigned pl : 2;        /**< Privilege level. */
        unsigned ar : 3;        /**< Access rights. */
        unsigned long long ppn : 38;    /**< Physical Page Number, a.k.a. PFN. */
        unsigned : 2;
        unsigned ed : 1;
        unsigned ig1 : 11;
 
        /* Word 1 */
        unsigned : 2;
        unsigned ps : 6;        /**< Page size will be 2^ps. */
        unsigned key : 24;      /**< Protection key, unused. */
        unsigned : 32;
    } __attribute__ ((packed));
} __attribute__ ((packed));
typedef union tlb_entry tlb_entry_t;
 
extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc);
extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
 
extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr);
extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
 
extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr);
extern void dtr_purge(uintptr_t page, size_t width);
 
extern void dtc_pte_copy(pte_t *t);
extern void itc_pte_copy(pte_t *t);
 
extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate);
extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate);
extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate);
extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate);
extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate);
extern void data_access_bit_fault(uint64_t vector, istate_t *istate);
extern void data_access_rights_fault(uint64_t vector, istate_t *istate);
extern void page_not_present(uint64_t vector, istate_t *istate);
 
#endif
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/branches/network/kernel/arch/ia64/include/mm/tlb.h – Rev 4581 → 4718

Rev 4581		Rev 4718
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia64mm	29	/** @addtogroup ia64mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_ia64_TLB_H_	35	#ifndef KERN_ia64_TLB_H_
36	#define KERN_ia64_TLB_H_	36	#define KERN_ia64_TLB_H_
37		37
38	#include <arch/mm/page.h>	38	#include <arch/mm/page.h>
39	#include <arch/mm/asid.h>	39	#include <arch/mm/asid.h>
40	#include <arch/interrupt.h>	40	#include <arch/interrupt.h>
41	#include <arch/types.h>	41	#include <arch/types.h>
42		42
43	/** Data and instruction Translation Register indices. */	43	/** Data and instruction Translation Register indices. */
44	#define DTR_KERNEL 0	44	#define DTR_KERNEL 0
45	#define ITR_KERNEL 0	45	#define ITR_KERNEL 0
46	#define DTR_KSTACK1 4	46	#define DTR_KSTACK1 4
47	#define DTR_KSTACK2 5	47	#define DTR_KSTACK2 5
48		48
49	/** Portion of TLB insertion format data structure. */	49	/** Portion of TLB insertion format data structure. */
50	union tlb_entry {	50	union tlb_entry {
51	uint64_t word[2];	51	uint64_t word[2];
52	struct {	52	struct {
53	/* Word 0 */	53	/* Word 0 */
54	unsigned p : 1; /*< Present. /	54	unsigned p : 1; /*< Present. /
55	unsigned : 1;	55	unsigned : 1;
56	unsigned ma : 3; /*< Memory attribute. /	56	unsigned ma : 3; /*< Memory attribute. /
57	unsigned a : 1; /*< Accessed. /	57	unsigned a : 1; /*< Accessed. /
58	unsigned d : 1; /*< Dirty. /	58	unsigned d : 1; /*< Dirty. /
59	unsigned pl : 2; /*< Privilege level. /	59	unsigned pl : 2; /*< Privilege level. /
60	unsigned ar : 3; /*< Access rights. /	60	unsigned ar : 3; /*< Access rights. /
61	unsigned long long ppn : 38; /*< Physical Page Number, a.k.a. PFN. /	61	unsigned long long ppn : 38; /*< Physical Page Number, a.k.a. PFN. /
62	unsigned : 2;	62	unsigned : 2;
63	unsigned ed : 1;	63	unsigned ed : 1;
64	unsigned ig1 : 11;	64	unsigned ig1 : 11;
65		65
66	/* Word 1 */	66	/* Word 1 */
67	unsigned : 2;	67	unsigned : 2;
68	unsigned ps : 6; /*< Page size will be 2^ps. /	68	unsigned ps : 6; /*< Page size will be 2^ps. /
69	unsigned key : 24; /*< Protection key, unused. /	69	unsigned key : 24; /*< Protection key, unused. /
70	unsigned : 32;	70	unsigned : 32;
71	} __attribute__ ((packed));	71	} __attribute__ ((packed));
72	} __attribute__ ((packed));	72	} __attribute__ ((packed));
73	typedef union tlb_entry tlb_entry_t;	73	typedef union tlb_entry tlb_entry_t;
74		74
75	extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc);	75	extern void tc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtc);
76	extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);	76	extern void dtc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
77	extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);	77	extern void itc_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry);
78		78
79	extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr);	79	extern void tr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, bool dtr, size_t tr);
80	extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);	80	extern void dtr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
81	extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);	81	extern void itr_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry, size_t tr);
82		82
83	extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr);	83	extern void dtlb_kernel_mapping_insert(uintptr_t page, uintptr_t frame, bool dtr, size_t tr);
84	extern void dtr_purge(uintptr_t page, size_t width);	84	extern void dtr_purge(uintptr_t page, size_t width);
85		85
86	extern void dtc_pte_copy(pte_t *t);	86	extern void dtc_pte_copy(pte_t *t);
87	extern void itc_pte_copy(pte_t *t);	87	extern void itc_pte_copy(pte_t *t);
88		88
89	extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate);	89	extern void alternate_instruction_tlb_fault(uint64_t vector, istate_t *istate);
90	extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate);	90	extern void alternate_data_tlb_fault(uint64_t vector, istate_t *istate);
91	extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate);	91	extern void data_nested_tlb_fault(uint64_t vector, istate_t *istate);
92	extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate);	92	extern void data_dirty_bit_fault(uint64_t vector, istate_t *istate);
93	extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate);	93	extern void instruction_access_bit_fault(uint64_t vector, istate_t *istate);
94	extern void data_access_bit_fault(uint64_t vector, istate_t *istate);	94	extern void data_access_bit_fault(uint64_t vector, istate_t *istate);
-		95	extern void data_access_rights_fault(uint64_t vector, istate_t *istate);
95	extern void page_not_present(uint64_t vector, istate_t *istate);	96	extern void page_not_present(uint64_t vector, istate_t *istate);
96		97
97	#endif	98	#endif
98		99
99	/** @}	100	/** @}
100	*/	101	*/
101		102