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Rev 3569 Rev 3674
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endif
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endif
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ifeq ($(ARCH), ia32)
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ifeq ($(ARCH), ia32)
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	SOURCES += ega.c
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	SOURCES += ega.c
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	CFLAGS += -DEGA_ENABLED
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	CFLAGS += -DEGA_ENABLED
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endif
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endif
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ifeq ($(ARCH), ia64)
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	SOURCES += ega.c
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	CFLAGS += -DEGA_ENABLED
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endif
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ifeq ($(ARCH), amd64)
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ifeq ($(ARCH), amd64)
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	SOURCES += ega.c
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	SOURCES += ega.c
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	CFLAGS += -DEGA_ENABLED
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	CFLAGS += -DEGA_ENABLED
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endif
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endif
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ifeq ($(ARCH), mips32)
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ifeq ($(ARCH), mips32)
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	SOURCES += msim.c
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	SOURCES += msim.c \
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                   serial_console.c
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	CFLAGS += -DMSIM_ENABLED -DFB_INVERT_ENDIAN
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	CFLAGS += -DMSIM_ENABLED -DFB_INVERT_ENDIAN
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endif
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endif
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ifeq ($(ARCH), sparc64)
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	SOURCES += sgcn.c \
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	           serial_console.c
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	CFLAGS += -DSGCN_ENABLED
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endif
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CFLAGS += -D$(ARCH)
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CFLAGS += -D$(ARCH)
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OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))
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OBJECTS := $(addsuffix .o,$(basename $(SOURCES)))