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| 1 | /* |
1 | /* |
| 2 | * Copyright (c) 2006 Ondrej Palkovsky |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
| 3 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Jermar |
| 4 | * All rights reserved. |
4 | * All rights reserved. |
| 5 | * |
5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
8 | * are met: |
| 9 | * |
9 | * |
| 10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
| 11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
| 12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
| 13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
| 14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
| 15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
| 16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
| 17 | * |
17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 28 | */ |
28 | */ |
| 29 | 29 | ||
| 30 | /** @addtogroup genericipc |
30 | /** @addtogroup genericipc |
| 31 | * @{ |
31 | * @{ |
| 32 | */ |
32 | */ |
| 33 | /** |
33 | /** |
| 34 | * @file |
34 | * @file |
| 35 | * @brief IRQ notification framework. |
35 | * @brief IRQ notification framework. |
| 36 | * |
36 | * |
| 37 | * This framework allows applications to register to receive a notification |
37 | * This framework allows applications to register to receive a notification |
| 38 | * when interrupt is detected. The application may provide a simple 'top-half' |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
| 39 | * handler as part of its registration, which can perform simple operations |
39 | * handler as part of its registration, which can perform simple operations |
| 40 | * (read/write port/memory, add information to notification ipc message). |
40 | * (read/write port/memory, add information to notification ipc message). |
| 41 | * |
41 | * |
| 42 | * The structure of a notification message is as follows: |
42 | * The structure of a notification message is as follows: |
| 43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
| 44 | * - ARG1: payload modified by a 'top-half' handler |
44 | * - ARG1: payload modified by a 'top-half' handler |
| 45 | * - ARG2: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
| 46 | * - ARG3: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
| 47 | * - ARG4: payload modified by a 'top-half' handler |
47 | * - ARG4: payload modified by a 'top-half' handler |
| 48 | * - ARG5: payload modified by a 'top-half' handler |
48 | * - ARG5: payload modified by a 'top-half' handler |
| 49 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
49 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
| 50 | * in multithreaded drivers) |
50 | * in multithreaded drivers) |
| 51 | * |
51 | * |
| 52 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(), |
52 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(), |
| 53 | * ipc_irq_cleanup() and IRQ handlers: |
53 | * ipc_irq_cleanup() and IRQ handlers: |
| 54 | * |
54 | * |
| 55 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock |
55 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock |
| 56 | * and answerbox lock, we can rule out race conditions between the |
56 | * and answerbox lock, we can rule out race conditions between the |
| 57 | * registration functions and also the cleanup function. Thus the observer can |
57 | * registration functions and also the cleanup function. Thus the observer can |
| 58 | * either see the IRQ structure present in both the hash table and the |
58 | * either see the IRQ structure present in both the hash table and the |
| 59 | * answerbox list or absent in both. Views in which the IRQ structure would be |
59 | * answerbox list or absent in both. Views in which the IRQ structure would be |
| 60 | * linked in the hash table but not in the answerbox list, or vice versa, are |
60 | * linked in the hash table but not in the answerbox list, or vice versa, are |
| 61 | * not possible. |
61 | * not possible. |
| 62 | * |
62 | * |
| 63 | * By always taking the hash table lock and the IRQ structure lock, we can |
63 | * By always taking the hash table lock and the IRQ structure lock, we can |
| 64 | * rule out a scenario in which we would free up an IRQ structure, which is |
64 | * rule out a scenario in which we would free up an IRQ structure, which is |
| 65 | * still referenced by, for example, an IRQ handler. The locking scheme forces |
65 | * still referenced by, for example, an IRQ handler. The locking scheme forces |
| 66 | * us to lock the IRQ structure only after any progressing IRQs on that |
66 | * us to lock the IRQ structure only after any progressing IRQs on that |
| 67 | * structure are finished. Because we hold the hash table lock, we prevent new |
67 | * structure are finished. Because we hold the hash table lock, we prevent new |
| 68 | * IRQs from taking new references to the IRQ structure. |
68 | * IRQs from taking new references to the IRQ structure. |
| 69 | */ |
69 | */ |
| 70 | 70 | ||
| 71 | #include <arch.h> |
71 | #include <arch.h> |
| 72 | #include <mm/slab.h> |
72 | #include <mm/slab.h> |
| 73 | #include <errno.h> |
73 | #include <errno.h> |
| 74 | #include <ddi/irq.h> |
74 | #include <ddi/irq.h> |
| 75 | #include <ipc/ipc.h> |
75 | #include <ipc/ipc.h> |
| 76 | #include <ipc/irq.h> |
76 | #include <ipc/irq.h> |
| 77 | #include <syscall/copy.h> |
77 | #include <syscall/copy.h> |
| 78 | #include <console/console.h> |
78 | #include <console/console.h> |
| 79 | #include <print.h> |
79 | #include <print.h> |
| 80 | 80 | ||
| 81 | /** Free the top-half pseudocode. |
81 | /** Free the top-half pseudocode. |
| 82 | * |
82 | * |
| 83 | * @param code Pointer to the top-half pseudocode. |
83 | * @param code Pointer to the top-half pseudocode. |
| 84 | */ |
84 | */ |
| 85 | static void code_free(irq_code_t *code) |
85 | static void code_free(irq_code_t *code) |
| 86 | { |
86 | { |
| 87 | if (code) { |
87 | if (code) { |
| 88 | free(code->cmds); |
88 | free(code->cmds); |
| 89 | free(code); |
89 | free(code); |
| 90 | } |
90 | } |
| 91 | } |
91 | } |
| 92 | 92 | ||
| 93 | /** Copy the top-half pseudocode from userspace into the kernel. |
93 | /** Copy the top-half pseudocode from userspace into the kernel. |
| 94 | * |
94 | * |
| 95 | * @param ucode Userspace address of the top-half pseudocode. |
95 | * @param ucode Userspace address of the top-half pseudocode. |
| 96 | * |
96 | * |
| 97 | * @return Kernel address of the copied pseudocode. |
97 | * @return Kernel address of the copied pseudocode. |
| 98 | */ |
98 | */ |
| 99 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
99 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
| 100 | { |
100 | { |
| 101 | irq_code_t *code; |
101 | irq_code_t *code; |
| 102 | irq_cmd_t *ucmds; |
102 | irq_cmd_t *ucmds; |
| 103 | int rc; |
103 | int rc; |
| 104 | 104 | ||
| 105 | code = malloc(sizeof(*code), 0); |
105 | code = malloc(sizeof(*code), 0); |
| 106 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
106 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
| 107 | if (rc != 0) { |
107 | if (rc != 0) { |
| 108 | free(code); |
108 | free(code); |
| 109 | return NULL; |
109 | return NULL; |
| 110 | } |
110 | } |
| 111 | 111 | ||
| 112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
| 113 | free(code); |
113 | free(code); |
| 114 | return NULL; |
114 | return NULL; |
| 115 | } |
115 | } |
| 116 | ucmds = code->cmds; |
116 | ucmds = code->cmds; |
| 117 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
117 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
| 118 | rc = copy_from_uspace(code->cmds, ucmds, |
118 | rc = copy_from_uspace(code->cmds, ucmds, |
| 119 | sizeof(code->cmds[0]) * code->cmdcount); |
119 | sizeof(code->cmds[0]) * code->cmdcount); |
| 120 | if (rc != 0) { |
120 | if (rc != 0) { |
| 121 | free(code->cmds); |
121 | free(code->cmds); |
| 122 | free(code); |
122 | free(code); |
| 123 | return NULL; |
123 | return NULL; |
| 124 | } |
124 | } |
| 125 | 125 | ||
| 126 | return code; |
126 | return code; |
| 127 | } |
127 | } |
| 128 | 128 | ||
| 129 | /** Register an answerbox as a receiving end for IRQ notifications. |
129 | /** Register an answerbox as a receiving end for IRQ notifications. |
| 130 | * |
130 | * |
| 131 | * @param box Receiving answerbox. |
131 | * @param box Receiving answerbox. |
| 132 | * @param inr IRQ number. |
132 | * @param inr IRQ number. |
| 133 | * @param devno Device number. |
133 | * @param devno Device number. |
| 134 | * @param method Method to be associated with the notification. |
134 | * @param method Method to be associated with the notification. |
| 135 | * @param ucode Uspace pointer to top-half pseudocode. |
135 | * @param ucode Uspace pointer to top-half pseudocode. |
| - | 136 | * |
|
| - | 137 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
|
| 136 | * |
138 | * |
| 137 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
- | |
| 138 | */ |
139 | */ |
| 139 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
140 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
| 140 | unative_t method, irq_code_t *ucode) |
141 | unative_t method, irq_code_t *ucode) |
| 141 | { |
142 | { |
| 142 | ipl_t ipl; |
143 | ipl_t ipl; |
| 143 | irq_code_t *code; |
144 | irq_code_t *code; |
| 144 | irq_t *irq; |
145 | irq_t *irq; |
| - | 146 | link_t *hlp; |
|
| 145 | unative_t key[] = { |
147 | unative_t key[] = { |
| 146 | (unative_t) inr, |
148 | (unative_t) inr, |
| 147 | (unative_t) devno |
149 | (unative_t) devno |
| 148 | }; |
150 | }; |
| 149 | 151 | ||
| 150 | if (ucode) { |
152 | if (ucode) { |
| 151 | code = code_from_uspace(ucode); |
153 | code = code_from_uspace(ucode); |
| 152 | if (!code) |
154 | if (!code) |
| 153 | return EBADMEM; |
155 | return EBADMEM; |
| 154 | } else { |
156 | } else { |
| 155 | code = NULL; |
157 | code = NULL; |
| 156 | } |
158 | } |
| 157 | 159 | ||
| 158 | /* |
160 | /* |
| 159 | * Allocate and populate the IRQ structure. |
161 | * Allocate and populate the IRQ structure. |
| 160 | */ |
162 | */ |
| 161 | irq = malloc(sizeof(irq_t), 0); |
163 | irq = malloc(sizeof(irq_t), 0); |
| 162 | irq_initialize(irq); |
164 | irq_initialize(irq); |
| 163 | irq->devno = devno; |
165 | irq->devno = devno; |
| 164 | irq->inr = inr; |
166 | irq->inr = inr; |
| 165 | irq->claim = ipc_irq_top_half_claim; |
167 | irq->claim = ipc_irq_top_half_claim; |
| 166 | irq->handler = ipc_irq_top_half_handler; |
168 | irq->handler = ipc_irq_top_half_handler; |
| 167 | irq->notif_cfg.notify = true; |
169 | irq->notif_cfg.notify = true; |
| 168 | irq->notif_cfg.answerbox = box; |
170 | irq->notif_cfg.answerbox = box; |
| 169 | irq->notif_cfg.method = method; |
171 | irq->notif_cfg.method = method; |
| 170 | irq->notif_cfg.code = code; |
172 | irq->notif_cfg.code = code; |
| 171 | irq->notif_cfg.counter = 0; |
173 | irq->notif_cfg.counter = 0; |
| 172 | 174 | ||
| 173 | /* |
175 | /* |
| 174 | * Enlist the IRQ structure in the uspace IRQ hash table and the |
176 | * Enlist the IRQ structure in the uspace IRQ hash table and the |
| 175 | * answerbox's list. |
177 | * answerbox's list. |
| 176 | */ |
178 | */ |
| 177 | ipl = interrupts_disable(); |
179 | ipl = interrupts_disable(); |
| 178 | spinlock_lock(&irq_uspace_hash_table_lock); |
180 | spinlock_lock(&irq_uspace_hash_table_lock); |
| 179 | spinlock_lock(&irq->lock); |
181 | hlp = hash_table_find(&irq_uspace_hash_table, key); |
| - | 182 | if (hlp) { |
|
| 180 | spinlock_lock(&box->irq_lock); |
183 | irq_t *hirq __attribute__((unused)) |
| 181 | if (hash_table_find(&irq_uspace_hash_table, key)) { |
184 | = hash_table_get_instance(hlp, irq_t, link); |
| - | 185 | ||
| - | 186 | /* hirq is locked */ |
|
| - | 187 | spinlock_unlock(&hirq->lock); |
|
| 182 | code_free(code); |
188 | code_free(code); |
| 183 | spinlock_unlock(&box->irq_lock); |
- | |
| 184 | spinlock_unlock(&irq->lock); |
- | |
| 185 | spinlock_unlock(&irq_uspace_hash_table_lock); |
189 | spinlock_unlock(&irq_uspace_hash_table_lock); |
| 186 | free(irq); |
190 | free(irq); |
| 187 | interrupts_restore(ipl); |
191 | interrupts_restore(ipl); |
| 188 | return EEXISTS; |
192 | return EEXISTS; |
| 189 | } |
193 | } |
| - | 194 | ||
| - | 195 | spinlock_lock(&irq->lock); /* Not really necessary, but paranoid */ |
|
| - | 196 | spinlock_lock(&box->irq_lock); |
|
| 190 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link); |
197 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link); |
| 191 | list_append(&irq->notif_cfg.link, &box->irq_head); |
198 | list_append(&irq->notif_cfg.link, &box->irq_head); |
| 192 | spinlock_unlock(&box->irq_lock); |
199 | spinlock_unlock(&box->irq_lock); |
| 193 | spinlock_unlock(&irq->lock); |
200 | spinlock_unlock(&irq->lock); |
| 194 | spinlock_unlock(&irq_uspace_hash_table_lock); |
201 | spinlock_unlock(&irq_uspace_hash_table_lock); |
| 195 | 202 | ||
| 196 | interrupts_restore(ipl); |
203 | interrupts_restore(ipl); |
| 197 | return EOK; |
204 | return EOK; |
| 198 | } |
205 | } |
| 199 | 206 | ||
| 200 | /** Unregister task from IRQ notification. |
207 | /** Unregister task from IRQ notification. |
| 201 | * |
208 | * |
| 202 | * @param box Answerbox associated with the notification. |
209 | * @param box Answerbox associated with the notification. |
| 203 | * @param inr IRQ number. |
210 | * @param inr IRQ number. |
| 204 | * @param devno Device number. |
211 | * @param devno Device number. |
| 205 | */ |
212 | */ |
| 206 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
213 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
| 207 | { |
214 | { |
| 208 | ipl_t ipl; |
215 | ipl_t ipl; |
| 209 | unative_t key[] = { |
216 | unative_t key[] = { |
| 210 | (unative_t) inr, |
217 | (unative_t) inr, |
| 211 | (unative_t) devno |
218 | (unative_t) devno |
| 212 | }; |
219 | }; |
| 213 | link_t *lnk; |
220 | link_t *lnk; |
| 214 | irq_t *irq; |
221 | irq_t *irq; |
| 215 | 222 | ||
| 216 | ipl = interrupts_disable(); |
223 | ipl = interrupts_disable(); |
| 217 | spinlock_lock(&irq_uspace_hash_table_lock); |
224 | spinlock_lock(&irq_uspace_hash_table_lock); |
| 218 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
225 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
| 219 | if (!lnk) { |
226 | if (!lnk) { |
| 220 | spinlock_unlock(&irq_uspace_hash_table_lock); |
227 | spinlock_unlock(&irq_uspace_hash_table_lock); |
| 221 | interrupts_restore(ipl); |
228 | interrupts_restore(ipl); |
| 222 | return ENOENT; |
229 | return ENOENT; |
| 223 | } |
230 | } |
| 224 | irq = hash_table_get_instance(lnk, irq_t, link); |
231 | irq = hash_table_get_instance(lnk, irq_t, link); |
| 225 | spinlock_lock(&irq->lock); |
232 | /* irq is locked */ |
| 226 | spinlock_lock(&box->irq_lock); |
233 | spinlock_lock(&box->irq_lock); |
| 227 | 234 | ||
| 228 | ASSERT(irq->notif_cfg.answerbox == box); |
235 | ASSERT(irq->notif_cfg.answerbox == box); |
| 229 | 236 | ||
| 230 | /* Free up the pseudo code and associated structures. */ |
237 | /* Free up the pseudo code and associated structures. */ |
| 231 | code_free(irq->notif_cfg.code); |
238 | code_free(irq->notif_cfg.code); |
| 232 | 239 | ||
| 233 | /* Remove the IRQ from the answerbox's list. */ |
240 | /* Remove the IRQ from the answerbox's list. */ |
| 234 | list_remove(&irq->notif_cfg.link); |
241 | list_remove(&irq->notif_cfg.link); |
| 235 | 242 | ||
| - | 243 | /* |
|
| - | 244 | * We need to drop the IRQ lock now because hash_table_remove() will try |
|
| - | 245 | * to reacquire it. That basically violates the natural locking order, |
|
| - | 246 | * but a deadlock in hash_table_remove() is prevented by the fact that |
|
| - | 247 | * we already held the IRQ lock and didn't drop the hash table lock in |
|
| - | 248 | * the meantime. |
|
| - | 249 | */ |
|
| - | 250 | spinlock_unlock(&irq->lock); |
|
| - | 251 | ||
| 236 | /* Remove the IRQ from the uspace IRQ hash table. */ |
252 | /* Remove the IRQ from the uspace IRQ hash table. */ |
| 237 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
253 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
| 238 | 254 | ||
| 239 | spinlock_unlock(&irq_uspace_hash_table_lock); |
255 | spinlock_unlock(&irq_uspace_hash_table_lock); |
| 240 | spinlock_unlock(&irq->lock); |
- | |
| 241 | spinlock_unlock(&box->irq_lock); |
256 | spinlock_unlock(&box->irq_lock); |
| 242 | 257 | ||
| 243 | /* Free up the IRQ structure. */ |
258 | /* Free up the IRQ structure. */ |
| 244 | free(irq); |
259 | free(irq); |
| 245 | 260 | ||
| 246 | interrupts_restore(ipl); |
261 | interrupts_restore(ipl); |
| 247 | return EOK; |
262 | return EOK; |
| 248 | } |
263 | } |
| 249 | 264 | ||
| 250 | 265 | ||
| 251 | /** Disconnect all IRQ notifications from an answerbox. |
266 | /** Disconnect all IRQ notifications from an answerbox. |
| 252 | * |
267 | * |
| 253 | * This function is effective because the answerbox contains |
268 | * This function is effective because the answerbox contains |
| 254 | * list of all irq_t structures that are registered to |
269 | * list of all irq_t structures that are registered to |
| 255 | * send notifications to it. |
270 | * send notifications to it. |
| 256 | * |
271 | * |
| 257 | * @param box Answerbox for which we want to carry out the cleanup. |
272 | * @param box Answerbox for which we want to carry out the cleanup. |
| 258 | */ |
273 | */ |
| 259 | void ipc_irq_cleanup(answerbox_t *box) |
274 | void ipc_irq_cleanup(answerbox_t *box) |
| 260 | { |
275 | { |
| 261 | ipl_t ipl; |
276 | ipl_t ipl; |
| 262 | 277 | ||
| 263 | loop: |
278 | loop: |
| 264 | ipl = interrupts_disable(); |
279 | ipl = interrupts_disable(); |
| 265 | spinlock_lock(&irq_uspace_hash_table_lock); |
280 | spinlock_lock(&irq_uspace_hash_table_lock); |
| 266 | spinlock_lock(&box->irq_lock); |
281 | spinlock_lock(&box->irq_lock); |
| 267 | 282 | ||
| 268 | while (box->irq_head.next != &box->irq_head) { |
283 | while (box->irq_head.next != &box->irq_head) { |
| 269 | link_t *cur = box->irq_head.next; |
284 | link_t *cur = box->irq_head.next; |
| 270 | irq_t *irq; |
285 | irq_t *irq; |
| 271 | DEADLOCK_PROBE_INIT(p_irqlock); |
286 | DEADLOCK_PROBE_INIT(p_irqlock); |
| 272 | unative_t key[2]; |
287 | unative_t key[2]; |
| 273 | 288 | ||
| 274 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
289 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
| 275 | if (!spinlock_trylock(&irq->lock)) { |
290 | if (!spinlock_trylock(&irq->lock)) { |
| 276 | /* |
291 | /* |
| 277 | * Avoid deadlock by trying again. |
292 | * Avoid deadlock by trying again. |
| 278 | */ |
293 | */ |
| 279 | spinlock_unlock(&box->irq_lock); |
294 | spinlock_unlock(&box->irq_lock); |
| 280 | spinlock_unlock(&irq_uspace_hash_table_lock); |
295 | spinlock_unlock(&irq_uspace_hash_table_lock); |
| 281 | interrupts_restore(ipl); |
296 | interrupts_restore(ipl); |
| 282 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
297 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
| 283 | goto loop; |
298 | goto loop; |
| 284 | } |
299 | } |
| 285 | key[0] = irq->inr; |
300 | key[0] = irq->inr; |
| 286 | key[1] = irq->devno; |
301 | key[1] = irq->devno; |
| 287 | 302 | ||
| 288 | 303 | ||
| 289 | ASSERT(irq->notif_cfg.answerbox == box); |
304 | ASSERT(irq->notif_cfg.answerbox == box); |
| 290 | 305 | ||
| 291 | /* Unlist from the answerbox. */ |
306 | /* Unlist from the answerbox. */ |
| 292 | list_remove(&irq->notif_cfg.link); |
307 | list_remove(&irq->notif_cfg.link); |
| 293 | 308 | ||
| 294 | /* Remove from the hash table. */ |
- | |
| 295 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
- | |
| 296 | - | ||
| 297 | /* Free up the pseudo code and associated structures. */ |
309 | /* Free up the pseudo code and associated structures. */ |
| 298 | code_free(irq->notif_cfg.code); |
310 | code_free(irq->notif_cfg.code); |
| 299 | 311 | ||
| - | 312 | /* |
|
| - | 313 | * We need to drop the IRQ lock now because hash_table_remove() |
|
| - | 314 | * will try to reacquire it. That basically violates the natural |
|
| - | 315 | * locking order, but a deadlock in hash_table_remove() is |
|
| - | 316 | * prevented by the fact that we already held the IRQ lock and |
|
| - | 317 | * didn't drop the hash table lock in the meantime. |
|
| - | 318 | */ |
|
| 300 | spinlock_unlock(&irq->lock); |
319 | spinlock_unlock(&irq->lock); |
| - | 320 | ||
| - | 321 | /* Remove from the hash table. */ |
|
| - | 322 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
|
| - | 323 | ||
| 301 | free(irq); |
324 | free(irq); |
| 302 | } |
325 | } |
| 303 | 326 | ||
| 304 | spinlock_unlock(&box->irq_lock); |
327 | spinlock_unlock(&box->irq_lock); |
| 305 | spinlock_unlock(&irq_uspace_hash_table_lock); |
328 | spinlock_unlock(&irq_uspace_hash_table_lock); |
| 306 | interrupts_restore(ipl); |
329 | interrupts_restore(ipl); |
| 307 | } |
330 | } |
| 308 | 331 | ||
| 309 | /** Add a call to the proper answerbox queue. |
332 | /** Add a call to the proper answerbox queue. |
| 310 | * |
333 | * |
| 311 | * Assume irq->lock is locked. |
334 | * Assume irq->lock is locked. |
| 312 | * |
335 | * |
| 313 | * @param irq IRQ structure referencing the target answerbox. |
336 | * @param irq IRQ structure referencing the target answerbox. |
| 314 | * @param call IRQ notification call. |
337 | * @param call IRQ notification call. |
| 315 | */ |
338 | */ |
| 316 | static void send_call(irq_t *irq, call_t *call) |
339 | static void send_call(irq_t *irq, call_t *call) |
| 317 | { |
340 | { |
| 318 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
341 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
| 319 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
342 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
| 320 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
343 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
| 321 | 344 | ||
| 322 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
345 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
| 323 | } |
346 | } |
| 324 | 347 | ||
| 325 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not. |
348 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not. |
| 326 | * |
349 | * |
| 327 | * @param irq IRQ structure. |
350 | * @param irq IRQ structure. |
| 328 | * |
351 | * |
| 329 | * @return IRQ_ACCEPT if the interrupt is accepted by the |
352 | * @return IRQ_ACCEPT if the interrupt is accepted by the |
| 330 | * pseudocode. IRQ_DECLINE otherwise. |
353 | * pseudocode. IRQ_DECLINE otherwise. |
| 331 | */ |
354 | */ |
| 332 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq) |
355 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq) |
| 333 | { |
356 | { |
| 334 | unsigned int i; |
357 | unsigned int i; |
| 335 | unative_t dstval; |
358 | unative_t dstval; |
| 336 | irq_code_t *code = irq->notif_cfg.code; |
359 | irq_code_t *code = irq->notif_cfg.code; |
| 337 | unative_t *scratch = irq->notif_cfg.scratch; |
360 | unative_t *scratch = irq->notif_cfg.scratch; |
| 338 | 361 | ||
| 339 | 362 | ||
| 340 | if (!irq->notif_cfg.notify) |
363 | if (!irq->notif_cfg.notify) |
| 341 | return IRQ_DECLINE; |
364 | return IRQ_DECLINE; |
| 342 | 365 | ||
| 343 | if (!code) |
366 | if (!code) |
| 344 | return IRQ_DECLINE; |
367 | return IRQ_DECLINE; |
| 345 | 368 | ||
| 346 | for (i = 0; i < code->cmdcount; i++) { |
369 | for (i = 0; i < code->cmdcount; i++) { |
| 347 | unsigned int srcarg = code->cmds[i].srcarg; |
370 | unsigned int srcarg = code->cmds[i].srcarg; |
| 348 | unsigned int dstarg = code->cmds[i].dstarg; |
371 | unsigned int dstarg = code->cmds[i].dstarg; |
| 349 | 372 | ||
| 350 | if (srcarg >= IPC_CALL_LEN) |
373 | if (srcarg >= IPC_CALL_LEN) |
| 351 | break; |
374 | break; |
| 352 | if (dstarg >= IPC_CALL_LEN) |
375 | if (dstarg >= IPC_CALL_LEN) |
| 353 | break; |
376 | break; |
| 354 | 377 | ||
| 355 | switch (code->cmds[i].cmd) { |
378 | switch (code->cmds[i].cmd) { |
| 356 | case CMD_PIO_READ_8: |
379 | case CMD_PIO_READ_8: |
| 357 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr); |
380 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr); |
| 358 | if (dstarg) |
381 | if (dstarg) |
| 359 | scratch[dstarg] = dstval; |
382 | scratch[dstarg] = dstval; |
| 360 | break; |
383 | break; |
| 361 | case CMD_PIO_READ_16: |
384 | case CMD_PIO_READ_16: |
| 362 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr); |
385 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr); |
| 363 | if (dstarg) |
386 | if (dstarg) |
| 364 | scratch[dstarg] = dstval; |
387 | scratch[dstarg] = dstval; |
| 365 | break; |
388 | break; |
| 366 | case CMD_PIO_READ_32: |
389 | case CMD_PIO_READ_32: |
| 367 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr); |
390 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr); |
| 368 | if (dstarg) |
391 | if (dstarg) |
| 369 | scratch[dstarg] = dstval; |
392 | scratch[dstarg] = dstval; |
| 370 | break; |
393 | break; |
| 371 | case CMD_PIO_WRITE_8: |
394 | case CMD_PIO_WRITE_8: |
| 372 | pio_write_8((ioport8_t *) code->cmds[i].addr, |
395 | pio_write_8((ioport8_t *) code->cmds[i].addr, |
| 373 | (uint8_t) code->cmds[i].value); |
396 | (uint8_t) code->cmds[i].value); |
| 374 | break; |
397 | break; |
| 375 | case CMD_PIO_WRITE_16: |
398 | case CMD_PIO_WRITE_16: |
| 376 | pio_write_16((ioport16_t *) code->cmds[i].addr, |
399 | pio_write_16((ioport16_t *) code->cmds[i].addr, |
| 377 | (uint16_t) code->cmds[i].value); |
400 | (uint16_t) code->cmds[i].value); |
| 378 | break; |
401 | break; |
| 379 | case CMD_PIO_WRITE_32: |
402 | case CMD_PIO_WRITE_32: |
| 380 | pio_write_32((ioport32_t *) code->cmds[i].addr, |
403 | pio_write_32((ioport32_t *) code->cmds[i].addr, |
| 381 | (uint32_t) code->cmds[i].value); |
404 | (uint32_t) code->cmds[i].value); |
| 382 | break; |
405 | break; |
| 383 | case CMD_BTEST: |
406 | case CMD_BTEST: |
| 384 | if (srcarg && dstarg) { |
407 | if (srcarg && dstarg) { |
| 385 | dstval = scratch[srcarg] & code->cmds[i].value; |
408 | dstval = scratch[srcarg] & code->cmds[i].value; |
| 386 | scratch[dstarg] = dstval; |
409 | scratch[dstarg] = dstval; |
| 387 | } |
410 | } |
| 388 | break; |
411 | break; |
| 389 | case CMD_PREDICATE: |
412 | case CMD_PREDICATE: |
| 390 | if (srcarg && !scratch[srcarg]) { |
413 | if (srcarg && !scratch[srcarg]) { |
| 391 | i += code->cmds[i].value; |
414 | i += code->cmds[i].value; |
| 392 | continue; |
415 | continue; |
| 393 | } |
416 | } |
| 394 | break; |
417 | break; |
| 395 | case CMD_ACCEPT: |
418 | case CMD_ACCEPT: |
| 396 | return IRQ_ACCEPT; |
419 | return IRQ_ACCEPT; |
| 397 | break; |
420 | break; |
| 398 | case CMD_DECLINE: |
421 | case CMD_DECLINE: |
| 399 | default: |
422 | default: |
| 400 | return IRQ_DECLINE; |
423 | return IRQ_DECLINE; |
| 401 | } |
424 | } |
| 402 | } |
425 | } |
| 403 | 426 | ||
| 404 | return IRQ_DECLINE; |
427 | return IRQ_DECLINE; |
| 405 | } |
428 | } |
| 406 | 429 | ||
| 407 | 430 | ||
| 408 | /* IRQ top-half handler. |
431 | /* IRQ top-half handler. |
| 409 | * |
432 | * |
| 410 | * We expect interrupts to be disabled and the irq->lock already held. |
433 | * We expect interrupts to be disabled and the irq->lock already held. |
| 411 | * |
434 | * |
| 412 | * @param irq IRQ structure. |
435 | * @param irq IRQ structure. |
| 413 | */ |
436 | */ |
| 414 | void ipc_irq_top_half_handler(irq_t *irq) |
437 | void ipc_irq_top_half_handler(irq_t *irq) |
| 415 | { |
438 | { |
| 416 | ASSERT(irq); |
439 | ASSERT(irq); |
| 417 | 440 | ||
| 418 | if (irq->notif_cfg.answerbox) { |
441 | if (irq->notif_cfg.answerbox) { |
| 419 | call_t *call; |
442 | call_t *call; |
| 420 | 443 | ||
| 421 | call = ipc_call_alloc(FRAME_ATOMIC); |
444 | call = ipc_call_alloc(FRAME_ATOMIC); |
| 422 | if (!call) |
445 | if (!call) |
| 423 | return; |
446 | return; |
| 424 | 447 | ||
| 425 | call->flags |= IPC_CALL_NOTIF; |
448 | call->flags |= IPC_CALL_NOTIF; |
| 426 | /* Put a counter to the message */ |
449 | /* Put a counter to the message */ |
| 427 | call->priv = ++irq->notif_cfg.counter; |
450 | call->priv = ++irq->notif_cfg.counter; |
| 428 | 451 | ||
| 429 | /* Set up args */ |
452 | /* Set up args */ |
| 430 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
453 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
| 431 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]); |
454 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]); |
| 432 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]); |
455 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]); |
| 433 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]); |
456 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]); |
| 434 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]); |
457 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]); |
| 435 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]); |
458 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]); |
| 436 | 459 | ||
| 437 | send_call(irq, call); |
460 | send_call(irq, call); |
| 438 | } |
461 | } |
| 439 | } |
462 | } |
| 440 | 463 | ||
| 441 | /** Send notification message. |
464 | /** Send notification message. |
| 442 | * |
465 | * |
| 443 | * @param irq IRQ structure. |
466 | * @param irq IRQ structure. |
| 444 | * @param a1 Driver-specific payload argument. |
467 | * @param a1 Driver-specific payload argument. |
| 445 | * @param a2 Driver-specific payload argument. |
468 | * @param a2 Driver-specific payload argument. |
| 446 | * @param a3 Driver-specific payload argument. |
469 | * @param a3 Driver-specific payload argument. |
| 447 | * @param a4 Driver-specific payload argument. |
470 | * @param a4 Driver-specific payload argument. |
| 448 | * @param a5 Driver-specific payload argument. |
471 | * @param a5 Driver-specific payload argument. |
| 449 | */ |
472 | */ |
| 450 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
473 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
| 451 | unative_t a4, unative_t a5) |
474 | unative_t a4, unative_t a5) |
| 452 | { |
475 | { |
| 453 | call_t *call; |
476 | call_t *call; |
| 454 | 477 | ||
| 455 | spinlock_lock(&irq->lock); |
478 | spinlock_lock(&irq->lock); |
| 456 | 479 | ||
| 457 | if (irq->notif_cfg.answerbox) { |
480 | if (irq->notif_cfg.answerbox) { |
| 458 | call = ipc_call_alloc(FRAME_ATOMIC); |
481 | call = ipc_call_alloc(FRAME_ATOMIC); |
| 459 | if (!call) { |
482 | if (!call) { |
| 460 | spinlock_unlock(&irq->lock); |
483 | spinlock_unlock(&irq->lock); |
| 461 | return; |
484 | return; |
| 462 | } |
485 | } |
| 463 | call->flags |= IPC_CALL_NOTIF; |
486 | call->flags |= IPC_CALL_NOTIF; |
| 464 | /* Put a counter to the message */ |
487 | /* Put a counter to the message */ |
| 465 | call->priv = ++irq->notif_cfg.counter; |
488 | call->priv = ++irq->notif_cfg.counter; |
| 466 | 489 | ||
| 467 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
490 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
| 468 | IPC_SET_ARG1(call->data, a1); |
491 | IPC_SET_ARG1(call->data, a1); |
| 469 | IPC_SET_ARG2(call->data, a2); |
492 | IPC_SET_ARG2(call->data, a2); |
| 470 | IPC_SET_ARG3(call->data, a3); |
493 | IPC_SET_ARG3(call->data, a3); |
| 471 | IPC_SET_ARG4(call->data, a4); |
494 | IPC_SET_ARG4(call->data, a4); |
| 472 | IPC_SET_ARG5(call->data, a5); |
495 | IPC_SET_ARG5(call->data, a5); |
| 473 | 496 | ||
| 474 | send_call(irq, call); |
497 | send_call(irq, call); |
| 475 | } |
498 | } |
| 476 | spinlock_unlock(&irq->lock); |
499 | spinlock_unlock(&irq->lock); |
| 477 | } |
500 | } |
| 478 | 501 | ||
| 479 | /** @} |
502 | /** @} |
| 480 | */ |
503 | */ |
| 481 | 504 | ||