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/*
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/*
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 * Copyright (c) 2009 Jakub Jermar
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 * Copyright (c) 2009 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup genarch
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/** @addtogroup genarch
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 * @{
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 * @{
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 */
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 */
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/**
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/**
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 * @file
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 * @file
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 * @brief i8042 processor driver
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 * @brief i8042 processor driver
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 *
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 *
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 * It takes care of the i8042 serial communication.
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 * It takes care of the i8042 serial communication.
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 *
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 */
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 */
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#include <genarch/drivers/i8042/i8042.h>
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#include <genarch/drivers/i8042/i8042.h>
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#include <genarch/drivers/legacy/ia32/io.h>
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#include <genarch/drivers/legacy/ia32/io.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <console/chardev.h>
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#include <console/chardev.h>
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#include <mm/slab.h>
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#include <mm/slab.h>
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#include <ddi/device.h>
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#include <ddi/device.h>
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static indev_operations_t kbrdin_ops = {
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    .poll = NULL
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};
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#define i8042_SET_COMMAND  0x60
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#define i8042_SET_COMMAND  0x60
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#define i8042_COMMAND      0x69
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#define i8042_COMMAND      0x69
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#define i8042_CPU_RESET    0xfe
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#define i8042_BUFFER_FULL_MASK  0x01
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#define i8042_BUFFER_FULL_MASK  0x01
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#define i8042_WAIT_MASK         0x02
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#define i8042_WAIT_MASK         0x02
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static irq_ownership_t i8042_claim(irq_t *irq)
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static irq_ownership_t i8042_claim(irq_t *irq)
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{
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{
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    i8042_instance_t *i8042_instance = irq->instance;
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    i8042_instance_t *i8042_instance = irq->instance;
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    i8042_t *dev = i8042_instance->i8042;
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    i8042_t *dev = i8042_instance->i8042;
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    if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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    if (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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        return IRQ_ACCEPT;
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        return IRQ_ACCEPT;
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    else
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    else
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        return IRQ_DECLINE;
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        return IRQ_DECLINE;
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}
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}
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static void i8042_irq_handler(irq_t *irq)
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static void i8042_irq_handler(irq_t *irq)
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{
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{
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    i8042_instance_t *instance = irq->instance;
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    i8042_instance_t *instance = irq->instance;
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    i8042_t *dev = instance->i8042;
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    i8042_t *dev = instance->i8042;
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    uint8_t status;
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    uint8_t status;
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    if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) {
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    if (((status = pio_read_8(&dev->status)) & i8042_BUFFER_FULL_MASK)) {
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        uint8_t data = pio_read_8(&dev->data);
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        uint8_t data = pio_read_8(&dev->data);
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        indev_push_character(&instance->kbrdin, data);
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        indev_push_character(instance->kbrdin, data);
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    }
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    }
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}
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}
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/**< Clear input buffer. */
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static void i8042_clear_buffer(i8042_t *dev)
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{
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    while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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        (void) pio_read_8(&dev->data);
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}
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/** Initialize i8042. */
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/** Initialize i8042. */
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indev_t *i8042_init(i8042_t *dev, inr_t inr)
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i8042_instance_t *i8042_init(i8042_t *dev, inr_t inr)
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{
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{
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    i8042_instance_t *instance
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    i8042_instance_t *instance
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        = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC);
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        = malloc(sizeof(i8042_instance_t), FRAME_ATOMIC);
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    if (!instance)
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    if (instance) {
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        instance->i8042 = dev;
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        return NULL;
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        instance->kbrdin = NULL;
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    indev_initialize("i8042", &instance->kbrdin, &kbrdin_ops);
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        irq_initialize(&instance->irq);
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        instance->irq.devno = device_assign_devno();
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        instance->irq.inr = inr;
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        instance->irq.claim = i8042_claim;
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        instance->irq.handler = i8042_irq_handler;
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        instance->irq.instance = instance;
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    }
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    instance->i8042 = dev;
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    return instance;
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}
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void i8042_wire(i8042_instance_t *instance, indev_t *kbrdin)
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{
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    ASSERT(instance);
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    ASSERT(kbrdin);
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    irq_initialize(&instance->irq);
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    instance->irq.devno = device_assign_devno();
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    instance->irq.inr = inr;
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    instance->kbrdin = kbrdin;
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    instance->irq.claim = i8042_claim;
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    instance->irq.handler = i8042_irq_handler;
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    instance->irq.instance = instance;
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    irq_register(&instance->irq);
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    irq_register(&instance->irq);
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    i8042_clear_buffer(instance->i8042);
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}
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/* Reset CPU by pulsing pin 0 */
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void i8042_cpu_reset(i8042_t *dev)
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{
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    interrupts_disable();
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    /*
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     * Clear input buffer.
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     */
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    while (pio_read_8(&dev->status) & i8042_BUFFER_FULL_MASK)
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        (void) pio_read_8(&dev->data);
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    i8042_clear_buffer(dev);
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    return &instance->kbrdin;
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    /* Reset CPU */
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    pio_write_8(&dev->status, i8042_CPU_RESET);
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}
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}
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/** @}
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/** @}
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 */
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 */
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