WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/sparc64/src/trap/interrupt.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup sparc64interrupt
 * @{
 */
/** @file
 */
 
#include <arch/interrupt.h>
#include <arch/sparc64.h>
#include <arch/trap/interrupt.h>
#include <interrupt.h>
#include <ddi/irq.h>
#include <arch/types.h>
#include <debug.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <print.h>
#include <arch.h>
#include <mm/tlb.h>
#include <config.h>
#include <synch/spinlock.h>
 
/** Register Interrupt Level Handler.
 *
 * @param n Interrupt Level (1 - 15).
 * @param name Short descriptive string.
 * @param f Handler.
 */
void interrupt_register(int n, const char *name, iroutine f)
{
    ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);
   
    exc_register(n - 1, name, f);
}
 
/** Process hardware interrupt.
 *
 * @param n Ignored.
 * @param istate Ignored.
 */
void interrupt(int n, istate_t *istate)
{
    uint64_t status;
    uint64_t intrcv;
    uint64_t data0;
    status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
    if (status & (!INTR_DISPATCH_STATUS_BUSY))
        panic("Interrupt Dispatch Status busy bit not set\n");
 
    intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
#if defined (US)
    data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
#elif defined (US3)
    data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
#endif
 
    irq_t *irq = irq_dispatch_and_lock(data0);
    if (irq) {
        /*
         * The IRQ handler was found.
         */
        irq->handler(irq, irq->arg);
        /*
         * See if there is a clear-interrupt-routine and call it.
         */
        if (irq->cir) {
            irq->cir(irq->cir_arg, irq->inr);
        }
        spinlock_unlock(&irq->lock);
    } else if (data0 > config.base) {
        /*
         * This is a cross-call.
         * data0 contains address of the kernel function.
         * We call the function only after we verify
         * it is one of the supported ones.
         */
#ifdef CONFIG_SMP
        if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
            tlb_shootdown_ipi_recv();
        }
#endif
    } else {
        /*
         * Spurious interrupt.
         */
#ifdef CONFIG_DEBUG
        printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
            ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
#endif
    }
 
    membar();
    asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
}
 
/** @}
 */
 

Rev 3149	Rev 3674
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup sparc64interrupt	29	/** @addtogroup sparc64interrupt
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/interrupt.h>	35	#include <arch/interrupt.h>
36	#include <arch/sparc64.h>	36	#include <arch/sparc64.h>
37	#include <arch/trap/interrupt.h>	37	#include <arch/trap/interrupt.h>
38	#include <interrupt.h>	38	#include <interrupt.h>
39	#include <ddi/irq.h>	39	#include <ddi/irq.h>
40	#include <arch/types.h>	40	#include <arch/types.h>
41	#include <debug.h>	41	#include <debug.h>
42	#include <arch/asm.h>	42	#include <arch/asm.h>
43	#include <arch/barrier.h>	43	#include <arch/barrier.h>
44	#include <print.h>	44	#include <print.h>
45	#include <arch.h>	45	#include <arch.h>
46	#include <mm/tlb.h>	46	#include <mm/tlb.h>
47	#include <config.h>	47	#include <config.h>
48	#include <synch/spinlock.h>	48	#include <synch/spinlock.h>
49		49
50	/** Register Interrupt Level Handler.	50	/** Register Interrupt Level Handler.
51	*	51	*
52	* @param n Interrupt Level (1 - 15).	52	* @param n Interrupt Level (1 - 15).
53	* @param name Short descriptive string.	53	* @param name Short descriptive string.
54	* @param f Handler.	54	* @param f Handler.
55	*/	55	*/
56	void interrupt_register(int n, const char *name, iroutine f)	56	void interrupt_register(int n, const char *name, iroutine f)
57	{	57	{
58	ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);	58	ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);
59		59
60	exc_register(n - 1, name, f);	60	exc_register(n - 1, name, f);
61	}	61	}
62		62
63	/** Process hardware interrupt.	63	/** Process hardware interrupt.
64	*	64	*
65	* @param n Ignored.	65	* @param n Ignored.
66	* @param istate Ignored.	66	* @param istate Ignored.
67	*/	67	*/
68	void interrupt(int n, istate_t *istate)	68	void interrupt(int n, istate_t *istate)
69	{	69	{
-		70	uint64_t status;
70	uint64_t intrcv;	71	uint64_t intrcv;
71	uint64_t data0;	72	uint64_t data0;
-		73	status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
-		74	if (status & (!INTR_DISPATCH_STATUS_BUSY))
-		75	panic("Interrupt Dispatch Status busy bit not set\n");
72		76
73	intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);	77	intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
-		78	#if defined (US)
74	data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);	79	data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
-		80	#elif defined (US3)
-		81	data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
-		82	#endif
75		83
76	irq_t *irq = irq_dispatch_and_lock(data0);	84	irq_t *irq = irq_dispatch_and_lock(data0);
77	if (irq) {	85	if (irq) {
78	/*	86	/*
79	* The IRQ handler was found.	87	* The IRQ handler was found.
80	*/	88	*/
81	irq->handler(irq, irq->arg);	89	irq->handler(irq, irq->arg);
-		90	/*
-		91	* See if there is a clear-interrupt-routine and call it.
-		92	*/
-		93	if (irq->cir) {
-		94	irq->cir(irq->cir_arg, irq->inr);
-		95	}
82	spinlock_unlock(&irq->lock);	96	spinlock_unlock(&irq->lock);
83	} else if (data0 > config.base) {	97	} else if (data0 > config.base) {
84	/*	98	/*
85	* This is a cross-call.	99	* This is a cross-call.
86	* data0 contains address of the kernel function.	100	* data0 contains address of the kernel function.
87	* We call the function only after we verify	101	* We call the function only after we verify
88	* it is one of the supported ones.	102	* it is one of the supported ones.
89	*/	103	*/
90	#ifdef CONFIG_SMP	104	#ifdef CONFIG_SMP
91	if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {	105	if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
92	tlb_shootdown_ipi_recv();	106	tlb_shootdown_ipi_recv();
93	}	107	}
94	#endif	108	#endif
95	} else {	109	} else {
96	/*	110	/*
97	* Spurious interrupt.	111	* Spurious interrupt.
98	*/	112	*/
99	#ifdef CONFIG_DEBUG	113	#ifdef CONFIG_DEBUG
100	printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64	114	printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
101	", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);	115	", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
102	#endif	116	#endif
103	}	117	}
104		118
105	membar();	119	membar();
106	asi_u64_write(ASI_INTR_RECEIVE, 0, 0);	120	asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
107	}	121	}
108		122
109	/** @}	123	/** @}
110	*/	124	*/
111		125

Subversion Repositories HelenOS

(root)/branches/dynload/kernel/arch/sparc64/src/trap/interrupt.c – Rev 3149 → 3674