WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/mips32/src/mips32.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <console/chardev.h>
#include <arch/barrier.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <macros.h>
#include <ddi/device.h>
#include <config.h>
#include <string.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE  8
 
#define TLB_EXC    ((char *) 0x80000000)
#define NORM_EXC   ((char *) 0x80000180)
#define CACHE_EXC  ((char *) 0x80000100)
 
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section?
 */
 
/* Stack pointer saved when entering user mode */
uintptr_t supervisor_sp __attribute__ ((section (".text")));
 
count_t cpu_count = 0;
 
/** Performs mips32-specific initialization before main_bsp() is called. */
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
{
    /* Setup usermode */
    init.cnt = bootinfo->cnt;
   
    count_t i;
    for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
        init.tasks[i].addr = bootinfo->tasks[i].addr;
        init.tasks[i].size = bootinfo->tasks[i].size;
        strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
            CONFIG_TASK_NAME_BUFLEN);
    }
   
    for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
        if ((bootinfo->cpumap & (1 << i)) != 0)
            cpu_count++;
    }
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
   
    /*
     * Switch to BEV normal level so that exception vectors point to the
     * kernel. Clear the error level.
     */
    cp0_status_write(cp0_status_read() &
        ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
   
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
   
    debugger_init();
}
 
void arch_post_mm_init(void)
{
    interrupt_init();
    console_init(device_assign_devno());
#ifdef CONFIG_FB
    /* GXemul framebuffer */
    fb_properties_t gxemul_prop = {
        .addr = 0x12000000,
        .offset = 0,
        .x = 640,
        .y = 480,
        .scan = 1920,
        .visual = VISUAL_BGR_8_8_8,
    };
    fb_init(&gxemul_prop);
#endif
 
#ifdef MACHINE_msim
    sysinfo_set_item_val("machine.msim", NULL, 1);
#endif
 
#ifdef MACHINE_simics
    sysinfo_set_item_val("machine.simics", NULL, 1);
#endif
 
#ifdef MACHINE_bgxemul
    sysinfo_set_item_val("machine.bgxemul", NULL, 1);
#endif
 
#ifdef MACHINE_lgxemul
    sysinfo_set_item_val("machine.lgxemul", NULL, 1);
#endif
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
void calibrate_delay_loop(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL = 1, UM = 1, IE = 1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
        cp0_status_um_bit | cp0_status_ie_enabled_bit));
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
        (uintptr_t) kernel_uarg->uspace_uarg,
        (uintptr_t) kernel_uarg->uspace_entry);
   
    while (1);
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
        SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
unative_t sys_tls_set(unative_t addr)
{
    return 0;
}
 
void arch_reboot(void)
{
    ___halt();
   
    while (1);
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 4343	Rev 4345
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/cp0.h>	36	#include <arch/cp0.h>
37	#include <arch/exception.h>	37	#include <arch/exception.h>
38	#include <mm/as.h>	38	#include <mm/as.h>
39		39
40	#include <userspace.h>	40	#include <userspace.h>
41	#include <arch/console.h>	41	#include <arch/console.h>
42	#include <memstr.h>	42	#include <memstr.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <proc/uarg.h>	44	#include <proc/uarg.h>
45	#include <print.h>	45	#include <print.h>
46	#include <syscall/syscall.h>	46	#include <syscall/syscall.h>
47	#include <sysinfo/sysinfo.h>	47	#include <sysinfo/sysinfo.h>
48		48
49	#include <arch/interrupt.h>	49	#include <arch/interrupt.h>
50	#include <console/chardev.h>	50	#include <console/chardev.h>
51	#include <arch/barrier.h>	51	#include <arch/barrier.h>
52	#include <arch/debugger.h>	52	#include <arch/debugger.h>
53	#include <genarch/fb/fb.h>	53	#include <genarch/fb/fb.h>
54	#include <genarch/fb/visuals.h>	54	#include <genarch/fb/visuals.h>
55	#include <macros.h>	55	#include <macros.h>
56	#include <ddi/device.h>	56	#include <ddi/device.h>
-		57	#include <config.h>
-		58	#include <string.h>
57		59
58	#include <arch/asm/regname.h>	60	#include <arch/asm/regname.h>
59		61
60	/* Size of the code jumping to the exception handler code	62	/* Size of the code jumping to the exception handler code
61	* - J+NOP	63	* - J+NOP
62	*/	64	*/
63	#define EXCEPTION_JUMP_SIZE 8	65	#define EXCEPTION_JUMP_SIZE 8
64		66
65	#define TLB_EXC ((char *) 0x80000000)	67	#define TLB_EXC ((char *) 0x80000000)
66	#define NORM_EXC ((char *) 0x80000180)	68	#define NORM_EXC ((char *) 0x80000180)
67	#define CACHE_EXC ((char *) 0x80000100)	69	#define CACHE_EXC ((char *) 0x80000100)
68		70
69		71
70	/* Why the linker moves the variable 64K away in assembler	72	/* Why the linker moves the variable 64K away in assembler
71	* when not in .text section?	73	* when not in .text section?
72	*/	74	*/
73		75
74	/* Stack pointer saved when entering user mode */	76	/* Stack pointer saved when entering user mode */
75	uintptr_t supervisor_sp __attribute__ ((section (".text")));	77	uintptr_t supervisor_sp __attribute__ ((section (".text")));
76		78
77	count_t cpu_count = 0;	79	count_t cpu_count = 0;
78		80
-		81	/** Performs mips32-specific initialization before main_bsp() is called. */
79	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)	82	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)
80	{	83	{
81	/* Setup usermode */	84	/* Setup usermode */
82	init.cnt = bootinfo->cnt;	85	init.cnt = bootinfo->cnt;
83		86
84	count_t i;	87	count_t i;
85	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {	88	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
86	init.tasks[i].addr = bootinfo->tasks[i].addr;	89	init.tasks[i].addr = bootinfo->tasks[i].addr;
87	init.tasks[i].size = bootinfo->tasks[i].size;	90	init.tasks[i].size = bootinfo->tasks[i].size;
-		91	strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
-		92	CONFIG_TASK_NAME_BUFLEN);
88	}	93	}
89		94
90	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {	95	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
91	if ((bootinfo->cpumap & (1 << i)) != 0)	96	if ((bootinfo->cpumap & (1 << i)) != 0)
92	cpu_count++;	97	cpu_count++;
93	}	98	}
94	}	99	}
95		100
96	void arch_pre_mm_init(void)	101	void arch_pre_mm_init(void)
97	{	102	{
98	/* It is not assumed by default */	103	/* It is not assumed by default */
99	interrupts_disable();	104	interrupts_disable();
100		105
101	/* Initialize dispatch table */	106	/* Initialize dispatch table */
102	exception_init();	107	exception_init();
103		108
104	/* Copy the exception vectors to the right places */	109	/* Copy the exception vectors to the right places */
105	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);	110	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
106	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);	111	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
107	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);	112	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
108	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);	113	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
109	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);	114	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
110	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);	115	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
111		116
112	/*	117	/*
113	* Switch to BEV normal level so that exception vectors point to the	118	* Switch to BEV normal level so that exception vectors point to the
114	* kernel. Clear the error level.	119	* kernel. Clear the error level.
115	*/	120	*/
116	cp0_status_write(cp0_status_read() &	121	cp0_status_write(cp0_status_read() &
117	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));	122	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));
118		123
119	/*	124	/*
120	* Mask all interrupts	125	* Mask all interrupts
121	*/	126	*/
122	cp0_mask_all_int();	127	cp0_mask_all_int();
123		128
124	debugger_init();	129	debugger_init();
125	}	130	}
126		131
127	void arch_post_mm_init(void)	132	void arch_post_mm_init(void)
128	{	133	{
129	interrupt_init();	134	interrupt_init();
130	console_init(device_assign_devno());	135	console_init(device_assign_devno());
131	#ifdef CONFIG_FB	136	#ifdef CONFIG_FB
132	/* GXemul framebuffer */	137	/* GXemul framebuffer */
133	fb_properties_t gxemul_prop = {	138	fb_properties_t gxemul_prop = {
134	.addr = 0x12000000,	139	.addr = 0x12000000,
135	.offset = 0,	140	.offset = 0,
136	.x = 640,	141	.x = 640,
137	.y = 480,	142	.y = 480,
138	.scan = 1920,	143	.scan = 1920,
139	.visual = VISUAL_BGR_8_8_8,	144	.visual = VISUAL_BGR_8_8_8,
140	};	145	};
141	fb_init(&gxemul_prop);	146	fb_init(&gxemul_prop);
142	#endif	147	#endif
143		148
144	#ifdef MACHINE_msim	149	#ifdef MACHINE_msim
145	sysinfo_set_item_val("machine.msim", NULL, 1);	150	sysinfo_set_item_val("machine.msim", NULL, 1);
146	#endif	151	#endif
147		152
148	#ifdef MACHINE_simics	153	#ifdef MACHINE_simics
149	sysinfo_set_item_val("machine.simics", NULL, 1);	154	sysinfo_set_item_val("machine.simics", NULL, 1);
150	#endif	155	#endif
151		156
152	#ifdef MACHINE_bgxemul	157	#ifdef MACHINE_bgxemul
153	sysinfo_set_item_val("machine.bgxemul", NULL, 1);	158	sysinfo_set_item_val("machine.bgxemul", NULL, 1);
154	#endif	159	#endif
155		160
156	#ifdef MACHINE_lgxemul	161	#ifdef MACHINE_lgxemul
157	sysinfo_set_item_val("machine.lgxemul", NULL, 1);	162	sysinfo_set_item_val("machine.lgxemul", NULL, 1);
158	#endif	163	#endif
159	}	164	}
160		165
161	void arch_post_cpu_init(void)	166	void arch_post_cpu_init(void)
162	{	167	{
163	}	168	}
164		169
165	void arch_pre_smp_init(void)	170	void arch_pre_smp_init(void)
166	{	171	{
167	}	172	}
168		173
169	void arch_post_smp_init(void)	174	void arch_post_smp_init(void)
170	{	175	{
171	}	176	}
172		177
173	void calibrate_delay_loop(void)	178	void calibrate_delay_loop(void)
174	{	179	{
175	}	180	}
176		181
177	void userspace(uspace_arg_t *kernel_uarg)	182	void userspace(uspace_arg_t *kernel_uarg)
178	{	183	{
179	/* EXL = 1, UM = 1, IE = 1 */	184	/* EXL = 1, UM = 1, IE = 1 */
180	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	185	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
181	cp0_status_um_bit \| cp0_status_ie_enabled_bit));	186	cp0_status_um_bit \| cp0_status_ie_enabled_bit));
182	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);	187	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
183	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),	188	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
184	(uintptr_t) kernel_uarg->uspace_uarg,	189	(uintptr_t) kernel_uarg->uspace_uarg,
185	(uintptr_t) kernel_uarg->uspace_entry);	190	(uintptr_t) kernel_uarg->uspace_entry);
186		191
187	while (1);	192	while (1);
188	}	193	}
189		194
190	/** Perform mips32 specific tasks needed before the new task is run. */	195	/** Perform mips32 specific tasks needed before the new task is run. */
191	void before_task_runs_arch(void)	196	void before_task_runs_arch(void)
192	{	197	{
193	}	198	}
194		199
195	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	200	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
196	void before_thread_runs_arch(void)	201	void before_thread_runs_arch(void)
197	{	202	{
198	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -	203	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
199	SP_DELTA];	204	SP_DELTA];
200	}	205	}
201		206
202	void after_thread_ran_arch(void)	207	void after_thread_ran_arch(void)
203	{	208	{
204	}	209	}
205		210
206	/** Set thread-local-storage pointer	211	/** Set thread-local-storage pointer
207	*	212	*
208	* We have it currently in K1, it is	213	* We have it currently in K1, it is
209	* possible to have it separately in the future.	214	* possible to have it separately in the future.
210	*/	215	*/
211	unative_t sys_tls_set(unative_t addr)	216	unative_t sys_tls_set(unative_t addr)
212	{	217	{
213	return 0;	218	return 0;
214	}	219	}
215		220
216	void arch_reboot(void)	221	void arch_reboot(void)
217	{	222	{
218	___halt();	223	___halt();
219		224
220	while (1);	225	while (1);
221	}	226	}
222		227
223	/** Construct function pointer	228	/** Construct function pointer
224	*	229	*
225	* @param fptr function pointer structure	230	* @param fptr function pointer structure
226	* @param addr function address	231	* @param addr function address
227	* @param caller calling function address	232	* @param caller calling function address
228	*	233	*
229	* @return address of the function pointer	234	* @return address of the function pointer
230	*	235	*
231	*/	236	*/
232	void arch_construct_function(fncptr_t fptr, void addr, void caller)	237	void arch_construct_function(fncptr_t fptr, void addr, void caller)
233	{	238	{
234	return addr;	239	return addr;
235	}	240	}
236		241
237	/** @}	242	/** @}
238	*/	243	*/
239		244

Subversion Repositories HelenOS

(root)/branches/dynload/kernel/arch/mips32/src/mips32.c – Rev 4343 → 4345