WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/ia64/src/interrupt.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * Copyright (c) 2005 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64interrupt
 * @{
 */
/** @file
 */
 
#include <arch/interrupt.h>
#include <interrupt.h>
#include <ddi/irq.h>
#include <panic.h>
#include <print.h>
 
#include <debug.h>
#include <console/console.h>
#include <arch/types.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <arch/register.h>
#include <arch.h>
#include <syscall/syscall.h>
#include <print.h>
#include <proc/scheduler.h>
#include <ipc/sysipc.h>
#include <ipc/irq.h>
#include <ipc/ipc.h>
#include <synch/spinlock.h>
#include <mm/tlb.h>
#include <symtab.h>
 
#define VECTORS_64_BUNDLE   20
#define VECTORS_16_BUNDLE   48
#define VECTORS_16_BUNDLE_START 0x5000
#define VECTOR_MAX      0x7f00
 
#define BUNDLE_SIZE     16
 
char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
    "VHPT Translation vector",
    "Instruction TLB vector",
    "Data TLB vector",
    "Alternate Instruction TLB vector",
    "Alternate Data TLB vector",
    "Data Nested TLB vector",
    "Instruction Key Miss vector",
    "Data Key Miss vector",
    "Dirty-Bit vector",
    "Instruction Access-Bit vector",
    "Data Access-Bit vector"
    "Break Instruction vector",
    "External Interrupt vector"
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
    "Page Not Present vector",
    "Key Permission vector",
    "Instruction Access rights vector",
    "Data Access Rights vector",
    "General Exception vector",
    "Disabled FP-Register vector",
    "NaT Consumption vector",
    "Speculation vector",
    "Reserved",
    "Debug vector",
    "Unaligned Reference vector",
    "Unsupported Data Reference vector",
    "Floating-point Fault vector",
    "Floating-point Trap vector",
    "Lower-Privilege Transfer Trap vector",
    "Taken Branch Trap vector",
    "Single Step Trap vector",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "Reserved",
    "IA-32 Exception vector",
    "IA-32 Intercept vector",
    "IA-32 Interrupt vector",
    "Reserved",
    "Reserved",
    "Reserved"
};
 
static char *vector_to_string(uint16_t vector);
static void dump_interrupted_context(istate_t *istate);
 
char *vector_to_string(uint16_t vector)
{
    ASSERT(vector <= VECTOR_MAX);
   
    if (vector >= VECTORS_16_BUNDLE_START)
        return vector_names_16_bundle[(vector -
            VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)];
    else
        return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)];
}
 
void dump_interrupted_context(istate_t *istate)
{
    char *ifa, *iipa, *iip;
 
    ifa = symtab_fmt_name_lookup(istate->cr_ifa);
    iipa = symtab_fmt_name_lookup(istate->cr_iipa);
    iip = symtab_fmt_name_lookup(istate->cr_iip);
 
    putchar('\n');
    printf("Interrupted context dump:\n");
    printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,
        istate->ar_bspstore);
    printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,
        istate->ar_rsc);
    printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,
        istate->ar_pfs);
    printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,
        istate->cr_ipsr);
   
    printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip,
        istate->cr_isr.ei, iip);
    printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
    printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
}
 
void general_exception(uint64_t vector, istate_t *istate)
{
    char *desc = "";
 
    switch (istate->cr_isr.ge_code) {
    case GE_ILLEGALOP:
        desc = "Illegal Operation fault";
        break;
    case GE_PRIVOP:
        desc = "Privileged Operation fault";
        break;
    case GE_PRIVREG:
        desc = "Privileged Register fault";
        break;
    case GE_RESREGFLD:
        desc = "Reserved Register/Field fault";
        break;
    case GE_DISBLDISTRAN:
        desc = "Disabled Instruction Set Transition fault";
        break;
    case GE_ILLEGALDEP:
        desc = "Illegal Dependency fault";
        break;
    default:
        desc = "unknown";
        break;
    }
 
    fault_if_from_uspace(istate, "General Exception (%s).", desc);
 
    dump_interrupted_context(istate);
    panic("General Exception (%s).", desc);
}
 
void disabled_fp_register(uint64_t vector, istate_t *istate)
{
#ifdef CONFIG_FPU_LAZY
    scheduler_fpu_lazy_request();
#else
    fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
        (uint16_t) vector, vector_to_string(vector));
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s).", (uint16_t) vector,
        vector_to_string(vector));
#endif
}
 
void nop_handler(uint64_t vector, istate_t *istate)
{
}
 
/** Handle syscall. */
int break_instruction(uint64_t vector, istate_t *istate)
{
    /*
     * Move to next instruction after BREAK.
     */
    if (istate->cr_ipsr.ri == 2) {
        istate->cr_ipsr.ri = 0;
        istate->cr_iip += 16;
    } else {
        istate->cr_ipsr.ri++;
    }
 
    return syscall_handler(istate->in0, istate->in1, istate->in2,
        istate->in3, istate->in4, istate->in5, istate->in6);
}
 
void universal_handler(uint64_t vector, istate_t *istate)
{
    fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
        (uint16_t) vector, vector_to_string(vector));
    dump_interrupted_context(istate);
    panic("Interruption: %#hx (%s).", (uint16_t) vector,
        vector_to_string(vector));
}
 
static void end_of_local_irq(void)
{
    asm volatile ("mov cr.eoi=r0;;");
}
 
 
void external_interrupt(uint64_t vector, istate_t *istate)
{
    cr_ivr_t ivr;
    irq_t *irq;
   
    ivr.value = ivr_read();
    srlz_d();
 
    switch (ivr.vector) {
    case INTERRUPT_SPURIOUS:
#ifdef CONFIG_DEBUG
        printf("cpu%d: spurious interrupt\n", CPU->id);
#endif
        break;
 
#ifdef CONFIG_SMP
    case VECTOR_TLB_SHOOTDOWN_IPI:
        tlb_shootdown_ipi_recv();
        end_of_local_irq();
        break;
#endif
 
    case INTERRUPT_TIMER:
        irq = irq_dispatch_and_lock(ivr.vector);
        if (irq) {
            irq->handler(irq);
            spinlock_unlock(&irq->lock);
        } else {
            panic("Unhandled Internal Timer Interrupt (%d).",
                ivr.vector);
        }
        break;
    default:
        irq = irq_dispatch_and_lock(ivr.vector);
        if (irq) {
            /*
             * The IRQ handler was found.
             */
            if (irq->preack) {
                /* Send EOI before processing the interrupt */
                end_of_local_irq();
            }
            irq->handler(irq);
            if (!irq->preack)
                end_of_local_irq();
            spinlock_unlock(&irq->lock);
        } else {
            /*
             * Unhandled interrupt.
             */
            end_of_local_irq();
#ifdef CONFIG_DEBUG
            printf("\nUnhandled External Interrupt Vector %d\n",
                ivr.vector);
#endif
        }
        break;
    }
}
 
void trap_virtual_enable_irqs(uint16_t irqmask)
{
}
 
/** @}
 */
 

Rev 4343	Rev 4346
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* Copyright (c) 2005 Jakub Vana	3	* Copyright (c) 2005 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup ia64interrupt	30	/** @addtogroup ia64interrupt
31	* @{	31	* @{
32	*/	32	*/
33	/** @file	33	/** @file
34	*/	34	*/
35		35
36	#include <arch/interrupt.h>	36	#include <arch/interrupt.h>
37	#include <interrupt.h>	37	#include <interrupt.h>
38	#include <ddi/irq.h>	38	#include <ddi/irq.h>
39	#include <panic.h>	39	#include <panic.h>
40	#include <print.h>	40	#include <print.h>
41	#include <symtab.h>	-
42	#include <debug.h>	41	#include <debug.h>
43	#include <console/console.h>	42	#include <console/console.h>
44	#include <arch/types.h>	43	#include <arch/types.h>
45	#include <arch/asm.h>	44	#include <arch/asm.h>
46	#include <arch/barrier.h>	45	#include <arch/barrier.h>
47	#include <arch/register.h>	46	#include <arch/register.h>
48	#include <arch.h>	47	#include <arch.h>
49	#include <syscall/syscall.h>	48	#include <syscall/syscall.h>
50	#include <print.h>	49	#include <print.h>
51	#include <proc/scheduler.h>	50	#include <proc/scheduler.h>
52	#include <ipc/sysipc.h>	51	#include <ipc/sysipc.h>
53	#include <ipc/irq.h>	52	#include <ipc/irq.h>
54	#include <ipc/ipc.h>	53	#include <ipc/ipc.h>
55	#include <synch/spinlock.h>	54	#include <synch/spinlock.h>
56	#include <mm/tlb.h>	55	#include <mm/tlb.h>
-		56	#include <symtab.h>
57		57
58	#define VECTORS_64_BUNDLE 20	58	#define VECTORS_64_BUNDLE 20
59	#define VECTORS_16_BUNDLE 48	59	#define VECTORS_16_BUNDLE 48
60	#define VECTORS_16_BUNDLE_START 0x5000	60	#define VECTORS_16_BUNDLE_START 0x5000
61	#define VECTOR_MAX 0x7f00	61	#define VECTOR_MAX 0x7f00
62		62
63	#define BUNDLE_SIZE 16	63	#define BUNDLE_SIZE 16
64		64
65	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {	65	char *vector_names_64_bundle[VECTORS_64_BUNDLE] = {
66	"VHPT Translation vector",	66	"VHPT Translation vector",
67	"Instruction TLB vector",	67	"Instruction TLB vector",
68	"Data TLB vector",	68	"Data TLB vector",
69	"Alternate Instruction TLB vector",	69	"Alternate Instruction TLB vector",
70	"Alternate Data TLB vector",	70	"Alternate Data TLB vector",
71	"Data Nested TLB vector",	71	"Data Nested TLB vector",
72	"Instruction Key Miss vector",	72	"Instruction Key Miss vector",
73	"Data Key Miss vector",	73	"Data Key Miss vector",
74	"Dirty-Bit vector",	74	"Dirty-Bit vector",
75	"Instruction Access-Bit vector",	75	"Instruction Access-Bit vector",
76	"Data Access-Bit vector"	76	"Data Access-Bit vector"
77	"Break Instruction vector",	77	"Break Instruction vector",
78	"External Interrupt vector"	78	"External Interrupt vector"
79	"Reserved",	79	"Reserved",
80	"Reserved",	80	"Reserved",
81	"Reserved",	81	"Reserved",
82	"Reserved",	82	"Reserved",
83	"Reserved",	83	"Reserved",
84	"Reserved",	84	"Reserved",
85	"Reserved"	85	"Reserved"
86	};	86	};
87		87
88	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {	88	char *vector_names_16_bundle[VECTORS_16_BUNDLE] = {
89	"Page Not Present vector",	89	"Page Not Present vector",
90	"Key Permission vector",	90	"Key Permission vector",
91	"Instruction Access rights vector",	91	"Instruction Access rights vector",
92	"Data Access Rights vector",	92	"Data Access Rights vector",
93	"General Exception vector",	93	"General Exception vector",
94	"Disabled FP-Register vector",	94	"Disabled FP-Register vector",
95	"NaT Consumption vector",	95	"NaT Consumption vector",
96	"Speculation vector",	96	"Speculation vector",
97	"Reserved",	97	"Reserved",
98	"Debug vector",	98	"Debug vector",
99	"Unaligned Reference vector",	99	"Unaligned Reference vector",
100	"Unsupported Data Reference vector",	100	"Unsupported Data Reference vector",
101	"Floating-point Fault vector",	101	"Floating-point Fault vector",
102	"Floating-point Trap vector",	102	"Floating-point Trap vector",
103	"Lower-Privilege Transfer Trap vector",	103	"Lower-Privilege Transfer Trap vector",
104	"Taken Branch Trap vector",	104	"Taken Branch Trap vector",
105	"Single Step Trap vector",	105	"Single Step Trap vector",
106	"Reserved",	106	"Reserved",
107	"Reserved",	107	"Reserved",
108	"Reserved",	108	"Reserved",
109	"Reserved",	109	"Reserved",
110	"Reserved",	110	"Reserved",
111	"Reserved",	111	"Reserved",
112	"Reserved",	112	"Reserved",
113	"Reserved",	113	"Reserved",
114	"IA-32 Exception vector",	114	"IA-32 Exception vector",
115	"IA-32 Intercept vector",	115	"IA-32 Intercept vector",
116	"IA-32 Interrupt vector",	116	"IA-32 Interrupt vector",
117	"Reserved",	117	"Reserved",
118	"Reserved",	118	"Reserved",
119	"Reserved"	119	"Reserved"
120	};	120	};
121		121
122	static char *vector_to_string(uint16_t vector);	122	static char *vector_to_string(uint16_t vector);
123	static void dump_interrupted_context(istate_t *istate);	123	static void dump_interrupted_context(istate_t *istate);
124		124
125	char *vector_to_string(uint16_t vector)	125	char *vector_to_string(uint16_t vector)
126	{	126	{
127	ASSERT(vector <= VECTOR_MAX);	127	ASSERT(vector <= VECTOR_MAX);
128		128
129	if (vector >= VECTORS_16_BUNDLE_START)	129	if (vector >= VECTORS_16_BUNDLE_START)
130	return vector_names_16_bundle[(vector -	130	return vector_names_16_bundle[(vector -
131	VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)];	131	VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)];
132	else	132	else
133	return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)];	133	return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)];
134	}	134	}
135		135
136	void dump_interrupted_context(istate_t *istate)	136	void dump_interrupted_context(istate_t *istate)
137	{	137	{
138	char ifa, iipa, *iip;	138	char ifa, iipa, *iip;
139		139
140	ifa = get_symtab_entry(istate->cr_ifa);	140	ifa = symtab_fmt_name_lookup(istate->cr_ifa);
141	iipa = get_symtab_entry(istate->cr_iipa);	141	iipa = symtab_fmt_name_lookup(istate->cr_iipa);
142	iip = get_symtab_entry(istate->cr_iip);	142	iip = symtab_fmt_name_lookup(istate->cr_iip);
143		143
144	putchar('\n');	144	putchar('\n');
145	printf("Interrupted context dump:\n");	145	printf("Interrupted context dump:\n");
146	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,	146	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,
147	istate->ar_bspstore);	147	istate->ar_bspstore);
148	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,	148	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,
149	istate->ar_rsc);	149	istate->ar_rsc);
150	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,	150	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,
151	istate->ar_pfs);	151	istate->ar_pfs);
152	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,	152	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,
153	istate->cr_ipsr);	153	istate->cr_ipsr);
154		154
155	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip,	155	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip,
156	istate->cr_isr.ei, iip);	156	istate->cr_isr.ei, iip);
157	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);	157	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
158	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);	158	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
159	}	159	}
160		160
161	void general_exception(uint64_t vector, istate_t *istate)	161	void general_exception(uint64_t vector, istate_t *istate)
162	{	162	{
163	char *desc = "";	163	char *desc = "";
164		164
165	switch (istate->cr_isr.ge_code) {	165	switch (istate->cr_isr.ge_code) {
166	case GE_ILLEGALOP:	166	case GE_ILLEGALOP:
167	desc = "Illegal Operation fault";	167	desc = "Illegal Operation fault";
168	break;	168	break;
169	case GE_PRIVOP:	169	case GE_PRIVOP:
170	desc = "Privileged Operation fault";	170	desc = "Privileged Operation fault";
171	break;	171	break;
172	case GE_PRIVREG:	172	case GE_PRIVREG:
173	desc = "Privileged Register fault";	173	desc = "Privileged Register fault";
174	break;	174	break;
175	case GE_RESREGFLD:	175	case GE_RESREGFLD:
176	desc = "Reserved Register/Field fault";	176	desc = "Reserved Register/Field fault";
177	break;	177	break;
178	case GE_DISBLDISTRAN:	178	case GE_DISBLDISTRAN:
179	desc = "Disabled Instruction Set Transition fault";	179	desc = "Disabled Instruction Set Transition fault";
180	break;	180	break;
181	case GE_ILLEGALDEP:	181	case GE_ILLEGALDEP:
182	desc = "Illegal Dependency fault";	182	desc = "Illegal Dependency fault";
183	break;	183	break;
184	default:	184	default:
185	desc = "unknown";	185	desc = "unknown";
186	break;	186	break;
187	}	187	}
188		188
189	fault_if_from_uspace(istate, "General Exception (%s).", desc);	189	fault_if_from_uspace(istate, "General Exception (%s).", desc);
190		190
191	dump_interrupted_context(istate);	191	dump_interrupted_context(istate);
192	panic("General Exception (%s).", desc);	192	panic("General Exception (%s).", desc);
193	}	193	}
194		194
195	void disabled_fp_register(uint64_t vector, istate_t *istate)	195	void disabled_fp_register(uint64_t vector, istate_t *istate)
196	{	196	{
197	#ifdef CONFIG_FPU_LAZY	197	#ifdef CONFIG_FPU_LAZY
198	scheduler_fpu_lazy_request();	198	scheduler_fpu_lazy_request();
199	#else	199	#else
200	fault_if_from_uspace(istate, "Interruption: %#hx (%s).",	200	fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
201	(uint16_t) vector, vector_to_string(vector));	201	(uint16_t) vector, vector_to_string(vector));
202	dump_interrupted_context(istate);	202	dump_interrupted_context(istate);
203	panic("Interruption: %#hx (%s).", (uint16_t) vector,	203	panic("Interruption: %#hx (%s).", (uint16_t) vector,
204	vector_to_string(vector));	204	vector_to_string(vector));
205	#endif	205	#endif
206	}	206	}
207		207
208	void nop_handler(uint64_t vector, istate_t *istate)	208	void nop_handler(uint64_t vector, istate_t *istate)
209	{	209	{
210	}	210	}
211		211
212	/** Handle syscall. */	212	/** Handle syscall. */
213	int break_instruction(uint64_t vector, istate_t *istate)	213	int break_instruction(uint64_t vector, istate_t *istate)
214	{	214	{
215	/*	215	/*
216	* Move to next instruction after BREAK.	216	* Move to next instruction after BREAK.
217	*/	217	*/
218	if (istate->cr_ipsr.ri == 2) {	218	if (istate->cr_ipsr.ri == 2) {
219	istate->cr_ipsr.ri = 0;	219	istate->cr_ipsr.ri = 0;
220	istate->cr_iip += 16;	220	istate->cr_iip += 16;
221	} else {	221	} else {
222	istate->cr_ipsr.ri++;	222	istate->cr_ipsr.ri++;
223	}	223	}
224		224
225	return syscall_handler(istate->in0, istate->in1, istate->in2,	225	return syscall_handler(istate->in0, istate->in1, istate->in2,
226	istate->in3, istate->in4, istate->in5, istate->in6);	226	istate->in3, istate->in4, istate->in5, istate->in6);
227	}	227	}
228		228
229	void universal_handler(uint64_t vector, istate_t *istate)	229	void universal_handler(uint64_t vector, istate_t *istate)
230	{	230	{
231	fault_if_from_uspace(istate, "Interruption: %#hx (%s).",	231	fault_if_from_uspace(istate, "Interruption: %#hx (%s).",
232	(uint16_t) vector, vector_to_string(vector));	232	(uint16_t) vector, vector_to_string(vector));
233	dump_interrupted_context(istate);	233	dump_interrupted_context(istate);
234	panic("Interruption: %#hx (%s).", (uint16_t) vector,	234	panic("Interruption: %#hx (%s).", (uint16_t) vector,
235	vector_to_string(vector));	235	vector_to_string(vector));
236	}	236	}
237		237
238	static void end_of_local_irq(void)	238	static void end_of_local_irq(void)
239	{	239	{
240	asm volatile ("mov cr.eoi=r0;;");	240	asm volatile ("mov cr.eoi=r0;;");
241	}	241	}
242		242
243		243
244	void external_interrupt(uint64_t vector, istate_t *istate)	244	void external_interrupt(uint64_t vector, istate_t *istate)
245	{	245	{
246	cr_ivr_t ivr;	246	cr_ivr_t ivr;
247	irq_t *irq;	247	irq_t *irq;
248		248
249	ivr.value = ivr_read();	249	ivr.value = ivr_read();
250	srlz_d();	250	srlz_d();
251		251
252	switch (ivr.vector) {	252	switch (ivr.vector) {
253	case INTERRUPT_SPURIOUS:	253	case INTERRUPT_SPURIOUS:
254	#ifdef CONFIG_DEBUG	254	#ifdef CONFIG_DEBUG
255	printf("cpu%d: spurious interrupt\n", CPU->id);	255	printf("cpu%d: spurious interrupt\n", CPU->id);
256	#endif	256	#endif
257	break;	257	break;
258		258
259	#ifdef CONFIG_SMP	259	#ifdef CONFIG_SMP
260	case VECTOR_TLB_SHOOTDOWN_IPI:	260	case VECTOR_TLB_SHOOTDOWN_IPI:
261	tlb_shootdown_ipi_recv();	261	tlb_shootdown_ipi_recv();
262	end_of_local_irq();	262	end_of_local_irq();
263	break;	263	break;
264	#endif	264	#endif
265		265
266	case INTERRUPT_TIMER:	266	case INTERRUPT_TIMER:
267	irq = irq_dispatch_and_lock(ivr.vector);	267	irq = irq_dispatch_and_lock(ivr.vector);
268	if (irq) {	268	if (irq) {
269	irq->handler(irq);	269	irq->handler(irq);
270	spinlock_unlock(&irq->lock);	270	spinlock_unlock(&irq->lock);
271	} else {	271	} else {
272	panic("Unhandled Internal Timer Interrupt (%d).",	272	panic("Unhandled Internal Timer Interrupt (%d).",
273	ivr.vector);	273	ivr.vector);
274	}	274	}
275	break;	275	break;
276	default:	276	default:
277	irq = irq_dispatch_and_lock(ivr.vector);	277	irq = irq_dispatch_and_lock(ivr.vector);
278	if (irq) {	278	if (irq) {
279	/*	279	/*
280	* The IRQ handler was found.	280	* The IRQ handler was found.
281	*/	281	*/
282	if (irq->preack) {	282	if (irq->preack) {
283	/* Send EOI before processing the interrupt */	283	/* Send EOI before processing the interrupt */
284	end_of_local_irq();	284	end_of_local_irq();
285	}	285	}
286	irq->handler(irq);	286	irq->handler(irq);
287	if (!irq->preack)	287	if (!irq->preack)
288	end_of_local_irq();	288	end_of_local_irq();
289	spinlock_unlock(&irq->lock);	289	spinlock_unlock(&irq->lock);
290	} else {	290	} else {
291	/*	291	/*
292	* Unhandled interrupt.	292	* Unhandled interrupt.
293	*/	293	*/
294	end_of_local_irq();	294	end_of_local_irq();
295	#ifdef CONFIG_DEBUG	295	#ifdef CONFIG_DEBUG
296	printf("\nUnhandled External Interrupt Vector %d\n",	296	printf("\nUnhandled External Interrupt Vector %d\n",
297	ivr.vector);	297	ivr.vector);
298	#endif	298	#endif
299	}	299	}
300	break;	300	break;
301	}	301	}
302	}	302	}
303		303
304	void trap_virtual_enable_irqs(uint16_t irqmask)	304	void trap_virtual_enable_irqs(uint16_t irqmask)
305	{	305	{
306	}	306	}
307		307
308	/** @}	308	/** @}
309	*/	309	*/
310		310

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(root)/branches/dynload/kernel/arch/ia64/src/interrupt.c – Rev 4343 → 4346