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1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
-
 
54
#include <arch/bootinfo.h>
53
#include <arch/bootinfo.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
54
#include <genarch/drivers/legacy/ia32/io.h>
56
#include <genarch/drivers/ega/ega.h>
55
#include <genarch/drivers/ega/ega.h>
57
#include <genarch/kbrd/kbrd.h>
56
#include <genarch/kbrd/kbrd.h>
58
#include <genarch/srln/srln.h>
57
#include <genarch/srln/srln.h>
59
#include <genarch/drivers/i8042/i8042.h>
58
#include <genarch/drivers/i8042/i8042.h>
60
#include <genarch/drivers/ns16550/ns16550.h>
59
#include <genarch/drivers/ns16550/ns16550.h>
61
#include <arch/drivers/kbd.h>
60
#include <arch/drivers/kbd.h>
62
#include <smp/smp.h>
61
#include <smp/smp.h>
63
#include <smp/ipi.h>
62
#include <smp/ipi.h>
64
#include <arch/atomic.h>
63
#include <arch/atomic.h>
65
#include <panic.h>
64
#include <panic.h>
66
#include <print.h>
65
#include <print.h>
67
#include <sysinfo/sysinfo.h>
66
#include <sysinfo/sysinfo.h>
68
#include <string.h>
67
#include <string.h>
69
 
68
 
70
/* NS16550 as a COM 1 */
69
/* NS16550 as a COM 1 */
71
#define NS16550_IRQ  (4 + LEGACY_INTERRUPT_BASE)
70
#define NS16550_IRQ  (4 + LEGACY_INTERRUPT_BASE)
72
 
71
 
73
bootinfo_t *bootinfo;
72
bootinfo_t *bootinfo;
74
 
73
 
75
static uint64_t iosapic_base = 0xfec00000;
74
static uint64_t iosapic_base = 0xfec00000;
76
 
75
 
77
/** Performs ia64-specific initialization before main_bsp() is called. */
76
/** Performs ia64-specific initialization before main_bsp() is called. */
78
void arch_pre_main(void)
77
void arch_pre_main(void)
79
{
78
{
80
    /* Setup usermode init tasks. */
79
    /* Setup usermode init tasks. */
81
 
80
 
82
    unsigned int i;
81
    unsigned int i;
83
   
82
   
84
    init.cnt = bootinfo->taskmap.count;
83
    init.cnt = bootinfo->taskmap.count;
85
   
84
   
86
    for (i = 0; i < init.cnt; i++) {
85
    for (i = 0; i < init.cnt; i++) {
87
        init.tasks[i].addr =
86
        init.tasks[i].addr =
88
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
87
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
89
            VRN_MASK;
88
            VRN_MASK;
90
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
89
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
91
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
90
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
92
            CONFIG_TASK_NAME_BUFLEN);
91
            CONFIG_TASK_NAME_BUFLEN);
93
    }
92
    }
94
}
93
}
95
 
94
 
96
void arch_pre_mm_init(void)
95
void arch_pre_mm_init(void)
97
{
96
{
98
    /*
97
    /*
99
     * Set Interruption Vector Address (i.e. location of interruption vector
98
     * Set Interruption Vector Address (i.e. location of interruption vector
100
     * table).
99
     * table).
101
     */
100
     */
102
    iva_write((uintptr_t) &ivt);
101
    iva_write((uintptr_t) &ivt);
103
    srlz_d();
102
    srlz_d();
104
   
103
   
105
}
104
}
106
 
105
 
107
static void iosapic_init(void)
106
static void iosapic_init(void)
108
{
107
{
109
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
108
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
110
    int i;
109
    int i;
111
   
110
   
112
    int myid, myeid;
111
    int myid, myeid;
113
   
112
   
114
    myid = ia64_get_cpu_id();
113
    myid = ia64_get_cpu_id();
115
    myeid = ia64_get_cpu_eid();
114
    myeid = ia64_get_cpu_eid();
116
 
115
 
117
    for (i = 0; i < 16; i++) {
116
    for (i = 0; i < 16; i++) {
118
        if (i == 2)
117
        if (i == 2)
119
            continue;    /* Disable Cascade interrupt */
118
            continue;    /* Disable Cascade interrupt */
120
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
119
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
121
        srlz_d();
120
        srlz_d();
122
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
121
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
123
        srlz_d();
122
        srlz_d();
124
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
123
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
125
        srlz_d();
124
        srlz_d();
126
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
125
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
127
            myeid << (48 - 32);
126
            myeid << (48 - 32);
128
        srlz_d();
127
        srlz_d();
129
    }
128
    }
130
 
129
 
131
}
130
}
132
 
131
 
133
void arch_post_mm_init(void)
132
void arch_post_mm_init(void)
134
{
133
{
135
    if (config.cpu_active == 1) {
134
    if (config.cpu_active == 1) {
136
        iosapic_init();
135
        iosapic_init();
137
        irq_init(INR_COUNT, INR_COUNT);
136
        irq_init(INR_COUNT, INR_COUNT);
138
    }
137
    }
139
    it_init(); 
138
    it_init(); 
140
}
139
}
141
 
140
 
142
void arch_post_cpu_init(void)
141
void arch_post_cpu_init(void)
143
{
142
{
144
}
143
}
145
 
144
 
146
void arch_pre_smp_init(void)
145
void arch_pre_smp_init(void)
147
{
146
{
148
}
147
}
149
 
148
 
150
void arch_post_smp_init(void)
149
void arch_post_smp_init(void)
151
{
150
{
152
#ifdef SKI
151
#ifdef SKI
153
    indev_t *in;
152
    indev_t *in;
154
    in = skiin_init();
153
    in = skiin_init();
155
    if (in)
154
    if (in)
156
        srln_init(in);
155
        srln_init(in);
157
    skiout_init();
156
    skiout_init();
158
#endif
157
#endif
159
   
158
   
160
#ifdef CONFIG_EGA
159
#ifdef CONFIG_EGA
161
    ega_init(EGA_BASE, EGA_VIDEORAM);
160
    ega_init(EGA_BASE, EGA_VIDEORAM);
162
#endif
161
#endif
163
   
162
   
164
#ifdef CONFIG_NS16550
163
#ifdef CONFIG_NS16550
165
    devno_t devno_ns16550 = device_assign_devno();
-
 
166
    indev_t *kbrdin_ns16550
164
    indev_t *kbrdin_ns16550
167
        = ns16550_init((ns16550_t *) NS16550_BASE, devno_ns16550, NS16550_IRQ, NULL, NULL);
165
        = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
168
    if (kbrdin_ns16550)
166
    if (kbrdin_ns16550)
169
        srln_init(kbrdin_ns16550);
167
        srln_init(kbrdin_ns16550);
170
   
168
   
171
    sysinfo_set_item_val("kbd", NULL, true);
169
    sysinfo_set_item_val("kbd", NULL, true);
172
    sysinfo_set_item_val("kbd.devno", NULL, devno_ns16550);
-
 
173
    sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
170
    sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
174
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
171
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
175
    sysinfo_set_item_val("kbd.address.physical", NULL,
172
    sysinfo_set_item_val("kbd.address.physical", NULL,
176
        (uintptr_t) NS16550_BASE);
173
        (uintptr_t) NS16550_BASE);
177
    sysinfo_set_item_val("kbd.address.kernel", NULL,
174
    sysinfo_set_item_val("kbd.address.kernel", NULL,
178
        (uintptr_t) NS16550_BASE);
175
        (uintptr_t) NS16550_BASE);
179
#endif
176
#endif
180
   
177
   
181
#ifdef CONFIG_I8042
178
#ifdef CONFIG_I8042
182
    devno_t devno_i8042 = device_assign_devno();
-
 
183
    indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, devno_i8042, IRQ_KBD);
179
    indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
184
    if (kbrdin_i8042)
180
    if (kbrdin_i8042)
185
        kbrd_init(kbrdin_i8042);
181
        kbrd_init(kbrdin_i8042);
186
   
182
   
187
    sysinfo_set_item_val("kbd", NULL, true);
183
    sysinfo_set_item_val("kbd", NULL, true);
188
    sysinfo_set_item_val("kbd.devno", NULL, devno_i8042);
-
 
189
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
184
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
190
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
185
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
191
    sysinfo_set_item_val("kbd.address.physical", NULL,
186
    sysinfo_set_item_val("kbd.address.physical", NULL,
192
        (uintptr_t) I8042_BASE);
187
        (uintptr_t) I8042_BASE);
193
    sysinfo_set_item_val("kbd.address.kernel", NULL,
188
    sysinfo_set_item_val("kbd.address.kernel", NULL,
194
        (uintptr_t) I8042_BASE);
189
        (uintptr_t) I8042_BASE);
195
#endif
190
#endif
196
   
191
   
197
    sysinfo_set_item_val("ia64_iospace", NULL, true);
192
    sysinfo_set_item_val("ia64_iospace", NULL, true);
198
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
193
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
199
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
194
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
200
}
195
}
201
 
196
 
202
 
197
 
203
/** Enter userspace and never return. */
198
/** Enter userspace and never return. */
204
void userspace(uspace_arg_t *kernel_uarg)
199
void userspace(uspace_arg_t *kernel_uarg)
205
{
200
{
206
    psr_t psr;
201
    psr_t psr;
207
    rsc_t rsc;
202
    rsc_t rsc;
208
 
203
 
209
    psr.value = psr_read();
204
    psr.value = psr_read();
210
    psr.cpl = PL_USER;
205
    psr.cpl = PL_USER;
211
    psr.i = true;           /* start with interrupts enabled */
206
    psr.i = true;           /* start with interrupts enabled */
212
    psr.ic = true;
207
    psr.ic = true;
213
    psr.ri = 0;         /* start with instruction #0 */
208
    psr.ri = 0;         /* start with instruction #0 */
214
    psr.bn = 1;         /* start in bank 0 */
209
    psr.bn = 1;         /* start in bank 0 */
215
 
210
 
216
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
211
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
217
    rsc.loadrs = 0;
212
    rsc.loadrs = 0;
218
    rsc.be = false;
213
    rsc.be = false;
219
    rsc.pl = PL_USER;
214
    rsc.pl = PL_USER;
220
    rsc.mode = 3;           /* eager mode */
215
    rsc.mode = 3;           /* eager mode */
221
 
216
 
222
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
217
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
223
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
218
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
224
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
219
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
225
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
220
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
226
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
221
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
227
 
222
 
228
    while (1)
223
    while (1)
229
        ;
224
        ;
230
}
225
}
231
 
226
 
232
/** Set thread-local-storage pointer.
227
/** Set thread-local-storage pointer.
233
 *
228
 *
234
 * We use r13 (a.k.a. tp) for this purpose.
229
 * We use r13 (a.k.a. tp) for this purpose.
235
 */
230
 */
236
unative_t sys_tls_set(unative_t addr)
231
unative_t sys_tls_set(unative_t addr)
237
{
232
{
238
        return 0;
233
        return 0;
239
}
234
}
240
 
235
 
241
/** Acquire console back for kernel
236
/** Acquire console back for kernel
242
 *
237
 *
243
 */
238
 */
244
void arch_grab_console(void)
239
void arch_grab_console(void)
245
{
240
{
246
#ifdef SKI
241
#ifdef SKI
247
    ski_kbd_grab();
242
    ski_kbd_grab();
248
#endif
243
#endif
249
}
244
}
250
 
245
 
251
/** Return console to userspace
246
/** Return console to userspace
252
 *
247
 *
253
 */
248
 */
254
void arch_release_console(void)
249
void arch_release_console(void)
255
{
250
{
256
#ifdef SKI
251
#ifdef SKI
257
    ski_kbd_release();
252
    ski_kbd_release();
258
#endif
253
#endif
259
}
254
}
260
 
255
 
261
void arch_reboot(void)
256
void arch_reboot(void)
262
{
257
{
263
    pio_write_8((ioport8_t *)0x64, 0xfe);
258
    pio_write_8((ioport8_t *)0x64, 0xfe);
264
    while (1)
259
    while (1)
265
        ;
260
        ;
266
}
261
}
267
 
262
 
268
/** Construct function pointer
263
/** Construct function pointer
269
 *
264
 *
270
 * @param fptr   function pointer structure
265
 * @param fptr   function pointer structure
271
 * @param addr   function address
266
 * @param addr   function address
272
 * @param caller calling function address
267
 * @param caller calling function address
273
 *
268
 *
274
 * @return address of the function pointer
269
 * @return address of the function pointer
275
 *
270
 *
276
 */
271
 */
277
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
272
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
278
{
273
{
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    fptr->fnc = (unative_t) addr;
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    fptr->fnc = (unative_t) addr;
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    fptr->gp = ((unative_t *) caller)[1];
275
    fptr->gp = ((unative_t *) caller)[1];
281
   
276
   
282
    return (void *) fptr;
277
    return (void *) fptr;
283
}
278
}
284
 
279
 
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/** @}
280
/** @}
286
 */
281
 */
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