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1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/bootinfo.h>
54
#include <arch/bootinfo.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
55
#include <genarch/drivers/legacy/ia32/io.h>
56
#include <genarch/drivers/ega/ega.h>
56
#include <genarch/drivers/ega/ega.h>
57
#include <genarch/kbd/i8042.h>
57
#include <genarch/kbd/i8042.h>
58
#include <genarch/kbd/ns16550.h>
58
#include <genarch/kbd/ns16550.h>
59
#include <smp/smp.h>
59
#include <smp/smp.h>
60
#include <smp/ipi.h>
60
#include <smp/ipi.h>
61
#include <arch/atomic.h>
61
#include <arch/atomic.h>
62
#include <panic.h>
62
#include <panic.h>
63
#include <print.h>
63
#include <print.h>
64
#include <sysinfo/sysinfo.h>
64
#include <sysinfo/sysinfo.h>
-
 
65
#include <string.h>
65
 
66
 
66
/* NS16550 as a COM 1 */
67
/* NS16550 as a COM 1 */
67
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
68
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
68
 
69
 
69
bootinfo_t *bootinfo;
70
bootinfo_t *bootinfo;
70
 
71
 
71
static uint64_t iosapic_base = 0xfec00000;
72
static uint64_t iosapic_base = 0xfec00000;
72
 
73
 
-
 
74
/** Performs ia64-specific initialization before main_bsp() is called. */
73
void arch_pre_main(void)
75
void arch_pre_main(void)
74
{
76
{
75
    /* Setup usermode init tasks. */
77
    /* Setup usermode init tasks. */
76
 
78
 
77
    unsigned int i;
79
    unsigned int i;
78
   
80
   
79
    init.cnt = bootinfo->taskmap.count;
81
    init.cnt = bootinfo->taskmap.count;
80
   
82
   
81
    for (i = 0; i < init.cnt; i++) {
83
    for (i = 0; i < init.cnt; i++) {
82
        init.tasks[i].addr =
84
        init.tasks[i].addr =
83
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
85
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
84
            VRN_MASK;
86
            VRN_MASK;
85
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
87
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
-
 
88
        strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name,
-
 
89
            CONFIG_TASK_NAME_BUFLEN);
86
    }
90
    }
87
}
91
}
88
 
92
 
89
void arch_pre_mm_init(void)
93
void arch_pre_mm_init(void)
90
{
94
{
91
    /*
95
    /*
92
     * Set Interruption Vector Address (i.e. location of interruption vector
96
     * Set Interruption Vector Address (i.e. location of interruption vector
93
     * table).
97
     * table).
94
     */
98
     */
95
    iva_write((uintptr_t) &ivt);
99
    iva_write((uintptr_t) &ivt);
96
    srlz_d();
100
    srlz_d();
97
   
101
   
98
}
102
}
99
 
103
 
100
static void iosapic_init(void)
104
static void iosapic_init(void)
101
{
105
{
102
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
106
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
103
    int i;
107
    int i;
104
   
108
   
105
    int myid, myeid;
109
    int myid, myeid;
106
   
110
   
107
    myid = ia64_get_cpu_id();
111
    myid = ia64_get_cpu_id();
108
    myeid = ia64_get_cpu_eid();
112
    myeid = ia64_get_cpu_eid();
109
 
113
 
110
    for (i = 0; i < 16; i++) {
114
    for (i = 0; i < 16; i++) {
111
        if (i == 2)
115
        if (i == 2)
112
            continue;    /* Disable Cascade interrupt */
116
            continue;    /* Disable Cascade interrupt */
113
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
117
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
114
        srlz_d();
118
        srlz_d();
115
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
119
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
116
        srlz_d();
120
        srlz_d();
117
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
121
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
118
        srlz_d();
122
        srlz_d();
119
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
123
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
120
            myeid << (48 - 32);
124
            myeid << (48 - 32);
121
        srlz_d();
125
        srlz_d();
122
    }
126
    }
123
 
127
 
124
}
128
}
125
 
129
 
126
 
130
 
127
void arch_post_mm_init(void)
131
void arch_post_mm_init(void)
128
{
132
{
129
    if (config.cpu_active == 1) {
133
    if (config.cpu_active == 1) {
130
        iosapic_init();
134
        iosapic_init();
131
        irq_init(INR_COUNT, INR_COUNT);
135
        irq_init(INR_COUNT, INR_COUNT);
132
#ifdef SKI
136
#ifdef SKI
133
        ski_init_console();
137
        ski_init_console();
134
#else
138
#else
135
        ega_init(EGA_BASE, EGA_VIDEORAM);
139
        ega_init(EGA_BASE, EGA_VIDEORAM);
136
#endif
140
#endif
137
    }
141
    }
138
    it_init();
142
    it_init();
139
       
143
       
140
}
144
}
141
 
145
 
142
void arch_post_cpu_init(void)
146
void arch_post_cpu_init(void)
143
{
147
{
144
}
148
}
145
 
149
 
146
void arch_pre_smp_init(void)
150
void arch_pre_smp_init(void)
147
{
151
{
148
}
152
}
149
 
153
 
150
void arch_post_smp_init(void)
154
void arch_post_smp_init(void)
151
{
155
{
152
    /*
156
    /*
153
     * Create thread that polls keyboard.
157
     * Create thread that polls keyboard.
154
     */
158
     */
155
#ifdef SKI
159
#ifdef SKI
156
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
160
    thread_t *t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
157
    if (!t)
161
    if (!t)
158
        panic("Cannot create kkbdpoll.");
162
        panic("Cannot create kkbdpoll.");
159
    thread_ready(t);
163
    thread_ready(t);
160
#endif      
164
#endif      
161
 
165
 
162
#ifdef I460GX
166
#ifdef I460GX
163
    devno_t devno = device_assign_devno();
167
    devno_t devno = device_assign_devno();
164
    inr_t inr;
168
    inr_t inr;
165
 
169
 
166
#ifdef CONFIG_NS16550
170
#ifdef CONFIG_NS16550
167
    inr = NS16550_IRQ;
171
    inr = NS16550_IRQ;
168
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
172
    (void) ns16550_init((ns16550_t *)NS16550_BASE, devno, inr, NULL, NULL);
169
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
173
    sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
170
    sysinfo_set_item_val("kbd.port", NULL, (uintptr_t)NS16550_BASE);
174
    sysinfo_set_item_val("kbd.address.physical", NULL,
-
 
175
        (uintptr_t) NS16550_BASE);
-
 
176
    sysinfo_set_item_val("kbd.address.kernel", NULL,
-
 
177
        (uintptr_t) NS16550_BASE);
171
#else
178
#else
172
    inr = IRQ_KBD;
179
    inr = IRQ_KBD;
173
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr);
180
    (void) i8042_init((i8042_t *)I8042_BASE, devno, inr);
174
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
181
    sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY);
-
 
182
    sysinfo_set_item_val("kbd.address.physical", NULL,
-
 
183
        (uintptr_t) I8042_BASE);
-
 
184
    sysinfo_set_item_val("kbd.address.kernel", NULL,
-
 
185
        (uintptr_t) I8042_BASE);
175
#endif
186
#endif
176
    sysinfo_set_item_val("kbd", NULL, true);
187
    sysinfo_set_item_val("kbd", NULL, true);
177
    sysinfo_set_item_val("kbd.devno", NULL, devno);
188
    sysinfo_set_item_val("kbd.devno", NULL, devno);
178
    sysinfo_set_item_val("kbd.inr", NULL, inr);
189
    sysinfo_set_item_val("kbd.inr", NULL, inr);
179
#endif
190
#endif
180
 
191
 
181
    sysinfo_set_item_val("ia64_iospace", NULL, true);
192
    sysinfo_set_item_val("ia64_iospace", NULL, true);
182
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
193
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
183
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
194
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
184
}
195
}
185
 
196
 
186
 
197
 
187
/** Enter userspace and never return. */
198
/** Enter userspace and never return. */
188
void userspace(uspace_arg_t *kernel_uarg)
199
void userspace(uspace_arg_t *kernel_uarg)
189
{
200
{
190
    psr_t psr;
201
    psr_t psr;
191
    rsc_t rsc;
202
    rsc_t rsc;
192
 
203
 
193
    psr.value = psr_read();
204
    psr.value = psr_read();
194
    psr.cpl = PL_USER;
205
    psr.cpl = PL_USER;
195
    psr.i = true;           /* start with interrupts enabled */
206
    psr.i = true;           /* start with interrupts enabled */
196
    psr.ic = true;
207
    psr.ic = true;
197
    psr.ri = 0;         /* start with instruction #0 */
208
    psr.ri = 0;         /* start with instruction #0 */
198
    psr.bn = 1;         /* start in bank 0 */
209
    psr.bn = 1;         /* start in bank 0 */
199
 
210
 
200
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
211
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
201
    rsc.loadrs = 0;
212
    rsc.loadrs = 0;
202
    rsc.be = false;
213
    rsc.be = false;
203
    rsc.pl = PL_USER;
214
    rsc.pl = PL_USER;
204
    rsc.mode = 3;           /* eager mode */
215
    rsc.mode = 3;           /* eager mode */
205
 
216
 
206
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
217
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
207
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
218
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
208
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
219
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
209
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
220
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
210
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
221
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
211
 
222
 
212
    while (1)
223
    while (1)
213
        ;
224
        ;
214
}
225
}
215
 
226
 
216
/** Set thread-local-storage pointer.
227
/** Set thread-local-storage pointer.
217
 *
228
 *
218
 * We use r13 (a.k.a. tp) for this purpose.
229
 * We use r13 (a.k.a. tp) for this purpose.
219
 */
230
 */
220
unative_t sys_tls_set(unative_t addr)
231
unative_t sys_tls_set(unative_t addr)
221
{
232
{
222
        return 0;
233
        return 0;
223
}
234
}
224
 
235
 
225
/** Acquire console back for kernel
236
/** Acquire console back for kernel
226
 *
237
 *
227
 */
238
 */
228
void arch_grab_console(void)
239
void arch_grab_console(void)
229
{
240
{
230
#ifdef SKI
241
#ifdef SKI
231
    ski_kbd_grab();
242
    ski_kbd_grab();
232
#endif
243
#endif
233
}
244
}
234
 
245
 
235
/** Return console to userspace
246
/** Return console to userspace
236
 *
247
 *
237
 */
248
 */
238
void arch_release_console(void)
249
void arch_release_console(void)
239
{
250
{
240
#ifdef SKI
251
#ifdef SKI
241
    ski_kbd_release();
252
    ski_kbd_release();
242
#endif
253
#endif
243
}
254
}
244
 
255
 
245
void arch_reboot(void)
256
void arch_reboot(void)
246
{
257
{
247
    pio_write_8((ioport8_t *)0x64, 0xfe);
258
    pio_write_8((ioport8_t *)0x64, 0xfe);
248
    while (1)
259
    while (1)
249
        ;
260
        ;
250
}
261
}
251
 
262
 
252
/** Construct function pointer
263
/** Construct function pointer
253
 *
264
 *
254
 * @param fptr   function pointer structure
265
 * @param fptr   function pointer structure
255
 * @param addr   function address
266
 * @param addr   function address
256
 * @param caller calling function address
267
 * @param caller calling function address
257
 *
268
 *
258
 * @return address of the function pointer
269
 * @return address of the function pointer
259
 *
270
 *
260
 */
271
 */
261
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
272
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
262
{
273
{
263
    fptr->fnc = (unative_t) addr;
274
    fptr->fnc = (unative_t) addr;
264
    fptr->gp = ((unative_t *) caller)[1];
275
    fptr->gp = ((unative_t *) caller)[1];
265
   
276
   
266
    return (void *) fptr;
277
    return (void *) fptr;
267
}
278
}
268
 
279
 
269
/** @}
280
/** @}
270
 */
281
 */
271
 
282