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    /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
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    /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
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    write_msr(IA32_MSR_SYSENTER_ESP, kstk);
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    write_msr(IA32_MSR_SYSENTER_ESP, kstk);
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    /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
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    /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
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    CPU->arch.tss->esp0 = kstk;
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    CPU->arch.tss->esp0 = kstk;
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    CPU->arch.tss->ss0 = selector(KDATA_DES);
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    CPU->arch.tss->ss0 = gdtselector(KDATA_DES);
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    /* Set up TLS in GS register */
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    /* Set up TLS in GS register */
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    set_tls_desc(THREAD->arch.tls);
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    set_tls_desc(THREAD->arch.tls);
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}
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}
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