WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/amd64/src/ddi/ddi.c


/*
 * Copyright (c) 2006 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64ddi
 * @{
 */
/** @file
 */
 
#include <ddi/ddi.h>
#include <arch/ddi/ddi.h>
#include <proc/task.h>
#include <arch/types.h>
#include <adt/bitmap.h>
#include <mm/slab.h>
#include <arch/pm.h>
#include <errno.h>
#include <arch/cpu.h>
#include <arch.h>
#include <align.h>
 
/** Enable I/O space range for task.
 *
 * Interrupts are disabled and task is locked.
 *
 * @param task Task.
 * @param ioaddr Startign I/O space address.
 * @param size Size of the enabled I/O range.
 *
 * @return 0 on success or an error code from errno.h.
 */
int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
{
    count_t bits;
   
    bits = ioaddr + size;
    if (bits > IO_PORTS)
        return ENOENT;
   
    if (task->arch.iomap.bits < bits) {
        bitmap_t oldiomap;
        uint8_t *newmap;
       
        /*
         * The I/O permission bitmap is too small and needs to be grown.
         */
       
        newmap = (uint8_t *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
        if (!newmap)
            return ENOMEM;
       
        bitmap_initialize(&oldiomap, task->arch.iomap.map,
            task->arch.iomap.bits);
        bitmap_initialize(&task->arch.iomap, newmap, bits);
       
        /*
         * Mark the new range inaccessible.
         */
        bitmap_set_range(&task->arch.iomap, oldiomap.bits,
            bits - oldiomap.bits);
       
        /*
         * In case there really existed smaller iomap,
         * copy its contents and deallocate it.
         */
        if (oldiomap.bits) {
            bitmap_copy(&task->arch.iomap, &oldiomap,
                oldiomap.bits);
            free(oldiomap.map);
        }
    }
   
    /*
     * Enable the range and we are done.
     */
    bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
   
    /*
     * Increment I/O Permission bitmap generation counter.
     */
    task->arch.iomapver++;
   
    return 0;
}
 
/** Install I/O Permission bitmap.
 *
 * Current task's I/O permission bitmap, if any, is installed
 * in the current CPU's TSS.
 *
 * Interrupts must be disabled prior this call.
 */
void io_perm_bitmap_install(void)
{
    count_t bits;
    ptr_16_64_t cpugdtr;
    descriptor_t *gdt_p;
    tss_descriptor_t *tss_desc;
    count_t ver;
   
    /* First, copy the I/O Permission Bitmap. */
    spinlock_lock(&TASK->lock);
    ver = TASK->arch.iomapver;
    if ((bits = TASK->arch.iomap.bits)) {
        bitmap_t iomap;
   
        ASSERT(TASK->arch.iomap.map);
        bitmap_initialize(&iomap, CPU->arch.tss->iomap,
            TSS_IOMAP_SIZE * 8);
        bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
        /*
         * It is safe to set the trailing eight bits because of the
         * extra convenience byte in TSS_IOMAP_SIZE.
         */
        bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
    }
    spinlock_unlock(&TASK->lock);
   
    /*
     * Second, adjust TSS segment limit.
     * Take the extra ending byte will all bits set into account.
     */
    gdtr_store(&cpugdtr);
    gdt_p = (descriptor_t *) cpugdtr.base;
    gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
    gdtr_load(&cpugdtr);
   
    /*
     * Before we load new TSS limit, the current TSS descriptor
     * type must be changed to describe inactive TSS.
     */
    tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
    tss_desc->type = AR_TSS;
    tr_load(gdtselector(TSS_DES));
   
    /*
     * Update the generation count so that faults caused by
     * early accesses can be serviced.
     */
    CPU->arch.iomapver_copy = ver;
}
 
/** @}
 */
 

Rev 2927	Rev 4346
1	/*	1	/*
2	* Copyright (c) 2006 Jakub Jermar	2	* Copyright (c) 2006 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64ddi	29	/** @addtogroup amd64ddi
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <ddi/ddi.h>	35	#include <ddi/ddi.h>
36	#include <arch/ddi/ddi.h>	36	#include <arch/ddi/ddi.h>
37	#include <proc/task.h>	37	#include <proc/task.h>
38	#include <arch/types.h>	38	#include <arch/types.h>
39	#include <adt/bitmap.h>	39	#include <adt/bitmap.h>
40	#include <mm/slab.h>	40	#include <mm/slab.h>
41	#include <arch/pm.h>	41	#include <arch/pm.h>
42	#include <errno.h>	42	#include <errno.h>
43	#include <arch/cpu.h>	43	#include <arch/cpu.h>
44	#include <arch.h>	44	#include <arch.h>
45	#include <align.h>	45	#include <align.h>
46		46
47	/** Enable I/O space range for task.	47	/** Enable I/O space range for task.
48	*	48	*
49	* Interrupts are disabled and task is locked.	49	* Interrupts are disabled and task is locked.
50	*	50	*
51	* @param task Task.	51	* @param task Task.
52	* @param ioaddr Startign I/O space address.	52	* @param ioaddr Startign I/O space address.
53	* @param size Size of the enabled I/O range.	53	* @param size Size of the enabled I/O range.
54	*	54	*
55	* @return 0 on success or an error code from errno.h.	55	* @return 0 on success or an error code from errno.h.
56	*/	56	*/
57	int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)	57	int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
58	{	58	{
59	count_t bits;	59	count_t bits;
60		60
61	bits = ioaddr + size;	61	bits = ioaddr + size;
62	if (bits > IO_PORTS)	62	if (bits > IO_PORTS)
63	return ENOENT;	63	return ENOENT;
64		64
65	if (task->arch.iomap.bits < bits) {	65	if (task->arch.iomap.bits < bits) {
66	bitmap_t oldiomap;	66	bitmap_t oldiomap;
67	uint8_t *newmap;	67	uint8_t *newmap;
68		68
69	/*	69	/*
70	* The I/O permission bitmap is too small and needs to be grown.	70	* The I/O permission bitmap is too small and needs to be grown.
71	*/	71	*/
72		72
73	newmap = (uint8_t *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);	73	newmap = (uint8_t *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
74	if (!newmap)	74	if (!newmap)
75	return ENOMEM;	75	return ENOMEM;
76		76
77	bitmap_initialize(&oldiomap, task->arch.iomap.map,	77	bitmap_initialize(&oldiomap, task->arch.iomap.map,
78	task->arch.iomap.bits);	78	task->arch.iomap.bits);
79	bitmap_initialize(&task->arch.iomap, newmap, bits);	79	bitmap_initialize(&task->arch.iomap, newmap, bits);
80		80
81	/*	81	/*
82	* Mark the new range inaccessible.	82	* Mark the new range inaccessible.
83	*/	83	*/
84	bitmap_set_range(&task->arch.iomap, oldiomap.bits,	84	bitmap_set_range(&task->arch.iomap, oldiomap.bits,
85	bits - oldiomap.bits);	85	bits - oldiomap.bits);
86		86
87	/*	87	/*
88	* In case there really existed smaller iomap,	88	* In case there really existed smaller iomap,
89	* copy its contents and deallocate it.	89	* copy its contents and deallocate it.
90	*/	90	*/
91	if (oldiomap.bits) {	91	if (oldiomap.bits) {
92	bitmap_copy(&task->arch.iomap, &oldiomap,	92	bitmap_copy(&task->arch.iomap, &oldiomap,
93	oldiomap.bits);	93	oldiomap.bits);
94	free(oldiomap.map);	94	free(oldiomap.map);
95	}	95	}
96	}	96	}
97		97
98	/*	98	/*
99	* Enable the range and we are done.	99	* Enable the range and we are done.
100	*/	100	*/
101	bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);	101	bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
102		102
103	/*	103	/*
104	* Increment I/O Permission bitmap generation counter.	104	* Increment I/O Permission bitmap generation counter.
105	*/	105	*/
106	task->arch.iomapver++;	106	task->arch.iomapver++;
107		107
108	return 0;	108	return 0;
109	}	109	}
110		110
111	/** Install I/O Permission bitmap.	111	/** Install I/O Permission bitmap.
112	*	112	*
113	* Current task's I/O permission bitmap, if any, is installed	113	* Current task's I/O permission bitmap, if any, is installed
114	* in the current CPU's TSS.	114	* in the current CPU's TSS.
115	*	115	*
116	* Interrupts must be disabled prior this call.	116	* Interrupts must be disabled prior this call.
117	*/	117	*/
118	void io_perm_bitmap_install(void)	118	void io_perm_bitmap_install(void)
119	{	119	{
120	count_t bits;	120	count_t bits;
121	ptr_16_64_t cpugdtr;	121	ptr_16_64_t cpugdtr;
122	descriptor_t *gdt_p;	122	descriptor_t *gdt_p;
123	tss_descriptor_t *tss_desc;	123	tss_descriptor_t *tss_desc;
124	count_t ver;	124	count_t ver;
125		125
126	/* First, copy the I/O Permission Bitmap. */	126	/* First, copy the I/O Permission Bitmap. */
127	spinlock_lock(&TASK->lock);	127	spinlock_lock(&TASK->lock);
128	ver = TASK->arch.iomapver;	128	ver = TASK->arch.iomapver;
129	if ((bits = TASK->arch.iomap.bits)) {	129	if ((bits = TASK->arch.iomap.bits)) {
130	bitmap_t iomap;	130	bitmap_t iomap;
131		131
132	ASSERT(TASK->arch.iomap.map);	132	ASSERT(TASK->arch.iomap.map);
133	bitmap_initialize(&iomap, CPU->arch.tss->iomap,	133	bitmap_initialize(&iomap, CPU->arch.tss->iomap,
134	TSS_IOMAP_SIZE * 8);	134	TSS_IOMAP_SIZE * 8);
135	bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);	135	bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
136	/*	136	/*
137	* It is safe to set the trailing eight bits because of the	137	* It is safe to set the trailing eight bits because of the
138	* extra convenience byte in TSS_IOMAP_SIZE.	138	* extra convenience byte in TSS_IOMAP_SIZE.
139	*/	139	*/
140	bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);	140	bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
141	}	141	}
142	spinlock_unlock(&TASK->lock);	142	spinlock_unlock(&TASK->lock);
143		143
144	/*	144	/*
145	* Second, adjust TSS segment limit.	145	* Second, adjust TSS segment limit.
146	* Take the extra ending byte will all bits set into account.	146	* Take the extra ending byte will all bits set into account.
147	*/	147	*/
148	gdtr_store(&cpugdtr);	148	gdtr_store(&cpugdtr);
149	gdt_p = (descriptor_t *) cpugdtr.base;	149	gdt_p = (descriptor_t *) cpugdtr.base;
150	gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));	150	gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
151	gdtr_load(&cpugdtr);	151	gdtr_load(&cpugdtr);
152		152
153	/*	153	/*
154	* Before we load new TSS limit, the current TSS descriptor	154	* Before we load new TSS limit, the current TSS descriptor
155	* type must be changed to describe inactive TSS.	155	* type must be changed to describe inactive TSS.
156	*/	156	*/
157	tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];	157	tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
158	tss_desc->type = AR_TSS;	158	tss_desc->type = AR_TSS;
159	tr_load(gdtselector(TSS_DES));	159	tr_load(gdtselector(TSS_DES));
160		160
161	/*	161	/*
162	* Update the generation count so that faults caused by	162	* Update the generation count so that faults caused by
163	* early accesses can be serviced.	163	* early accesses can be serviced.
164	*/	164	*/
165	CPU->arch.iomapver_copy = ver;	165	CPU->arch.iomapver_copy = ver;
166	}	166	}
167		167
168	/** @}	168	/** @}
169	*/	169	*/
170		170

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(root)/branches/dynload/kernel/arch/amd64/src/ddi/ddi.c – Rev 2927 → 4346