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Rev 4399 Rev 4418
Line 107... Line 107...
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    psycho_conf_read(dev, reg, (uint8_t *)(&res), sizeof(uint32_t));   
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    psycho_conf_read(dev, reg, (uint8_t *)(&res), sizeof(uint32_t));   
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    futex_up(&pci_conf_futex);
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    futex_up(&pci_conf_futex);
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    return res;
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    return res;
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}
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}
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static inline uint16_t invert_endianess_16(uint16_t x)
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static inline uint16_t invert_endianness_16(uint16_t x)
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{
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{
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    return (x & 0xFF) << 8 | (x >> 8);
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    return (x & 0xFF) << 8 | (x >> 8);
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}
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}
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static inline uint32_t invert_endianess_32(uint32_t x)
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static inline uint32_t invert_endianness_32(uint32_t x)
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{
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{
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    return ((x & 0xFF) << 24) | ((x & 0xFF00) << 8) | ((x & 0xFF0000) >> 8) | (x >> 24);
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    return ((x & 0xFF) << 24) | ((x & 0xFF00) << 8) | ((x & 0xFF0000) >> 8) | (x >> 24);
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}
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}
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static void psycho_conf_read(pci_dev_t *d, int reg, uint8_t *buf, int len)
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static void psycho_conf_read(pci_dev_t *d, int reg, uint8_t *buf, int len)
Line 124... Line 124...
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    switch (len) {
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    switch (len) {
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        case 1:
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        case 1:
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            buf[0] = pio_read_8(psycho_conf_addr(d, reg));
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            buf[0] = pio_read_8(psycho_conf_addr(d, reg));
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            break;
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            break;
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        case 2:
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        case 2:
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            *((uint16_t *)buf) = invert_endianess_16(pio_read_16(psycho_conf_addr(d, reg)));
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            *((uint16_t *)buf) = invert_endianness_16(pio_read_16(psycho_conf_addr(d, reg)));
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            break;
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            break;
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        case 4:
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        case 4:
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            *((uint32_t *)buf) = invert_endianess_32(pio_read_32(psycho_conf_addr(d, reg)));
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            *((uint32_t *)buf) = invert_endianness_32(pio_read_32(psycho_conf_addr(d, reg)));
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            break;
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            break;
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    }  
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    }  
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}
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}
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static void psycho_conf_write(pci_dev_t *d, int reg, uint8_t *buf, int len)
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static void psycho_conf_write(pci_dev_t *d, int reg, uint8_t *buf, int len)
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    switch (len) {
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    switch (len) {
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        case 1:
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        case 1:
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            pio_write_8(psycho_conf_addr(d, reg), buf[0]);
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            pio_write_8(psycho_conf_addr(d, reg), buf[0]);
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            break;
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            break;
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        case 2:
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        case 2:
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            pio_write_16(psycho_conf_addr(d, reg), invert_endianess_16(*((uint16_t *)buf)));
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            pio_write_16(psycho_conf_addr(d, reg), invert_endianness_16(*((uint16_t *)buf)));
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            break;
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            break;
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        case 4:
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        case 4:
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            pio_write_32(psycho_conf_addr(d, reg), invert_endianess_32(*((uint32_t *)buf)));
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            pio_write_32(psycho_conf_addr(d, reg), invert_endianness_32(*((uint32_t *)buf)));
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            break;
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            break;
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    }
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    }
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}
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}
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/* pci bus structure initialization */
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/* pci bus structure initialization */