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Rev 3022 Rev 4055
Line 26... Line 26...
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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28
 
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#include "asm.h"
29
#include "asm.h"
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#include "regname.h"
30
#include "regname.h"
-
 
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-
 
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.macro SMC_COHERENCY addr
-
 
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	dcbst 0, \addr
-
 
34
	sync
-
 
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	icbi 0, \addr
-
 
36
	sync
-
 
37
	isync
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38
.endm
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39
 
-
 
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.macro FLUSH_DCACHE addr
-
 
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	dcbst 0, \addr
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42
	sync
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	isync
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.endm
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.macro TLB_FLUSH reg
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#include "debug.inc"
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	tlbie \reg
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48
	addi \reg, \reg, 0x1000
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49
.endm
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50
 
33
.text
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.text
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52
 
35
.global halt
53
.global halt
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.global memcpy
54
.global memcpy
Line 138... Line 156...
138
.align PAGE_WIDTH
156
.align PAGE_WIDTH
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.global real_mode
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.global real_mode
140
 
158
 
141
real_mode:
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real_mode:
142
	
160
	
143
	DEBUG_INIT
-
 
144
	DEBUG_real_mode
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145
	
-
 
146
	# copy kernel to proper location
161
	# copy kernel to proper location
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	#
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	#
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	# r5 = trans (pa)
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	# r5 = trans (pa)
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	# r6 = bytes to copy
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	# r6 = bytes to copy
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	# r8 = framebuffer (pa)
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	# r8 = framebuffer (pa)
Line 161... Line 176...
161
		# copy page
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		# copy page
162
		
177
		
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		mtctr r31
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		mtctr r31
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		lwz r29, 0(r5)
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		lwz r29, 0(r5)
165
		
180
		
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		DEBUG_INIT
-
 
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		DEBUG_copy_loop
-
 
168
		
-
 
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		copy_loop:
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		copy_loop:
170
			
182
			
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			lwz r28, 0(r29)
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			lwz r28, 0(r29)
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			stw r28, 0(r30)
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			stw r28, 0(r30)
173
			
185
			
-
 
186
			SMC_COHERENCY r30
-
 
187
			
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			addi r29, r29, 4
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			addi r29, r29, 4
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			addi r30, r30, 4
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			addi r30, r30, 4
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			subi r6, r6, 4
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			subi r6, r6, 4
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191
			
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			cmpwi r6, 0
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			cmpwi r6, 0
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			beq copy_end
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			beq copy_end
180
			
194
			
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			bdnz copy_loop
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			bdnz copy_loop
182
			
196
			
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			DEBUG_end_copy_loop
-
 
184
		
-
 
185
		addi r5, r5, 4
197
		addi r5, r5, 4
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		b page_copy
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		b page_copy
187
	
199
	
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	copy_end:
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	copy_end:
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201
	
190
	DEBUG_segments
-
 
191
	
-
 
192
	# initially fill segment registers
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	# initially fill segment registers
193
	
203
	
194
	li r31, 0
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	li r31, 0
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205
	
196
	li r29, 8
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	li r29, 8
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	mtctr r29
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	mtctr r29
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	li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
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	li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
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209
	
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	seg_fill_uspace:
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	seg_fill_uspace:
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211
	
202
		mtsrin r30, r31
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		mtsrin r30, r31
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		addi r30, r30, 1
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		addi r30, r30, 1
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		addis r31, r31, 0x1000    # move to next SR
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		addis r31, r31, 0x1000    # move to next SR
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218
		
228
		
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		bdnz seg_fill_kernel
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		bdnz seg_fill_kernel
220
	
230
	
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	# invalidate block address translation registers
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	# invalidate block address translation registers
222
	
232
	
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	DEBUG_bat
-
 
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-
 
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	li r30, 0
233
	li r30, 0
226
	
234
	
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	mtspr ibat0u, r30
235
	mtspr ibat0u, r30
228
	mtspr ibat0l, r30
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	mtspr ibat0l, r30
229
	
237
	
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	mtspr dbat3l, r30
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	mtspr dbat3l, r30
250
	
258
	
251
	# create empty Page Hash Table
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	# create empty Page Hash Table
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	# on top of memory, size 64 KB
260
	# on top of memory, size 64 KB
253
	
261
	
254
	DEBUG_pht
-
 
255
	
-
 
256
	lwz r31, 0(r3)                # r31 = memory size
262
	lwz r31, 0(r3)                # r31 = memory size
257
	
263
	
258
	lis r30, 65536@h
264
	lis r30, 65536@h
259
	ori r30, r30, 65536@l         # r30 = 65536
265
	ori r30, r30, 65536@l         # r30 = 65536
260
	
266
	
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272
	pht_clear:
278
	pht_clear:
273
		
279
		
274
		# write zeroes
280
		# write zeroes
275
		
281
		
276
		stw r29, 0(r31)
282
		stw r29, 0(r31)
-
 
283
		FLUSH_DCACHE r31
277
		
284
		
278
		addi r31, r31, 4
285
		addi r31, r31, 4
279
		subi r30, r30, 4
286
		subi r30, r30, 4
280
		
287
		
281
		cmpwi r30, 0
288
		cmpwi r30, 0
282
		beq clear_end
289
		beq clear_end
283
		
290
		
284
		bdnz pht_clear
291
		bdnz pht_clear
285
 
-
 
286
		DEBUG_end_pht_clear
-
 
287
		
292
		
288
	clear_end:
293
	clear_end:
289
	
294
	
290
#ifdef CONFIG_BAT
295
#ifdef CONFIG_BAT
291
	
296
	
292
	# create BAT identity mapping
297
	# create BAT identity mapping
293
	
298
	
294
	DEBUG_mapping
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295
	
-
 
296
	lwz r31, 0(r3)                # r31 = memory size
299
	lwz r31, 0(r3)                # r31 = memory size
297
	
300
	
298
	lis r29, 0x0002
301
	lis r29, 0x0002
299
	cmpw r31, r29
302
	cmpw r31, r29
300
	blt no_bat                    # less than 128 KB -> no BAT
303
	blt no_bat                    # less than 128 KB -> no BAT
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		srw r30, r31, r29         # r30 = mask >> 1
316
		srw r30, r31, r29         # r30 = mask >> 1
314
		or r31, r31, r30          # mask = mask | r30
317
		or r31, r31, r30          # mask = mask | r30
315
		
318
		
316
		bdnz bat_mask
319
		bdnz bat_mask
317
	
320
	
318
	DEBUG_bat_mask
-
 
319
	
-
 
320
	andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
321
	andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
321
	
322
	
322
	li r29, 2
323
	li r29, 2
323
	slw r31, r31, r29             # mask = mask << 2
324
	slw r31, r31, r29             # mask = mask << 2
324
	ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
325
	ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
Line 334... Line 335...
334
	
335
	
335
	mtspr dbat0u, r29
336
	mtspr dbat0u, r29
336
	mtspr dbat0l, r30
337
	mtspr dbat0l, r30
337
	
338
	
338
	no_bat:
339
	no_bat:
339
 
340
	
340
#endif
341
#endif
341
	
342
	
342
	DEBUG_tlb
343
	# flush TLB
343
	
344
	
344
	tlbia
345
	li r31, 0
345
	tlbsync
346
	sync
346
	
347
	
-
 
348
	TLB_FLUSH r31
-
 
349
	TLB_FLUSH r31
-
 
350
	TLB_FLUSH r31
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351
	TLB_FLUSH r31
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352
	TLB_FLUSH r31
-
 
353
	TLB_FLUSH r31
-
 
354
	TLB_FLUSH r31
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355
	TLB_FLUSH r31
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356
	
-
 
357
	TLB_FLUSH r31
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358
	TLB_FLUSH r31
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359
	TLB_FLUSH r31
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360
	TLB_FLUSH r31
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361
	TLB_FLUSH r31
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362
	TLB_FLUSH r31
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363
	TLB_FLUSH r31
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364
	TLB_FLUSH r31
-
 
365
	
-
 
366
	TLB_FLUSH r31
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367
	TLB_FLUSH r31
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368
	TLB_FLUSH r31
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369
	TLB_FLUSH r31
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370
	TLB_FLUSH r31
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371
	TLB_FLUSH r31
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372
	TLB_FLUSH r31
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373
	TLB_FLUSH r31
-
 
374
	
-
 
375
	TLB_FLUSH r31
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376
	TLB_FLUSH r31
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377
	TLB_FLUSH r31
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378
	TLB_FLUSH r31
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379
	TLB_FLUSH r31
-
 
380
	TLB_FLUSH r31
-
 
381
	TLB_FLUSH r31
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382
	TLB_FLUSH r31
-
 
383
	
-
 
384
	TLB_FLUSH r31
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385
	TLB_FLUSH r31
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386
	TLB_FLUSH r31
-
 
387
	TLB_FLUSH r31
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388
	TLB_FLUSH r31
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389
	TLB_FLUSH r31
-
 
390
	TLB_FLUSH r31
-
 
391
	TLB_FLUSH r31
-
 
392
	
-
 
393
	TLB_FLUSH r31
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394
	TLB_FLUSH r31
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395
	TLB_FLUSH r31
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396
	TLB_FLUSH r31
-
 
397
	TLB_FLUSH r31
-
 
398
	TLB_FLUSH r31
-
 
399
	TLB_FLUSH r31
-
 
400
	TLB_FLUSH r31
-
 
401
	
-
 
402
	TLB_FLUSH r31
-
 
403
	TLB_FLUSH r31
-
 
404
	TLB_FLUSH r31
-
 
405
	TLB_FLUSH r31
-
 
406
	TLB_FLUSH r31
-
 
407
	TLB_FLUSH r31
-
 
408
	TLB_FLUSH r31
-
 
409
	TLB_FLUSH r31
-
 
410
	
-
 
411
	TLB_FLUSH r31
-
 
412
	TLB_FLUSH r31
-
 
413
	TLB_FLUSH r31
-
 
414
	TLB_FLUSH r31
-
 
415
	TLB_FLUSH r31
-
 
416
	TLB_FLUSH r31
-
 
417
	TLB_FLUSH r31
347
	DEBUG_prepare
418
	TLB_FLUSH r31
-
 
419
	
-
 
420
	eieio
-
 
421
	tlbsync
-
 
422
	sync
348
	
423
	
349
	# start the kernel
424
	# start the kernel
350
	#
425
	#
351
	# pc = KERNEL_START_ADDR
426
	# pc = KERNEL_START_ADDR
352
	# r3 = bootinfo (pa)
427
	# r3 = bootinfo (pa)
Line 371... Line 446...
371
	ori r31, r31, (msr_ir | msr_dr)@l
446
	ori r31, r31, (msr_ir | msr_dr)@l
372
	mtspr srr1, r31
447
	mtspr srr1, r31
373
	
448
	
374
	sync
449
	sync
375
	isync
450
	isync
376
	
-
 
377
	DEBUG_rfi
-
 
378
	rfi
451
	rfi
379
 
452
 
380
.align PAGE_WIDTH
453
.align PAGE_WIDTH
381
.global trans
454
.global trans
382
trans:
455
trans: