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/*
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/*
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 * Copyright (c) 2007 Petr Stepan, Pavel Jancik
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 * Copyright (c) 2007 Petr Stepan, Pavel Jancik
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32
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/** @addtogroup arm32
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *  @brief Userspace switch.
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 *  @brief Userspace switch.
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 */
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 */
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#include <userspace.h>
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#include <userspace.h>
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-
 
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/** Struct for holding all general purpose registers.
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/** Struct for holding all general purpose registers.
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 *  
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 *  
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 *  Used to set registers when going to userspace.
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 *  Used to set registers when going to userspace.
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 */
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 */
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typedef struct {
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typedef struct {
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    uint32_t r0;
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    uint32_t r0;
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    uint32_t r1;
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    uint32_t r1;
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    uint32_t r2;
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    uint32_t r2;
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    uint32_t r3;
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    uint32_t r3;
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    uint32_t r4;
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    uint32_t r4;
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    uint32_t r5;
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    uint32_t r5;
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    uint32_t r6;
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    uint32_t r6;
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    uint32_t r7;
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    uint32_t r7;
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    uint32_t r8;
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    uint32_t r8;
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    uint32_t r9;
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    uint32_t r9;
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    uint32_t r10;
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    uint32_t r10;
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    uint32_t r11;
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    uint32_t r11;
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    uint32_t r12;
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    uint32_t r12;
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    uint32_t sp;
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    uint32_t sp;
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    uint32_t lr;
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    uint32_t lr;
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    uint32_t pc;
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    uint32_t pc;
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} ustate_t;
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} ustate_t;
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/** Changes processor mode and jumps to the address specified in the first parameter.
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/** Changes processor mode and jumps to the address specified in the first
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 * parameter.
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 *
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 *
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 *  @param kernel_uarg   Userspace settings (entry point, stack, ...).
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 *  @param kernel_uarg   Userspace settings (entry point, stack, ...).
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 */
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 */
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void userspace(uspace_arg_t *kernel_uarg)
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void userspace(uspace_arg_t *kernel_uarg)
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{
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{
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    volatile ustate_t ustate;
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    volatile ustate_t ustate;
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    // set first parameter
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    /* set first parameter */
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    ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
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    ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
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    // clear other registers
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    /* clear other registers */
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    ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
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    ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  = ustate.r5 =
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        ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
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        ustate.r6  = ustate.r7  = ustate.r8  = ustate.r9 = ustate.r10 =
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        ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 =
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        ustate.r11 = ustate.r12 = ustate.lr = 0;
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        ustate.lr = 0;
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    // set user stack
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    /* set user stack */
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    ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + PAGE_SIZE;
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    ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + PAGE_SIZE;
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    // set where uspace execution starts
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    /* set where uspace execution starts */
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    ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
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    ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
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    // status register in user mode
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    /* status register in user mode */
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    ipl_t user_mode = current_status_reg_read() & (~STATUS_REG_MODE_MASK | USER_MODE);
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    ipl_t user_mode = current_status_reg_read() &
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        (~STATUS_REG_MODE_MASK | USER_MODE);
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    // set user mode, set registers, jump
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    /* set user mode, set registers, jump */
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    asm __volatile__ (
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    asm volatile (
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        "mov r0, %0         \n"    
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        "mov r0, %0         \n"
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        "msr spsr_c, %1     \n"
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        "msr spsr_c, %1         \n"
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        "ldmfd r0!, {r0-r12, sp, lr}^  \n"
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        "ldmfd r0!, {r0-r12, sp, lr}^   \n"
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        "ldmfd r0!, {pc}^"
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        "ldmfd r0!, {pc}^\n"
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        :
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        :
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        : "r"(&ustate), "r"(user_mode)
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        : "r" (&ustate), "r" (user_mode)
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        : "r0", "r1"
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        : "r0", "r1"
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    );
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    );
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    // unreachable
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    /* unreachable */
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    while(1) ;
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    while(1)
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        ;
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}
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}
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/** @}
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/** @}
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 */
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 */
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