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| 1 | /* |
1 | /* |
| 2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
2 | * Copyright (c) 2007 Pavel Jancik, Michal Kebrt |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup arm32mm |
29 | /** @addtogroup arm32mm |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** @file |
32 | /** @file |
| 33 | * @brief Page fault related declarations. |
33 | * @brief Page fault related declarations. |
| 34 | */ |
34 | */ |
| 35 | 35 | ||
| 36 | #ifndef KERN_arm32_PAGE_FAULT_H_ |
36 | #ifndef KERN_arm32_PAGE_FAULT_H_ |
| 37 | #define KERN_arm32_PAGE_FAULT_H_ |
37 | #define KERN_arm32_PAGE_FAULT_H_ |
| 38 | 38 | ||
| 39 | #include <arch/types.h> |
39 | #include <arch/types.h> |
| 40 | 40 | ||
| 41 | 41 | ||
| 42 | /** Decribes CP15 "fault status register" (FSR). */ |
42 | /** Decribes CP15 "fault status register" (FSR). */ |
| 43 | typedef struct { |
43 | typedef struct { |
| 44 | unsigned status : 3; |
44 | unsigned status : 3; |
| 45 | unsigned domain : 4; |
45 | unsigned domain : 4; |
| 46 | unsigned zero : 1; |
46 | unsigned zero : 1; |
| 47 | unsigned should_be_zero : 24; |
47 | unsigned should_be_zero : 24; |
| 48 | } ATTRIBUTE_PACKED fault_status_t; |
48 | } ATTRIBUTE_PACKED fault_status_t; |
| 49 | 49 | ||
| 50 | 50 | ||
| 51 | /** Help union used for casting integer value into #fault_status_t. */ |
51 | /** Help union used for casting integer value into #fault_status_t. */ |
| 52 | typedef union { |
52 | typedef union { |
| 53 | fault_status_t fs; |
53 | fault_status_t fs; |
| 54 | uint32_t dummy; |
54 | uint32_t dummy; |
| 55 | } fault_status_union_t; |
55 | } fault_status_union_t; |
| 56 | 56 | ||
| 57 | 57 | ||
| 58 | /** Simplified description of instruction code. |
58 | /** Simplified description of instruction code. |
| 59 | * |
59 | * |
| 60 | * @note Used for recognizing memory access instructions. |
60 | * @note Used for recognizing memory access instructions. |
| 61 | * @see ARM architecture reference (chapter 3.1) |
61 | * @see ARM architecture reference (chapter 3.1) |
| 62 | */ |
62 | */ |
| 63 | typedef struct { |
63 | typedef struct { |
| 64 | unsigned dummy1 : 4; |
64 | unsigned dummy1 : 4; |
| 65 | unsigned bit4 : 1; |
65 | unsigned bit4 : 1; |
| 66 | unsigned bits567 : 3; |
66 | unsigned bits567 : 3; |
| 67 | unsigned dummy : 12; |
67 | unsigned dummy : 12; |
| 68 | unsigned access : 1; |
68 | unsigned access : 1; |
| 69 | unsigned opcode : 4; |
69 | unsigned opcode : 4; |
| 70 | unsigned type : 3; |
70 | unsigned type : 3; |
| 71 | unsigned condition : 4; |
71 | unsigned condition : 4; |
| 72 | } ATTRIBUTE_PACKED instruction_t; |
72 | } ATTRIBUTE_PACKED instruction_t; |
| 73 | 73 | ||
| 74 | 74 | ||
| 75 | /** Help union used for casting pc register (uint_32_t) value into |
75 | /** Help union used for casting pc register (uint_32_t) value into |
| 76 | * #instruction_t pointer. |
76 | * #instruction_t pointer. |
| 77 | */ |
77 | */ |
| 78 | typedef union { |
78 | typedef union { |
| 79 | instruction_t *instr; |
79 | instruction_t *instr; |
| 80 | uint32_t pc; |
80 | uint32_t pc; |
| 81 | } instruction_union_t; |
81 | } instruction_union_t; |
| 82 | - | ||
| 83 | 82 | ||
| 84 | extern void prefetch_abort(int n, istate_t *istate); |
83 | extern void prefetch_abort(int n, istate_t *istate); |
| 85 | extern void data_abort(int n, istate_t *istate); |
84 | extern void data_abort(int n, istate_t *istate); |
| 86 | - | ||
| 87 | 85 | ||
| 88 | #endif |
86 | #endif |
| 89 | 87 | ||
| 90 | /** @} |
88 | /** @} |
| 91 | */ |
89 | */ |
| 92 | - | ||