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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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- 
 
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/** Heavyweight interrupt handler
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/*
 31 
 *
31 
 * This macro roughly follows steps from 1 to 19 described in
 32 
 * This macro roughly follows steps from 1 to 19 described in
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 * Intel Itanium Architecture Software Developer's Manual, Chapter 3.4.2.
 33 
 * Intel Itanium Architecture Software Developer's Manual, Chapter 3.4.2.
33 
 *
 34 
 *
- 
 
 35 
 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
- 
 
 36 
 * This goal is achieved by using procedure calls after RSE becomes operational.
- 
 
 37 
 *
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 * Some steps are skipped (enabling and disabling interrupts).
 38 
 * Some steps are skipped (enabling and disabling interrupts).
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 * Some steps are not fully supported yet (e.g. interruptions
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 * Some steps are not fully supported yet (e.g. interruptions
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 * from user space and floating-point context).
 40 
 * from userspace and floating-point context).
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 */
 41 
 */
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.macro HEAVYWEIGHT_HANDLER offs handler
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.macro HEAVYWEIGHT_HANDLER offs handler
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    .org IVT + \offs
 43 
    .org IVT + \offs
40 
	SAVE_INTERRUPTED_CONTEXT		/* steps 1 - 9 */
 - 
 
41 
	br.call.sptk.many rp = \handler		/* steps 10 - 11 */
 - 
 
42 
	br restore_interrupted_context		/* steps 12 - 19 */
 - 
 
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.endm
 - 
 
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 44 
 
45 
.macro SAVE_INTERRUPTED_CONTEXT
 - 
 
46 
    /* 1. copy interrupt registers into bank 0 */
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    /* 1. copy interrupt registers into bank 0 */
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	mov r24 = cr.iip
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	mov r24 = cr.iip
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	mov r25 = cr.ipsr
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	mov r25 = cr.ipsr
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	mov r26 = cr.iipa
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	mov r26 = cr.iipa
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	mov r27 = cr.isr
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	mov r27 = cr.isr
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	mov r28 = cr.ifa
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	mov r28 = cr.ifa
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51
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    /* 2. preserve predicate register into bank 0 */
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    /* 2. preserve predicate register into bank 0 */
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	mov r29 = pr ;;
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	mov r29 = pr ;;
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54
56 
	/* 3. switch to kernel memory stack */
 55 
    /* 3. switch to kernel memory stack */
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	/* TODO: support interruptions from userspace */
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	/* TODO: support interruptions from userspace */
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	/* assume kernel stack */
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	/* assume kernel stack */
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58
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    /* 4. allocate memory stack for registers saved in bank 0 */
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    /* 4. allocate memory stack for registers saved in bank 0 */
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	st8 [r12] = r29, -8 ;;	/* save predicate registers */
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	st8 [r12] = r29, -8 ;;	/* save predicate registers */
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	st8 [r12] = r28, -8 ;;	/* save cr.ifa */
 - 
 
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	st8 [r12] = r27, -8 ;;	/* save cr.isr */
 - 
 
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	st8 [r12] = r26, -8 ;;	/* save cr.iipa */
 - 
 
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	st8 [r12] = r25, -8 ;;	/* save cr.ipsr */
 - 
 
- 
 
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	st8 [r12] = r24, -8 ;;	/* save cr.iip */
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	st8 [r12] = r24, -8 ;;	/* save cr.iip */
- 
 
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	st8 [r12] = r25, -8 ;;	/* save cr.ipsr */
- 
 
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	st8 [r12] = r26, -8 ;;	/* save cr.iipa */
- 
 
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	st8 [r12] = r27, -8 ;;	/* save cr.isr */
- 
 
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	st8 [r12] = r28, -8 ;;	/* save cr.ifa */
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67 
 
68 
    /* 5. RSE switch */
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    /* 5. RSE switch from interrupted context */
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    	.auto
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    	.auto
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	mov r24 = ar.rsc
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	mov r24 = ar.rsc
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	mov r25 = ar.pfs
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	mov r25 = ar.pfs
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	cover
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	cover
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	mov r26 = cr.ifs
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	mov r26 = cr.ifs
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	st8 [r12] = r29, -8	/* save ar.bsp */
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	st8 [r12] = r29, -8	/* save ar.bsp */
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	mov ar.rsc = r24	/* restore RSE's setting */
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	mov ar.rsc = r24	/* restore RSE's setting */
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	.explicit
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	.explicit
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- 
 
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    /* the rest of the save-handler can be kept outside IVT */
- 
 
 98 
 
- 
 
 99 
	movl r24 = \handler
- 
 
 100 
	mov r25 = b0
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 101 
	br.call.sptk.many rp = heavyweight_handler_inner
- 
 
 102 
0:	mov b0 = r25
- 
 
 103 
 
- 
 
 104 
	{ br heavyweight_handler_finalize }
- 
 
 105 
.endm
- 
 
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- 
 
 107 
.global heavyweight_handler_inner
- 
 
 108 
heavyweight_handler_inner:
- 
 
 109 
	/*
- 
 
 110 
	 * From this point, the rest of the interrupted context
- 
 
 111 
	 * will be preserved in stacked registers and backing store.
- 
 
 112 
	 */
- 
 
 113 
	alloc loc0 = ar.pfs, 0, 46, 0, 0 ;;
- 
 
 114
- 
 
 115 
	/* copy handler address (r24 from bank 0 will be invisible soon) */
- 
 
 116 
	mov loc1 = r24
- 
 
 117 
 
97 
    /* 6. switch to bank 1 and reenable PSR.ic */
 118 
    /* 6. switch to bank 1 and reenable PSR.ic */
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	ssm 0x2000
 119 
	ssm 0x2000
99 
	bsw.1 ;;
 120 
	bsw.1 ;;
100 
	srlz.d
 121 
	srlz.d
101
122
102 
    /* 7. preserve branch and application registers */
 123 
    /* 7. preserve branch and application registers */
- 
 
 124 
    	mov loc2 = ar.unat
- 
 
 125 
	mov loc3 = ar.lc
- 
 
 126 
	mov loc4 = ar.ec
- 
 
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	mov loc5 = ar.ccv
- 
 
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	mov loc6 = ar.csd
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 129 
	mov loc7 = ar.ssd
- 
 
 130
- 
 
 131 
	mov loc8 = b0
- 
 
 132 
	mov loc9 = b1
- 
 
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	mov loc10 = b2
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	mov loc11 = b3
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	mov loc12 = b4
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	mov loc13 = b5
- 
 
 137 
	mov loc14 = b6
- 
 
 138 
	mov loc15 = b7
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139
104 
    /* 8. preserve general and floating-point registers */
 140 
    /* 8. preserve general and floating-point registers */
105 
	/* TODO: save floating-point context */
 141 
	/* TODO: save floating-point context */
- 
 
 142 
	mov loc16 = r1
- 
 
 143 
	mov loc17 = r2
- 
 
 144 
	mov loc18 = r3
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 145 
	mov loc19 = r4
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 146 
	mov loc20 = r5
- 
 
 147 
	mov loc21 = r6
- 
 
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	mov loc22 = r7
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 149 
	mov loc23 = r8
- 
 
 150 
	mov loc24 = r9
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 151 
	mov loc25 = r10
- 
 
 152 
	mov loc26 = r11
- 
 
 153 
	/* skip r12 (stack pointer) */
- 
 
 154 
	mov loc27 = r13
- 
 
 155 
	mov loc28 = r14
- 
 
 156 
	mov loc29 = r15
- 
 
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	mov loc30 = r16
- 
 
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	mov loc31 = r17
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 159 
	mov loc32 = r18
- 
 
 160 
	mov loc33 = r19
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 161 
	mov loc34 = r20
- 
 
 162 
	mov loc35 = r21
- 
 
 163 
	mov loc36 = r22
- 
 
 164 
	mov loc37 = r23
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 165 
	mov loc38 = r24
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 166 
	mov loc39 = r25
- 
 
 167 
	mov loc40 = r26
- 
 
 168 
	mov loc41 = r27
- 
 
 169 
	mov loc42 = r28
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 170 
	mov loc43 = r29
- 
 
 171 
	mov loc44 = r30
- 
 
 172 
	mov loc45 = r31
106
173
107 
    /* 9. skipped (will not enable interrupts) */
 174 
    /* 9. skipped (will not enable interrupts) */
108 
.endm
 - 
 
109 
 
 175 
 
- 
 
 176 
    /* 10. call handler */
- 
 
 177 
    	mov b1 = loc1
110 
.macro RESTORE_INTERRUPTED_CONTEXT
 178 
	br.call.sptk.many b0 = b1
- 
 
 179 
 
111 
    /* 12. skipped (will not disable interrupts) */
 180 
    /* 11. return from handler */
- 
 
 181 
0:
112
182
- 
 
 183 
    /* 12. skipped (will not disable interrupts) */
- 
 
 184 
 
113 
    /* 13. restore general and floating-point registers */
 185 
    /* 13. restore general and floating-point registers */
114 
	/* TODO: restore floating-point context */
 186 
	/* TODO: restore floating-point context */
- 
 
 187 
	mov r1 = loc16
- 
 
 188 
	mov r2 = loc17
- 
 
 189 
	mov r3 = loc18
- 
 
 190 
	mov r4 = loc19
- 
 
 191 
	mov r5 = loc20
- 
 
 192 
	mov r6 = loc21
- 
 
 193 
	mov r7 = loc22
- 
 
 194 
	mov r8 = loc23
- 
 
 195 
	mov r9 = loc24
- 
 
 196 
	mov r10 = loc25
- 
 
 197 
	mov r11 = loc26
- 
 
 198 
	/* skip r12 (stack pointer) */
- 
 
 199 
	mov r13 = loc27
- 
 
 200 
	mov r14 = loc28
- 
 
 201 
	mov r15 = loc29
- 
 
 202 
	mov r16 = loc30
- 
 
 203 
	mov r17 = loc31
- 
 
 204 
	mov r18 = loc32
- 
 
 205 
	mov r19 = loc33
- 
 
 206 
	mov r20 = loc34
- 
 
 207 
	mov r21 = loc35
- 
 
 208 
	mov r22 = loc36
- 
 
 209 
	mov r23 = loc37
- 
 
 210 
	mov r24 = loc38
- 
 
 211 
	mov r25 = loc39
- 
 
 212 
	mov r26 = loc40
- 
 
 213 
	mov r27 = loc41
- 
 
 214 
	mov r28 = loc42
- 
 
 215 
	mov r29 = loc43
- 
 
 216 
	mov r30 = loc44
- 
 
 217 
	mov r31 = loc45
115
218
116 
    /* 14. restore branch and application registers */
 219 
    /* 14. restore branch and application registers */
- 
 
 220 
    	mov ar.unat = loc2
- 
 
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	mov ar.lc = loc3
- 
 
 222 
	mov ar.ec = loc4
- 
 
 223 
	mov ar.ccv = loc5
- 
 
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	mov ar.csd = loc6
- 
 
 225 
	mov ar.ssd = loc7
- 
 
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- 
 
 227 
	mov b0 = loc8
- 
 
 228 
	mov b1 = loc9
- 
 
 229 
	mov b2 = loc10
- 
 
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	mov b3 = loc11
- 
 
 231 
	mov b4 = loc12
- 
 
 232 
	mov b5 = loc13
- 
 
 233 
	mov b6 = loc14
- 
 
 234 
	mov b7 = loc15
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235
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    /* 15. disable PSR.ic and switch to bank 0 */
 236 
    /* 15. disable PSR.ic and switch to bank 0 */
119 
	rsm 0x2000
 237 
	rsm 0x2000
120 
	bsw.0 ;;
 238 
	bsw.0 ;;
121 
	srlz.d
 239 
	srlz.d
- 
 
 240 
 
- 
 
 241 
	mov ar.pfs = loc0
- 
 
 242 
	br.ret.sptk.many rp
122
243 
 
- 
 
 244 
.global heavyweight_handler_finalize
- 
 
 245 
heavyweight_handler_finalize:
123 
    /* 16. RSE switch */
 246 
    /* 16. RSE switch to interrupted context */
124
247
125 
    /* 17. restore interruption state from memory stack */
 248 
    /* 17. restore interruption state from memory stack */
126
249
127 
    /* 18. restore predicate registers from memory stack */
 250 
    /* 18. restore predicate registers from memory stack */
128
251
129 
    /* 19. return from interruption */
 252 
    /* 19. return from interruption */
130 
	rfi
 253 
	rfi
131 
.endm
 - 
 
132 
 
 254 
 
133 
.global restore_interrupted_context
 - 
 
134 
restore_interrupted_context:
 - 
 
135 
	RESTORE_INTERRUPTED_CONTEXT
 - 
 
136 
	/* not reached */
 - 
 
- 
 
 255 
 
- 
 
 256 
 
137 
 
 257 
 
138 
dump_gregs:
 258 
dump_gregs:
139 
mov r16 = REG_DUMP;;
 259 
mov r16 = REG_DUMP;;
140 
st8 [r16] = r0;;
 260 
st8 [r16] = r0;;
141 
add r16 = 8,r16 ;;
 261 
add r16 = 8,r16 ;;