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Rev 1923 Rev 1925
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#define IGNORE_CODE 0x7f        /* all keys up */
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#define IGNORE_CODE 0x7f        /* all keys up */
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static z8530_t z8530;       /**< z8530 device structure. */
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static z8530_t z8530;       /**< z8530 device structure. */
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static irq_t z8530_irq;     /**< z8530's IRQ. */
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static irq_t z8530_irq;     /**< z8530's IRQ. */
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static ipc_notif_cfg_t saved_notif_cfg;
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static void z8530_suspend(chardev_t *);
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static void z8530_suspend(chardev_t *);
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static void z8530_resume(chardev_t *);
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static void z8530_resume(chardev_t *);
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static chardev_operations_t ops = {
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static chardev_operations_t ops = {
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    .suspend = z8530_suspend,
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    .suspend = z8530_suspend,
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};
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};
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/** Initialize keyboard and service interrupts using kernel routine. */
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/** Initialize keyboard and service interrupts using kernel routine. */
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void z8530_grab(void)
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void z8530_grab(void)
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{
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{
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    (void) z8530_read_a(&z8530, RR8);
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    /*
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     * Clear any pending TX interrupts or we never manage
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     * to set FHC UART interrupt state to idle.
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     */
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    z8530_write_a(&z8530, WR0, WR0_TX_IP_RST);
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    z8530_write_a(&z8530, WR1, WR1_IARCSC);     /* interrupt on all characters */
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    /* 8 bits per character and enable receiver */
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    z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
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    z8530_write_a(&z8530, WR9, WR9_MIE);        /* Master Interrupt Enable. */
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    if (z8530_irq.notif_cfg.answerbox) {
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        saved_notif_cfg = z8530_irq.notif_cfg;
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        z8530_irq.notif_cfg.answerbox = NULL;
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        z8530_irq.notif_cfg.code = NULL;
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        z8530_irq.notif_cfg.method = 0;
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        z8530_irq.notif_cfg.counter = 0;
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    }
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}
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}
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/** Resume the former IPC notification behavior. */
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/** Resume the former IPC notification behavior. */
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void z8530_release(void)
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void z8530_release(void)
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{
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{
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    if (saved_notif_cfg.answerbox)
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        z8530_irq.notif_cfg = saved_notif_cfg;
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}
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}
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/** Initialize z8530. */
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/** Initialize z8530. */
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void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr)
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void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr)
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{
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{
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    sysinfo_set_item_val("kbd", NULL, true);
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    sysinfo_set_item_val("kbd", NULL, true);
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    sysinfo_set_item_val("kbd.devno", NULL, devno);
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    sysinfo_set_item_val("kbd.devno", NULL, devno);
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    sysinfo_set_item_val("kbd.inr", NULL, inr);
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    sysinfo_set_item_val("kbd.inr", NULL, inr);
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    sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr);
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    sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr);
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    (void) z8530_read_a(&z8530, RR8);
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    z8530_grab();
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    /*
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     * Clear any pending TX interrupts or we never manage
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     * to set FHC UART interrupt state to idle.
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     */
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    z8530_write_a(&z8530, WR0, WR0_TX_IP_RST);
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    z8530_write_a(&z8530, WR1, WR1_IARCSC);     /* interrupt on all characters */
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    /* 8 bits per character and enable receiver */
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    z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE);
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    z8530_write_a(&z8530, WR9, WR9_MIE);        /* Master Interrupt Enable. */
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}
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}
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/** Process z8530 interrupt.
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/** Process z8530 interrupt.
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 *
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 *
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 * @param n Interrupt vector.
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 * @param n Interrupt vector.