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Rev 1931 | Rev 1932 | ||
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Line 60... | Line 60... | ||
60 | #define IGNORE_CODE 0x7f /* all keys up */ |
60 | #define IGNORE_CODE 0x7f /* all keys up */ |
61 | 61 | ||
62 | static z8530_t z8530; /**< z8530 device structure. */ |
62 | static z8530_t z8530; /**< z8530 device structure. */ |
63 | static irq_t z8530_irq; /**< z8530's IRQ. */ |
63 | static irq_t z8530_irq; /**< z8530's IRQ. */ |
64 | 64 | ||
65 | static ipc_notif_cfg_t saved_notif_cfg; |
- | |
66 | - | ||
67 | static void z8530_suspend(chardev_t *); |
65 | static void z8530_suspend(chardev_t *); |
68 | static void z8530_resume(chardev_t *); |
66 | static void z8530_resume(chardev_t *); |
69 | 67 | ||
70 | static chardev_operations_t ops = { |
68 | static chardev_operations_t ops = { |
71 | .suspend = z8530_suspend, |
69 | .suspend = z8530_suspend, |
Line 89... | Line 87... | ||
89 | /* 8 bits per character and enable receiver */ |
87 | /* 8 bits per character and enable receiver */ |
90 | z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
88 | z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
91 | 89 | ||
92 | z8530_write_a(&z8530, WR9, WR9_MIE); /* Master Interrupt Enable. */ |
90 | z8530_write_a(&z8530, WR9, WR9_MIE); /* Master Interrupt Enable. */ |
93 | 91 | ||
94 | if (z8530_irq.notif_cfg.answerbox) { |
- | |
95 | saved_notif_cfg = z8530_irq.notif_cfg; |
- | |
96 | z8530_irq.notif_cfg.answerbox = NULL; |
- | |
97 | z8530_irq.notif_cfg.code = NULL; |
92 | z8530_irq.notif_cfg.notify = false; |
98 | z8530_irq.notif_cfg.method = 0; |
- | |
99 | z8530_irq.notif_cfg.counter = 0; |
- | |
100 | } |
- | |
101 | } |
93 | } |
102 | 94 | ||
103 | /** Resume the former IPC notification behavior. */ |
95 | /** Resume the former IPC notification behavior. */ |
104 | void z8530_release(void) |
96 | void z8530_release(void) |
105 | { |
97 | { |
106 | if (saved_notif_cfg.answerbox) |
98 | if (z8530_irq.notif_cfg.answerbox) |
107 | z8530_irq.notif_cfg = saved_notif_cfg; |
99 | z8530_irq.notif_cfg.notify = true; |
108 | } |
100 | } |
109 | 101 | ||
110 | /** Initialize z8530. */ |
102 | /** Initialize z8530. */ |
111 | void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr) |
103 | void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr) |
112 | { |
104 | { |
Line 202... | Line 194... | ||
202 | * Since we don't have enough documentation about the FHC |
194 | * Since we don't have enough documentation about the FHC |
203 | * and because the interrupt looks like level sensitive, |
195 | * and because the interrupt looks like level sensitive, |
204 | * we cannot handle it by scheduling one of the level |
196 | * we cannot handle it by scheduling one of the level |
205 | * interrupt traps. Process the interrupt directly. |
197 | * interrupt traps. Process the interrupt directly. |
206 | */ |
198 | */ |
207 | if (irq->notif_cfg.answerbox) |
199 | if (irq->notif_cfg.notify && irq->notif_cfg.answerbox) |
208 | ipc_irq_send_notif(irq); |
200 | ipc_irq_send_notif(irq); |
209 | else |
201 | else |
210 | z8530_interrupt(); |
202 | z8530_interrupt(); |
211 | fhc_clear_interrupt(central_fhc, irq->inr); |
203 | fhc_clear_interrupt(central_fhc, irq->inr); |
212 | } |
204 | } |