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35 | */ |
35 | */ |
36 | 36 | ||
37 | #ifndef KERN_Z8530_H_ |
37 | #ifndef KERN_Z8530_H_ |
38 | #define KERN_Z8530_H_ |
38 | #define KERN_Z8530_H_ |
39 | 39 | ||
40 | #include <console/chardev.h> |
- | |
41 | #include <ipc/irq.h> |
- | |
42 | #include <ddi/irq.h> |
40 | #include <ddi/irq.h> |
- | 41 | #include <arch/types.h> |
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43 | 42 | ||
- | 43 | #define WR0 0 |
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- | 44 | #define WR1 1 |
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- | 45 | #define WR2 2 |
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- | 46 | #define WR3 3 |
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- | 47 | #define WR4 4 |
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- | 48 | #define WR5 5 |
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- | 49 | #define WR6 6 |
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- | 50 | #define WR7 7 |
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- | 51 | #define WR8 8 |
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- | 52 | #define WR9 9 |
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- | 53 | #define WR10 10 |
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- | 54 | #define WR11 11 |
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- | 55 | #define WR12 12 |
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- | 56 | #define WR13 13 |
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- | 57 | #define WR14 14 |
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- | 58 | #define WR15 15 |
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- | 59 | ||
- | 60 | #define RR0 0 |
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- | 61 | #define RR1 1 |
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- | 62 | #define RR2 2 |
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- | 63 | #define RR3 3 |
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- | 64 | #define RR8 8 |
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- | 65 | #define RR10 10 |
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- | 66 | #define RR12 12 |
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- | 67 | #define RR13 13 |
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- | 68 | #define RR14 14 |
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- | 69 | #define RR15 15 |
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- | 70 | ||
- | 71 | /** Reset pending TX interrupt. */ |
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- | 72 | #define WR0_TX_IP_RST (0x5 << 3) |
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- | 73 | #define WR0_ERR_RST (0x6 << 3) |
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- | 74 | ||
- | 75 | /** Receive Interrupts Disabled. */ |
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- | 76 | #define WR1_RID (0x0 << 3) |
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- | 77 | /** Receive Interrupt on First Character or Special Condition. */ |
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- | 78 | #define WR1_RIFCSC (0x1 << 3) |
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- | 79 | /** Interrupt on All Receive Characters or Special Conditions. */ |
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- | 80 | #define WR1_IARCSC (0x2 << 3) |
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- | 81 | /** Receive Interrupt on Special Condition. */ |
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- | 82 | #define WR1_RISC (0x3 << 3) |
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- | 83 | /** Parity Is Special Condition. */ |
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- | 84 | #define WR1_PISC (0x1 << 2) |
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- | 85 | ||
- | 86 | /** Rx Enable. */ |
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- | 87 | #define WR3_RX_ENABLE (0x1 << 0) |
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- | 88 | /** 8-bits per character. */ |
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- | 89 | #define WR3_RX8BITSCH (0x3 << 6) |
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- | 90 | ||
- | 91 | /** Master Interrupt Enable. */ |
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- | 92 | #define WR9_MIE (0x1 << 3) |
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- | 93 | ||
- | 94 | /** Receive Character Available. */ |
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- | 95 | #define RR0_RCA (0x1 << 0) |
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- | 96 | ||
- | 97 | /** z8530's registers. */ |
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- | 98 | struct z8530 { |
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- | 99 | union { |
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- | 100 | ioport8_t ctl_b; |
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- | 101 | ioport8_t status_b; |
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- | 102 | } __attribute__ ((packed)); |
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- | 103 | uint8_t pad1; |
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- | 104 | ioport8_t data_b; |
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- | 105 | uint8_t pad2; |
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- | 106 | union { |
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- | 107 | ioport8_t ctl_a; |
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- | 108 | ioport8_t status_a; |
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- | 109 | } __attribute__ ((packed)); |
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- | 110 | uint8_t pad3; |
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- | 111 | ioport8_t data_a; |
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- | 112 | } __attribute__ ((packed)); |
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44 | extern bool z8530_belongs_to_kernel; |
113 | typedef struct z8530 z8530_t; |
- | 114 | ||
- | 115 | /** Structure representing the z8530 device. */ |
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- | 116 | typedef struct { |
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- | 117 | devno_t devno; |
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- | 118 | irq_t irq; |
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- | 119 | z8530_t *z8530; |
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- | 120 | } z8530_instance_t; |
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45 | 121 | ||
46 | extern void z8530_init(devno_t, uintptr_t, inr_t, cir_t, void *); |
122 | extern bool z8530_init(z8530_t *, devno_t, inr_t, cir_t, void *); |
47 | extern void z8530_poll(void); |
- | |
48 | extern void z8530_grab(void); |
- | |
49 | extern void z8530_release(void); |
- | |
50 | extern void z8530_interrupt(void); |
- | |
51 | extern char z8530_key_read(chardev_t *); |
- | |
52 | extern irq_ownership_t z8530_claim(irq_t *); |
123 | extern irq_ownership_t z8530_claim(irq_t *); |
53 | extern void z8530_irq_handler(irq_t *); |
124 | extern void z8530_irq_handler(irq_t *); |
54 | 125 | ||
55 | #endif |
126 | #endif |
56 | 127 |