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Rev 1975 | Rev 1978 | ||
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Line 42... | Line 42... | ||
42 | .register %g2, #scratch |
42 | .register %g2, #scratch |
43 | .register %g3, #scratch |
43 | .register %g3, #scratch |
44 | 44 | ||
45 | .section K_TEXT_START, "ax" |
45 | .section K_TEXT_START, "ax" |
46 | 46 | ||
- | 47 | #define BSP_FLAG 1 |
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- | 48 | ||
47 | /* |
49 | /* |
48 | * Here is where the kernel is passed control |
50 | * Here is where the kernel is passed control from the boot loader. |
49 | * from the boot loader. |
- | |
50 | * |
51 | * |
51 | * The registers are expected to be in this state: |
52 | * The registers are expected to be in this state: |
- | 53 | * - %o0 starting address of physical memory + bootstrap processor flag |
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- | 54 | * bits 63...1: physical memory starting address / 2 |
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52 | * - %o0 non-zero for the bootstrap processor, zero for application/secondary processors |
55 | * bit 0: non-zero on BSP processor, zero on AP processors |
53 | * - %o1 bootinfo structure address |
56 | * - %o1 bootinfo structure address (BSP only) |
54 | * - %o2 bootinfo structure size |
57 | * - %o2 bootinfo structure size (BSP only) |
55 | * |
58 | * |
56 | * Moreover, we depend on boot having established the |
59 | * Moreover, we depend on boot having established the following environment: |
57 | * following environment: |
- | |
58 | * - TLBs are on |
60 | * - TLBs are on |
59 | * - identity mapping for the kernel image |
61 | * - identity mapping for the kernel image |
60 | */ |
62 | */ |
61 | 63 | ||
62 | .global kernel_image_start |
64 | .global kernel_image_start |
63 | kernel_image_start: |
65 | kernel_image_start: |
64 | mov %o0, %l7 |
66 | mov BSP_FLAG, %l0 |
- | 67 | and %o0, %l0, %l7 ! l7 <= bootstrap processor? |
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- | 68 | andn %o0, %l0, %l6 ! l6 <= start of physical memory |
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- | 69 | ||
- | 70 | sethi %hi(physmem_base), %l5 |
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- | 71 | stx %l6, [%l5 + %lo(physmem_base)] |
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- | 72 | ||
- | 73 | /* |
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- | 74 | * Get bits 40:13 of physmem_base. |
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- | 75 | */ |
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- | 76 | sethi %hi(mask_40_13), %l4 |
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- | 77 | sethi %hi(physmem_base_40_13), %l3 |
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- | 78 | ldx [%l4 + %lo(mask_40_13)], %l4 |
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- | 79 | and %l6, %l4, %l5 ! l5 <= physmem_base[40:13] |
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- | 80 | stx %l5, [%l3 + %lo(physmem_base_40_13)] |
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65 | 81 | ||
66 | /* |
82 | /* |
- | 83 | * Prepare kernel 8K TLB data template. |
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- | 84 | */ |
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- | 85 | sethi %hi(kernel_8k_tlb_data_template), %l4 |
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- | 86 | ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3 |
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- | 87 | or %l3, %l5, %l3 |
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- | 88 | stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)] |
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- | 89 | ||
- | 90 | /* |
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67 | * Setup basic runtime environment. |
91 | * Setup basic runtime environment. |
68 | */ |
92 | */ |
69 | 93 | ||
70 | wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows |
94 | wrpr %g0, NWINDOWS - 2, %cansave ! set maximum saveable windows |
71 | wrpr %g0, 0, %canrestore ! get rid of windows we will never need again |
95 | wrpr %g0, 0, %canrestore ! get rid of windows we will never need again |
Line 113... | Line 137... | ||
113 | stxa %g1, [VA_DMMU_TAG_ACCESS] %asi |
137 | stxa %g1, [VA_DMMU_TAG_ACCESS] %asi |
114 | membar #Sync |
138 | membar #Sync |
115 | 139 | ||
116 | #define SET_TLB_DATA(r1, r2, imm) \ |
140 | #define SET_TLB_DATA(r1, r2, imm) \ |
117 | set TTE_CV | TTE_CP | TTE_P | LMA | imm, %r1; \ |
141 | set TTE_CV | TTE_CP | TTE_P | LMA | imm, %r1; \ |
- | 142 | or %r1, %l5, %r1; \ |
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118 | set PAGESIZE_4M, %r2; \ |
143 | mov PAGESIZE_4M, %r2; \ |
119 | sllx %r2, TTE_SIZE_SHIFT, %r2; \ |
144 | sllx %r2, TTE_SIZE_SHIFT, %r2; \ |
120 | or %r1, %r2, %r1; \ |
145 | or %r1, %r2, %r1; \ |
121 | mov 1, %r2; \ |
146 | mov 1, %r2; \ |
122 | sllx %r2, TTE_V_SHIFT, %r2; \ |
147 | sllx %r2, TTE_V_SHIFT, %r2; \ |
123 | or %r1, %r2, %r1; |
148 | or %r1, %r2, %r1; |
Line 300... | Line 325... | ||
300 | */ |
325 | */ |
301 | 326 | ||
302 | #define INITIAL_STACK_SIZE 1024 |
327 | #define INITIAL_STACK_SIZE 1024 |
303 | 328 | ||
304 | .align STACK_ALIGNMENT |
329 | .align STACK_ALIGNMENT |
305 | .space INITIAL_STACK_SIZE |
330 | .space INITIAL_STACK_SIZE |
306 | .align STACK_ALIGNMENT |
331 | .align STACK_ALIGNMENT |
307 | temporary_boot_stack: |
332 | temporary_boot_stack: |
308 | .space STACK_WINDOW_SAVE_AREA_SIZE |
333 | .space STACK_WINDOW_SAVE_AREA_SIZE |
- | 334 | ||
- | 335 | ||
- | 336 | .data |
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- | 337 | ||
- | 338 | .align 8 |
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- | 339 | .global physmem_base ! copy of the physical memory base address |
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- | 340 | physmem_base: |
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- | 341 | .quad 0 |
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- | 342 | ||
- | 343 | .global physmem_base_40_13 |
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- | 344 | physmem_base_40_13: ! physmem_base & mask_40_13 |
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- | 345 | .quad 0 |
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- | 346 | ||
- | 347 | .global mask_40_13 |
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- | 348 | mask_40_13: ! constant with bits 40:13 set |
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- | 349 | .quad (((1 << 41) - 1) & ~((1 << 13) - 1)) |
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- | 350 | ||
- | 351 | /* |
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- | 352 | * This variable is used by the fast_data_MMU_miss trap handler. |
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- | 353 | * It is initialized to reflect the starting address of physical |
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- | 354 | * memory. |
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- | 355 | */ |
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- | 356 | .global kernel_8k_tlb_data_template |
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- | 357 | kernel_8k_tlb_data_template: |
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- | 358 | .quad ((1 << TTE_V_SHIFT) | TTE_CV | TTE_CP | TTE_P | TTE_W) |
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- | 359 |