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Rev 1868 | Rev 1880 | ||
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Line 74... | Line 74... | ||
74 | * Copy the bootinfo structure passed from the boot loader |
74 | * Copy the bootinfo structure passed from the boot loader |
75 | * to the kernel bootinfo structure. |
75 | * to the kernel bootinfo structure. |
76 | */ |
76 | */ |
77 | mov %o1, %o2 |
77 | mov %o1, %o2 |
78 | mov %o0, %o1 |
78 | mov %o0, %o1 |
79 | set bootinfo, %o0 |
79 | sethi %hi(bootinfo), %o0 |
80 | call memcpy |
80 | call memcpy |
81 | nop |
81 | or %o0, %lo(bootinfo), %o0 |
82 | 82 | ||
83 | /* |
83 | /* |
84 | * Switch to kernel trap table. |
84 | * Switch to kernel trap table. |
85 | */ |
85 | */ |
86 | set trap_table, %g1 |
86 | sethi %hi(trap_table), %g1 |
87 | wrpr %g1, 0, %tba |
87 | wrpr %g1, %lo(trap_table), %tba |
88 | 88 | ||
89 | /* |
89 | /* |
90 | * Take over the DMMU by installing global locked |
90 | * Take over the DMMU by installing global locked |
91 | * TTE entry identically mapping the first 4M |
91 | * TTE entry identically mapping the first 4M |
92 | * of memory. |
92 | * of memory. |
Line 118... | Line 118... | ||
118 | #define SET_TLB_DATA(r1, r2, imm) \ |
118 | #define SET_TLB_DATA(r1, r2, imm) \ |
119 | set TTE_L | TTE_CP | TTE_P | TTE_W | LMA | imm, %r1; \ |
119 | set TTE_L | TTE_CP | TTE_P | TTE_W | LMA | imm, %r1; \ |
120 | set PAGESIZE_4M, %r2; \ |
120 | set PAGESIZE_4M, %r2; \ |
121 | sllx %r2, TTE_SIZE_SHIFT, %r2; \ |
121 | sllx %r2, TTE_SIZE_SHIFT, %r2; \ |
122 | or %r1, %r2, %r1; \ |
122 | or %r1, %r2, %r1; \ |
123 | set 1, %r2; \ |
123 | mov 1, %r2; \ |
124 | sllx %r2, TTE_V_SHIFT, %r2; \ |
124 | sllx %r2, TTE_V_SHIFT, %r2; \ |
125 | or %r1, %r2, %r1; |
125 | or %r1, %r2, %r1; |
126 | 126 | ||
127 | ! write DTLB data and install the kernel mapping |
127 | ! write DTLB data and install the kernel mapping |
128 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
128 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
Line 170... | Line 170... | ||
170 | 170 | ||
171 | set kernel_image_start, %g5 |
171 | set kernel_image_start, %g5 |
172 | 172 | ||
173 | ! write ITLB tag of context 1 |
173 | ! write ITLB tag of context 1 |
174 | SET_TLB_TAG(g1, MEM_CONTEXT_TEMP) |
174 | SET_TLB_TAG(g1, MEM_CONTEXT_TEMP) |
175 | set VA_DMMU_TAG_ACCESS, %g2 |
175 | mov VA_DMMU_TAG_ACCESS, %g2 |
176 | stxa %g1, [%g2] ASI_IMMU |
176 | stxa %g1, [%g2] ASI_IMMU |
177 | flush %g5 |
177 | flush %g5 |
178 | 178 | ||
179 | ! write ITLB data and install the temporary mapping in context 1 |
179 | ! write ITLB data and install the temporary mapping in context 1 |
180 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
180 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
181 | stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG |
181 | stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG |
182 | flush %g5 |
182 | flush %g5 |
183 | 183 | ||
184 | ! switch to context 1 |
184 | ! switch to context 1 |
185 | set MEM_CONTEXT_TEMP, %g1 |
185 | mov MEM_CONTEXT_TEMP, %g1 |
186 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
186 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
187 | flush %g5 |
187 | flush %g5 |
188 | 188 | ||
189 | ! demap context 0 |
189 | ! demap context 0 |
190 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS) |
190 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS) |
191 | stxa %g0, [%g1] ASI_IMMU_DEMAP |
191 | stxa %g0, [%g1] ASI_IMMU_DEMAP |
192 | flush %g5 |
192 | flush %g5 |
193 | 193 | ||
194 | ! write ITLB tag of context 0 |
194 | ! write ITLB tag of context 0 |
195 | SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL) |
195 | SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL) |
196 | set VA_DMMU_TAG_ACCESS, %g2 |
196 | mov VA_DMMU_TAG_ACCESS, %g2 |
197 | stxa %g1, [%g2] ASI_IMMU |
197 | stxa %g1, [%g2] ASI_IMMU |
198 | flush %g5 |
198 | flush %g5 |
199 | 199 | ||
200 | ! write ITLB data and install the permanent kernel mapping in context 0 |
200 | ! write ITLB data and install the permanent kernel mapping in context 0 |
201 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
201 | SET_TLB_DATA(g1, g2, 0) ! use non-global mapping |
Line 208... | Line 208... | ||
208 | 208 | ||
209 | ! ensure nucleus mapping |
209 | ! ensure nucleus mapping |
210 | wrpr %g0, 1, %tl |
210 | wrpr %g0, 1, %tl |
211 | 211 | ||
212 | ! set context 1 in the primary context register |
212 | ! set context 1 in the primary context register |
213 | set MEM_CONTEXT_TEMP, %g1 |
213 | mov MEM_CONTEXT_TEMP, %g1 |
214 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
214 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi ! ASI_DMMU is correct here !!! |
215 | flush %g5 |
215 | flush %g5 |
216 | 216 | ||
217 | ! demap context 1 |
217 | ! demap context 1 |
218 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY) |
218 | SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY) |