Rev 1792 | Rev 1823 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 1792 | Rev 1822 | ||
---|---|---|---|
Line 94... | Line 94... | ||
94 | /** Take over TLB and trap table. |
94 | /** Take over TLB and trap table. |
95 | * |
95 | * |
96 | * Initialize ITLB and DTLB and switch to kernel |
96 | * Initialize ITLB and DTLB and switch to kernel |
97 | * trap table. |
97 | * trap table. |
98 | * |
98 | * |
99 | * The goal of this function is to disable MMU |
99 | * First, demap context 0 and install the |
100 | * so that both TLBs can be purged and new |
- | |
101 | * kernel 4M locked entry can be installed. |
100 | * global 4M locked kernel mapping. |
102 | * After TLB is initialized, MMU is enabled |
- | |
103 | * again. |
- | |
104 | * |
101 | * |
- | 102 | * Second, prepare a temporary IMMU mapping in |
|
105 | * Switching MMU off imposes the requirement for |
103 | * context 1, switch to it, demap context 0, |
- | 104 | * install the global 4M locked kernel mapping |
|
106 | * the kernel to run in identity mapped environment. |
105 | * in context 0 and switch back to context 0. |
107 | * |
106 | * |
108 | * @param base Base address that will be hardwired in both TLBs. |
107 | * @param base Base address that will be hardwired in both TLBs. |
109 | */ |
108 | */ |
110 | void take_over_tlb_and_tt(uintptr_t base) |
109 | void take_over_tlb_and_tt(uintptr_t base) |
111 | { |
110 | { |
112 | tlb_tag_access_reg_t tag; |
111 | tlb_tag_access_reg_t tag; |
113 | tlb_data_t data; |
112 | tlb_data_t data; |
114 | frame_address_t fr; |
113 | frame_address_t fr; |
115 | page_address_t pg; |
114 | page_address_t pg; |
116 | 115 | ||
- | 116 | /* |
|
- | 117 | * Switch to the kernel trap table. |
|
- | 118 | */ |
|
- | 119 | trap_switch_trap_table(); |
|
- | 120 | ||
117 | fr.address = base; |
121 | fr.address = base; |
118 | pg.address = base; |
122 | pg.address = base; |
119 | 123 | ||
120 | immu_disable(); |
- | |
121 | dmmu_disable(); |
- | |
122 | - | ||
123 | /* |
- | |
124 | * Demap everything, especially OpenFirmware. |
- | |
125 | */ |
- | |
126 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
- | |
127 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
- | |
128 | - | ||
129 | /* |
124 | /* |
130 | * We do identity mapping of 4M-page at 4M. |
125 | * We do identity mapping of 4M-page at 4M. |
131 | */ |
126 | */ |
132 | tag.value = ASID_KERNEL; |
127 | tag.value = 0; |
- | 128 | tag.context = 0; |
|
133 | tag.vpn = pg.vpn; |
129 | tag.vpn = pg.vpn; |
134 | 130 | ||
135 | itlb_tag_access_write(tag.value); |
- | |
136 | dtlb_tag_access_write(tag.value); |
- | |
137 | - | ||
138 | data.value = 0; |
131 | data.value = 0; |
139 | data.v = true; |
132 | data.v = true; |
140 | data.size = PAGESIZE_4M; |
133 | data.size = PAGESIZE_4M; |
141 | data.pfn = fr.pfn; |
134 | data.pfn = fr.pfn; |
142 | data.l = true; |
135 | data.l = true; |
143 | data.cp = 1; |
136 | data.cp = 1; |
144 | data.cv = 1; |
137 | data.cv = 0; |
145 | data.p = true; |
138 | data.p = true; |
146 | data.w = true; |
139 | data.w = true; |
147 | data.g = true; |
140 | data.g = true; |
148 | 141 | ||
- | 142 | /* |
|
- | 143 | * Straightforwardly demap DMUU context 0, |
|
- | 144 | * and replace it with the locked kernel mapping. |
|
- | 145 | */ |
|
- | 146 | dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
|
149 | itlb_data_in_write(data.value); |
147 | dtlb_tag_access_write(tag.value); |
150 | dtlb_data_in_write(data.value); |
148 | dtlb_data_in_write(data.value); |
151 | 149 | ||
152 | /* |
150 | /* |
153 | * Register window traps can occur before MMU is enabled again. |
- | |
154 | * This ensures that any such traps will be handled from |
151 | * Install kernel code mapping in context 1 |
155 | * kernel identity mapped trap handler. |
152 | * and switch to it. |
156 | */ |
153 | */ |
- | 154 | tag.context = 1; |
|
- | 155 | data.g = false; |
|
- | 156 | itlb_tag_access_write(tag.value); |
|
- | 157 | itlb_data_in_write(data.value); |
|
157 | trap_switch_trap_table(); |
158 | mmu_primary_context_write(1); |
158 | 159 | ||
- | 160 | /* |
|
159 | tlb_invalidate_all(); |
161 | * Demap old context 0. |
- | 162 | */ |
|
- | 163 | itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0); |
|
160 | 164 | ||
- | 165 | /* |
|
- | 166 | * Install the locked kernel mapping in context 0 |
|
- | 167 | * and switch to it. |
|
- | 168 | */ |
|
161 | dmmu_enable(); |
169 | tag.context = 0; |
162 | immu_enable(); |
170 | data.g = true; |
- | 171 | itlb_tag_access_write(tag.value); |
|
- | 172 | itlb_data_in_write(data.value); |
|
- | 173 | mmu_primary_context_write(0); |
|
163 | } |
174 | } |
164 | 175 | ||
165 | /** @} |
176 | /** @} |
166 | */ |
177 | */ |