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     * this treatment.
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     * this treatment.
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     *
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     *
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     * Note that branch-delay slots are used in order to save space.
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     * Note that branch-delay slots are used in order to save space.
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     */
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     */
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0:
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0:
-
 
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    sethi %hi(fast_data_access_mmu_miss_data_hi), %g7
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    mov VA_DMMU_TAG_ACCESS, %g1
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    wr %g0, ASI_DMMU, %asi
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    ldxa [%g1] ASI_DMMU, %g1            ! read the faulting Context and VPN
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    ldxa [VA_DMMU_TAG_ACCESS] %asi, %g1     ! read the faulting Context and VPN
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    set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
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    set TLB_TAG_ACCESS_CONTEXT_MASK, %g2
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    andcc %g1, %g2, %g3             ! get Context
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    andcc %g1, %g2, %g3             ! get Context
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    bnz 0f                      ! Context is non-zero
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    bnz %xcc, 0f                    ! Context is non-zero
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    andncc %g1, %g2, %g3                ! get page address into %g3
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    andncc %g1, %g2, %g3                ! get page address into %g3
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    bz 0f                       ! page address is zero
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    bz  %xcc, 0f                    ! page address is zero
-
 
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    ldx [%g7 + %lo(end_of_identity)], %g4
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    cmp %g3, %g4
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    bgeu %xcc, 0f
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    sethi %hi(kernel_8k_tlb_data_template), %g2
-
 
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    ldx [%g2 + %lo(kernel_8k_tlb_data_template)], %g2
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    ldx [%g7 + %lo(kernel_8k_tlb_data_template)], %g2
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    or %g3, %g2, %g2
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    or %g3, %g2, %g2
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    stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG        ! identity map the kernel page
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    stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG        ! identity map the kernel page
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    retry
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    retry
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    /*
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    /*
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    /*
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    /*
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     * Read the Tag Access register for the higher-level handler.
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     * Read the Tag Access register for the higher-level handler.
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     * This is necessary to survive nested DTLB misses.
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     * This is necessary to survive nested DTLB misses.
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     */
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     */
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    mov VA_DMMU_TAG_ACCESS, %g2
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    ldxa [VA_DMMU_TAG_ACCESS] %asi, %g2
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    ldxa [%g2] ASI_DMMU, %g2
-
 
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    /*
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    /*
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     * g2 will be passed as an argument to fast_data_access_mmu_miss().
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     * g2 will be passed as an argument to fast_data_access_mmu_miss().
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     */
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     */
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    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
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    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss