WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/include/mm/tlb.h



 
#define TLB_DEMAP_CONTEXT_SHIFT 4
 
/* TLB Tag Access shifts */
#define TLB_TAG_ACCESS_CONTEXT_SHIFT    0
#define TLB_TAG_ACCESS_CONTEXT_MASK ((1<<13)-1)
#define TLB_TAG_ACCESS_VPN_SHIFT    13
 
#ifndef __ASM__
 
#include <arch/mm/tte.h>

/** I-/D-TLB Tag Read Register. */
union tlb_tag_read_reg {
    uint64_t value;
    struct {
        uint64_t vpn : 51;      /**< Virtual Address bits 63:13. */
        unsigned context : 13;      /**< Context identifier. */
    } __attribute__ ((packed));
};
typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
 
 
/** TLB Demap Operation Address. */
union tlb_demap_addr {
    uint64_t value;
    struct {
        uint64_t vpn: 51;   /**< Virtual Address bits 63:13. */
        unsigned : 6;       /**< Ignored. */
        unsigned type : 1;  /**< The type of demap operation. */
        unsigned context : 2;   /**< Context register selection. */
        unsigned : 4;       /**< Zero. */
    } __attribute__ ((packed));

 
/** TLB Synchronous Fault Status Register. */
union tlb_sfsr_reg {
    uint64_t value;
    struct {
        unsigned long : 40; /**< Implementation dependent. */
 
        unsigned asi : 8;   /**< ASI. */
 
        unsigned : 2;
        unsigned ft : 7;    /**< Fault type. */
        unsigned e : 1;     /**< Side-effect bit. */
        unsigned ct : 2;    /**< Context Register selection. */
        unsigned pr : 1;    /**< Privilege bit. */
        unsigned w : 1;     /**< Write bit. */

   
    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */
    membar();
}
 
extern void fast_instruction_access_mmu_miss(int n, istate_t *istate);
extern void fast_data_access_mmu_miss(int n, istate_t *istate);
extern void fast_data_access_protection(int n, istate_t *istate);
 
extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
 
#endif /* !def __ASM__ */
 

Rev 1823	Rev 1851
Line 64...	Line 64...
64		64
65	#define TLB_DEMAP_CONTEXT_SHIFT 4	65	#define TLB_DEMAP_CONTEXT_SHIFT 4
66		66
67	/* TLB Tag Access shifts */	67	/* TLB Tag Access shifts */
68	#define TLB_TAG_ACCESS_CONTEXT_SHIFT 0	68	#define TLB_TAG_ACCESS_CONTEXT_SHIFT 0
-		69	#define TLB_TAG_ACCESS_CONTEXT_MASK ((1<<13)-1)
69	#define TLB_TAG_ACCESS_VPN_SHIFT 13	70	#define TLB_TAG_ACCESS_VPN_SHIFT 13
70		71
71	#ifndef __ASM__	72	#ifndef __ASM__
72		73
73	#include <arch/mm/tte.h>	74	#include <arch/mm/tte.h>
Line 105...	Line 106...
105	/** I-/D-TLB Tag Read Register. */	106	/** I-/D-TLB Tag Read Register. */
106	union tlb_tag_read_reg {	107	union tlb_tag_read_reg {
107	uint64_t value;	108	uint64_t value;
108	struct {	109	struct {
109	uint64_t vpn : 51; /*< Virtual Address bits 63:13. /	110	uint64_t vpn : 51; /*< Virtual Address bits 63:13. /
110	unsigned context : 13; /*< Context identifier. /	111	unsigned context : 13; /*< Context identifier. /
111	} __attribute__ ((packed));	112	} __attribute__ ((packed));
112	};	113	};
113	typedef union tlb_tag_read_reg tlb_tag_read_reg_t;	114	typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
114	typedef union tlb_tag_read_reg tlb_tag_access_reg_t;	115	typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
115		116
116		117
117	/** TLB Demap Operation Address. */	118	/** TLB Demap Operation Address. */
118	union tlb_demap_addr {	119	union tlb_demap_addr {
119	uint64_t value;	120	uint64_t value;
120	struct {	121	struct {
121	uint64_t vpn: 51; /*< Virtual Address bits 63:13. /	122	uint64_t vpn: 51; /*< Virtual Address bits 63:13. /
122	unsigned : 6; /*< Ignored. /	123	unsigned : 6; /*< Ignored. /
123	unsigned type : 1; /*< The type of demap operation. /	124	unsigned type : 1; /*< The type of demap operation. /
124	unsigned context : 2; /*< Context register selection. /	125	unsigned context : 2; /*< Context register selection. /
125	unsigned : 4; /*< Zero. /	126	unsigned : 4; /*< Zero. /
126	} __attribute__ ((packed));	127	} __attribute__ ((packed));
Line 129...	Line 130...
129		130
130	/** TLB Synchronous Fault Status Register. */	131	/** TLB Synchronous Fault Status Register. */
131	union tlb_sfsr_reg {	132	union tlb_sfsr_reg {
132	uint64_t value;	133	uint64_t value;
133	struct {	134	struct {
134	unsigned long : 39; /*< Implementation dependent. /	135	unsigned long : 40; /*< Implementation dependent. /
135	unsigned nf : 1; /*< Nonfaulting load. /	-
136	unsigned asi : 8; /*< ASI. /	136	unsigned asi : 8; /*< ASI. /
137	unsigned tm : 1; /*< TLB miss. /	-
138	unsigned : 1;	137	unsigned : 2;
139	unsigned ft : 7; /*< Fault type. /	138	unsigned ft : 7; /*< Fault type. /
140	unsigned e : 1; /*< Side-effect bit. /	139	unsigned e : 1; /*< Side-effect bit. /
141	unsigned ct : 2; /*< Context Register selection. /	140	unsigned ct : 2; /*< Context Register selection. /
142	unsigned pr : 1; /*< Privilege bit. /	141	unsigned pr : 1; /*< Privilege bit. /
143	unsigned w : 1; /*< Write bit. /	142	unsigned w : 1; /*< Write bit. /
Line 423...	Line 422...
423		422
424	asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */	423	asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */
425	membar();	424	membar();
426	}	425	}
427		426
428	extern void fast_instruction_access_mmu_miss(void);	427	extern void fast_instruction_access_mmu_miss(int n, istate_t *istate);
429	extern void fast_data_access_mmu_miss(void);	428	extern void fast_data_access_mmu_miss(int n, istate_t *istate);
430	extern void fast_data_access_protection(void);	429	extern void fast_data_access_protection(int n, istate_t *istate);
431		430
432	extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);	431	extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
433		432
434	#endif /* !def __ASM__ */	433	#endif /* !def __ASM__ */
435		434

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/sparc64/include/mm/tlb.h @ 4750 – Rev 1823 → 1851