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#ifndef KERN_mips32_CP0_H_
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#ifndef KERN_mips32_CP0_H_
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#define KERN_mips32_CP0_H_
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#define KERN_mips32_CP0_H_
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#include <arch/types.h>
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#include <arch/types.h>
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#include <arch/mm/tlb.h>
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#define cp0_status_ie_enabled_bit   (1<<0)
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#define cp0_status_ie_enabled_bit   (1 << 0)
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#define cp0_status_exl_exception_bit    (1<<1)
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#define cp0_status_exl_exception_bit    (1 << 1)
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#define cp0_status_erl_error_bit    (1<<2)
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#define cp0_status_erl_error_bit    (1 << 2)
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#define cp0_status_um_bit           (1<<4)
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#define cp0_status_um_bit           (1 << 4)
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#define cp0_status_bev_bootstrap_bit    (1<<22)
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#define cp0_status_bev_bootstrap_bit    (1 << 22)
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#define cp0_status_fpu_bit              (1<<29)
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#define cp0_status_fpu_bit              (1 << 29)
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#define cp0_status_im_shift     8
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#define cp0_status_im_shift     8
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#define cp0_status_im_mask              0xff00
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#define cp0_status_im_mask              0xff00
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#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f)
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#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f)
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 */
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 */
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#define cp0_compare_value       100000
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#define cp0_compare_value       100000
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#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask))
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#define cp0_mask_all_int() cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask))
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#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask)
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#define cp0_unmask_all_int() cp0_status_write(cp0_status_read() | cp0_status_im_mask)
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#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1<<(cp0_status_im_shift+(it))))
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#define cp0_mask_int(it) cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it))))
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#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1<<(cp0_status_im_shift+(it))))
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#define cp0_unmask_int(it) cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it))))
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#define GEN_READ_CP0(nm,reg) static inline uint32_t cp0_ ##nm##_read(void) \
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#define GEN_READ_CP0(nm,reg) static inline uint32_t cp0_ ##nm##_read(void) \
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  { \
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  { \
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      uint32_t retval; \
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      uint32_t retval; \
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      asm("mfc0 %0, $" #reg : "=r"(retval)); \
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      asm("mfc0 %0, $" #reg : "=r"(retval)); \