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#include <arch/types.h>
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#include <arch/types.h>
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#define atomic_inc(x)   (a_add(x,1))
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#define atomic_inc(x)   (a_add(x,1))
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#define atomic_dec(x)   (a_sub(x,1))
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#define atomic_dec(x)   (a_sub(x,1))
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#define atomic_inc_pre(x) (a_add(x,1)-1)
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#define atomic_dec_pre(x) (a_sub(x,1)+1)
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#define atomic_inc_post(x) (a_add(x,1))
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#define atomic_dec_post(x) (a_sub(x,1))
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typedef volatile __u32 atomic_t;
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typedef volatile __u32 atomic_t;
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/*
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/*
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 * Atomic addition
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 * Atomic addition
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 *
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 *
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 * This case is harder, and we have to use the special LL and SC operations
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 * This case is harder, and we have to use the special LL and SC operations
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 * to achieve atomicity. The instructions are similar to LW (load) and SW
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 * to achieve atomicity. The instructions are similar to LW (load) and SW
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 * (store), except that the LL (load-linked) instruction loads the address
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 * (store), except that the LL (load-linked) instruction loads the address
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 * of the variable to a special register and if another process writes to
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 * of the variable to a special register and if another process writes to
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 * the same location, the SC (store-conditional) instruction fails.
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 * the same location, the SC (store-conditional) instruction fails.
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 Returns (*val)+i
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 */
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 */
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static inline atomic_t a_add(atomic_t *val, int i)
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static inline atomic_t a_add(atomic_t *val, int i)
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{
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{
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    atomic_t tmp, tmp2;
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    atomic_t tmp, tmp2;
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/*
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/*
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 * Atomic subtraction
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 * Atomic subtraction
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 *
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 *
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 * Implemented in the same manner as a_add, except we substract the value.
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 * Implemented in the same manner as a_add, except we substract the value.
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 Returns (*val)-i
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 */
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 */
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static inline atomic_t a_sub(atomic_t *val, int i)
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static inline atomic_t a_sub(atomic_t *val, int i)
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{
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{
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    atomic_t tmp, tmp2;
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    atomic_t tmp, tmp2;