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heavyweight_handler_inner:
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heavyweight_handler_inner:
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	/*
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	/*
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	 * From this point, the rest of the interrupted context
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	 * From this point, the rest of the interrupted context
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	 * will be preserved in stacked registers and backing store.
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	 * will be preserved in stacked registers and backing store.
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	 */
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	 */
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	alloc loc0 = ar.pfs, 0, 47, 2, 0 ;;
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	alloc loc0 = ar.pfs, 0, 48, 2, 0 ;;
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	/* bank 0 is going to be shadowed, copy essential data from there */
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	/* bank 0 is going to be shadowed, copy essential data from there */
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	mov loc1 = R_RET	/* b0 belonging to interrupted context */
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	mov loc1 = R_RET	/* b0 belonging to interrupted context */
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	mov loc2 = R_HANDLER
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	mov loc2 = R_HANDLER
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	mov out0 = R_OFFS
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	mov out0 = R_OFFS
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	mov loc42 = r27
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	mov loc42 = r27
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	mov loc43 = r28
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	mov loc43 = r28
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	mov loc44 = r29
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	mov loc44 = r29
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	mov loc45 = r30
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	mov loc45 = r30
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	mov loc46 = r31
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	mov loc46 = r31
- 
 
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- 
 
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	/*preserve Floating point status register*/
- 
 
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	mov loc47 = ar.fpsr
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    /* 9. skipped (will not enable interrupts) */
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    /* 9. skipped (will not enable interrupts) */
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	/*
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	/*
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    	 * ssm PSR_I_MASK
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    	 * ssm PSR_I_MASK
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	 * ;;
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	 * ;;
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	mov r28 = loc43
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	mov r28 = loc43
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	mov r29 = loc44
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	mov r29 = loc44
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	mov r30 = loc45
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	mov r30 = loc45
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	mov r31 = loc46
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	mov r31 = loc46
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- 
 
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- 
 
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	/*restore Floating point status register*/
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	mov ar.fpsr = loc47
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    /* 14. restore branch and application registers */
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    /* 14. restore branch and application registers */
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    	mov ar.unat = loc3
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    	mov ar.unat = loc3
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	mov ar.lc = loc4
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	mov ar.lc = loc4
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	mov ar.ec = loc5
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	mov ar.ec = loc5
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	mov ar.ccv = loc6
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	mov ar.ccv = loc6