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Line 48... Line 48...
48 
 * from userspace and floating-point context).
 48 
 * from userspace and floating-point context).
49 
 *
 49 
 *
50 
 * @param offs Offset from the beginning of IVT.
 50 
 * @param offs Offset from the beginning of IVT.
51 
 * @param handler Interrupt handler address.
 51 
 * @param handler Interrupt handler address.
52 
 */
 52 
 */
53 
.macro HEAVYWEIGHT_HANDLER offs handler
 53 
.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
54 
    .org IVT + \offs
 54 
    .org ivt + \offs
- 
 
 55 
	mov r24 = \offs
- 
 
 56 
	movl r25 = \handler ;;
- 
 
 57 
	mov ar.k0 = r24
- 
 
 58 
	mov ar.k1 = r25
- 
 
 59 
	br heavyweight_handler
- 
 
 60 
.endm
55 
 
 61 
 
- 
 
 62 
.global heavyweight_handler
- 
 
 63 
heavyweight_handler:
56 
    /* 1. copy interrupt registers into bank 0 */
 64 
    /* 1. copy interrupt registers into bank 0 */
57 
	mov r24 = cr.iip
 65 
	mov r24 = cr.iip
58 
	mov r25 = cr.ipsr
 66 
	mov r25 = cr.ipsr
59 
	mov r26 = cr.iipa
 67 
	mov r26 = cr.iipa
60 
	mov r27 = cr.isr
 68 
	mov r27 = cr.isr
Line 65... Line 73...
65
73
66 
    /* 3. switch to kernel memory stack */
 74 
    /* 3. switch to kernel memory stack */
67 
	/* TODO: support interruptions from userspace */
 75 
	/* TODO: support interruptions from userspace */
68 
	/* assume kernel stack */
 76 
	/* assume kernel stack */
69
77
70 
    /* 4. save registers in bank 0 into memory stack */
 - 
 
71 
	add r31 = -8, r12 ;;
 78 
	add r31 = -8, r12 ;;
72 
	add r12 = -STACK_FRAME_SIZE, r12 ;;
 79 
	add r12 = -STACK_FRAME_SIZE, r12
73
80 
 
- 
 
 81 
    /* 4. save registers in bank 0 into memory stack */
74 
	st8 [r31] = r29, -8 ;;	/* save predicate registers */
 82 
	st8 [r31] = r29, -8 ;;	/* save predicate registers */
75 
 
 83 
 
76 
	st8 [r31] = r24, -8 ;;	/* save cr.iip */
 84 
	st8 [r31] = r24, -8 ;;	/* save cr.iip */
77 
	st8 [r31] = r25, -8 ;;	/* save cr.ipsr */
 85 
	st8 [r31] = r25, -8 ;;	/* save cr.ipsr */
78 
	st8 [r31] = r26, -8 ;;	/* save cr.iipa */
 86 
	st8 [r31] = r26, -8 ;;	/* save cr.iipa */
79 
	st8 [r31] = r27, -8 ;;	/* save cr.isr */
 87 
	st8 [r31] = r27, -8 ;;	/* save cr.isr */
80 
	st8 [r31] = r28, -8 ;;	/* save cr.ifa */
88 
	st8 [r31] = r28, -8	/* save cr.ifa */
81 
 
 89 
 
82 
    /* 5. RSE switch from interrupted context */
 90 
    /* 5. RSE switch from interrupted context */
83 
    	.auto
 - 
 
84 
	mov r24 = ar.rsc
 91 
	mov r24 = ar.rsc
85 
	mov r25 = ar.pfs
 92 
	mov r25 = ar.pfs
86 
	cover
 93 
	cover
87 
	mov r26 = cr.ifs
 94 
	mov r26 = cr.ifs
88
95
89 
	st8 [r31] = r24, -8	/* save ar.rsc */
 96 
	st8 [r31] = r24, -8;;	/* save ar.rsc */
90 
	st8 [r31] = r25, -8	/* save ar.pfs */
 97 
	st8 [r31] = r25, -8;;	/* save ar.pfs */
91 
	st8 [r31] = r26, -8	/* save ar.ifs */
 98 
	st8 [r31] = r26, -8	/* save ar.ifs */
92
99
93 
	and r30 = ~3, r24
 100 
	and r30 = ~3, r24 ;;
94 
	mov ar.rsc = r30	/* place RSE in enforced lazy mode */
 101 
	mov ar.rsc = r30 ;;	/* place RSE in enforced lazy mode */
95
102
96 
	mov r27 = ar.rnat
 103 
	mov r27 = ar.rnat
97 
	mov r28 = ar.bspstore
 104 
	mov r28 = ar.bspstore ;;
98
105
99 
	/* assume kernel backing store */
 106 
	/* assume kernel backing store */
100 
	mov ar.bspstore = r28
 107 
	mov ar.bspstore = r28 ;;
101
108
102 
	mov r29 = ar.bsp
 109 
	mov r29 = ar.bsp
103
110
104 
	st8 [r31] = r27, -8	/* save ar.rnat */
 111 
	st8 [r31] = r27, -8 ;;	/* save ar.rnat */
105 
	st8 [r31] = r28, -8	/* save ar.bspstore */
 112 
	st8 [r31] = r28, -8 ;;	/* save ar.bspstore */
106 
	st8 [r31] = r29, -8	/* save ar.bsp */
 113 
	st8 [r31] = r29, -8	/* save ar.bsp */
107
114
108 
	mov ar.rsc = r24	/* restore RSE's setting */
 115 
	mov ar.rsc = r24	/* restore RSE's setting */
109 
	.explicit
 - 
 
110
116
111 
    /* the rest of the save-handler can be kept outside IVT */
 117 
    /* steps 6 - 15 are done by heavyweight_handler_inner() */
112 
 
 - 
 
- 
 
 118 
	mov r24 = b0 		/* save b0 belonging to interrupted context */
113 
	movl r24 = \handler
 119 
	mov r26 = ar.k0
114 
	mov r25 = b0
 120 
	mov r25 = ar.k1
115 
	br.call.sptk.many rp = heavyweight_handler_inner
 121 
	br.call.sptk.many rp = heavyweight_handler_inner
116 
0:	mov b0 = r25
122 
0:	mov b0 = r24		/* restore b0 belonging to the interrupted context */
117 
 
 123 
 
- 
 
 124 
    /* 16. RSE switch to interrupted context */
- 
 
 125 
	cover			/* allocate zerro size frame (step 1 (from Intel Docs)) */
- 
 
 126 
 
- 
 
 127 
	add r31 = STACK_SCRATCH_AREA_SIZE, r12 ;;
- 
 
 128 
 
- 
 
 129 
	mov r28 = ar.bspstore   	/* calculate loadrs (step 2) */
- 
 
 130 
	ld8 r29 = [r31], +8 ;;		/* load ar.bsp */
- 
 
 131 
	sub r27 = r29 , r28 ;;
- 
 
 132 
	shl r27 = r27, 16
- 
 
 133 
 
- 
 
 134 
	mov r24 = ar.rsc ;;
- 
 
 135 
	and r30 = ~3, r24 ;;
- 
 
 136 
	or  r24 = r30 , r27 ;;
- 
 
 137 
	mov ar.rsc = r24 ;;		/* place RSE in enforced lazy mode */
- 
 
 138 
 
- 
 
 139 
	loadrs 				/* (step 3) */
- 
 
 140 
 
- 
 
 141 
	ld8 r28 = [r31], +8 ;;    	/* load ar.bspstore */
- 
 
 142 
	ld8 r27 = [r31], +8 ;;		/* load ar.rnat */
- 
 
 143 
	ld8 r26 = [r31], +8 ;;		/* load cr.ifs */
- 
 
 144 
	ld8 r25 = [r31], +8 ;;		/* load ar.pfs */
- 
 
 145 
	ld8 r24 = [r31], +8 ;;		/* load ar.rsc */
- 
 
 146 
 
- 
 
 147 
	mov ar.bspstore = r28 ;;	/* (step 4) */
- 
 
 148 
	mov ar.rnat = r27		/* (step 5) */
- 
 
 149 
 
118 
	br heavyweight_handler_finalize
 150 
	mov ar.pfs = r25		/* (step 6) */
- 
 
 151 
	mov cr.ifs = r26
- 
 
 152 
 
- 
 
 153 
	mov ar.rsc = r24		/* (step 7) */
- 
 
 154 
 
- 
 
 155 
    /* 17. restore interruption state from memory stack */
- 
 
 156 
	ld8 r28 = [r31], +8 ;;	/* load cr.ifa */
- 
 
 157 
	ld8 r27 = [r31], +8 ;;	/* load cr.isr */
- 
 
 158 
	ld8 r26 = [r31], +8 ;;	/* load cr.iipa */
- 
 
 159 
	ld8 r25 = [r31], +8 ;;	/* load cr.ipsr */
- 
 
 160 
	ld8 r24 = [r31], +8 ;;	/* load cr.iip */
- 
 
 161 
 
- 
 
 162 
	mov cr.iip = r24
- 
 
 163 
	mov cr.ipsr = r25
- 
 
 164 
	mov cr.iipa = r26
- 
 
 165 
	mov cr.isr = r27
- 
 
 166 
	mov cr.ifa = r28
- 
 
 167 
 
- 
 
 168 
    /* 18. restore predicate registers from memory stack */
- 
 
 169 
	ld8 r29 = [r31] , -8 ;;	/* load predicate registers */
- 
 
 170 
	mov pr = r29
- 
 
 171
- 
 
 172 
    /* 19. return from interruption */
- 
 
 173 
    	add r12 = STACK_FRAME_SIZE, r12
119 
.endm
 174 
	rfi ;;
120 
 
 175 
 
121 
.global heavyweight_handler_inner
 176 
.global heavyweight_handler_inner
122 
heavyweight_handler_inner:
 177 
heavyweight_handler_inner:
123 
	/*
 178 
	/*
124 
	 * From this point, the rest of the interrupted context
 179 
	 * From this point, the rest of the interrupted context
125 
	 * will be preserved in stacked registers and backing store.
 180 
	 * will be preserved in stacked registers and backing store.
126 
	 */
 181 
	 */
127 
	alloc loc0 = ar.pfs, 0, 46, 0, 0 ;;
 182 
	alloc loc0 = ar.pfs, 0, 47, 2, 0 ;;
- 
 
 183
- 
 
 184 
	/* bank 0 is going to be shadowed, copy essential data from there */
- 
 
 185 
	mov loc1 = r24	/* b0 belonging to interrupted context */
- 
 
 186 
	mov loc2 = r25
- 
 
 187 
	mov out0 = r26
128
188
129 
	/* copy handler address (r24 from bank 0 will be invisible soon) */
 189 
	add out1 = STACK_SCRATCH_AREA_SIZE, r12
130 
	mov loc1 = r24
 - 
 
131 
 
 190 
 
132 
    /* 6. switch to bank 1 and reenable PSR.ic */
 191 
    /* 6. switch to bank 1 and reenable PSR.ic */
133 
	ssm 0x2000
 192 
	ssm 0x2000
134 
	bsw.1 ;;
 193 
	bsw.1 ;;
135 
	srlz.d
 194 
	srlz.d
136
195
137 
    /* 7. preserve branch and application registers */
 196 
    /* 7. preserve branch and application registers */
138 
    	mov loc2 = ar.unat
 197 
    	mov loc3 = ar.unat
139 
	mov loc3 = ar.lc
 198 
	mov loc4 = ar.lc
140 
	mov loc4 = ar.ec
 199 
	mov loc5 = ar.ec
141 
	mov loc5 = ar.ccv
 200 
	mov loc6 = ar.ccv
142 
	mov loc6 = ar.csd
 201 
	mov loc7 = ar.csd
143 
	mov loc7 = ar.ssd
 202 
	mov loc8 = ar.ssd
144
203
145 
	mov loc8 = b0
 204 
	mov loc9 = b0
146 
	mov loc9 = b1
 205 
	mov loc10 = b1
147 
	mov loc10 = b2
 206 
	mov loc11 = b2
148 
	mov loc11 = b3
 207 
	mov loc12 = b3
149 
	mov loc12 = b4
 208 
	mov loc13 = b4
150 
	mov loc13 = b5
 209 
	mov loc14 = b5
151 
	mov loc14 = b6
 210 
	mov loc15 = b6
152 
	mov loc15 = b7
 211 
	mov loc16 = b7
153
212
154 
    /* 8. preserve general and floating-point registers */
 213 
    /* 8. preserve general and floating-point registers */
155 
	/* TODO: save floating-point context */
 214 
	/* TODO: save floating-point context */
156 
	mov loc16 = r1
 215 
	mov loc17 = r1
157 
	mov loc17 = r2
 216 
	mov loc18 = r2
158 
	mov loc18 = r3
 217 
	mov loc19 = r3
159 
	mov loc19 = r4
 218 
	mov loc20 = r4
160 
	mov loc20 = r5
 219 
	mov loc21 = r5
161 
	mov loc21 = r6
 220 
	mov loc22 = r6
162 
	mov loc22 = r7
 221 
	mov loc23 = r7
163 
	mov loc23 = r8
 222 
	mov loc24 = r8
164 
	mov loc24 = r9
 223 
	mov loc25 = r9
165 
	mov loc25 = r10
 224 
	mov loc26 = r10
166 
	mov loc26 = r11
 225 
	mov loc27 = r11
167 
	/* skip r12 (stack pointer) */
 226 
	/* skip r12 (stack pointer) */
168 
	mov loc27 = r13
 227 
	mov loc28 = r13
169 
	mov loc28 = r14
 228 
	mov loc29 = r14
170 
	mov loc29 = r15
 229 
	mov loc30 = r15
171 
	mov loc30 = r16
 230 
	mov loc31 = r16
172 
	mov loc31 = r17
 231 
	mov loc32 = r17
173 
	mov loc32 = r18
 232 
	mov loc33 = r18
174 
	mov loc33 = r19
 233 
	mov loc34 = r19
175 
	mov loc34 = r20
 234 
	mov loc35 = r20
176 
	mov loc35 = r21
 235 
	mov loc36 = r21
177 
	mov loc36 = r22
 236 
	mov loc37 = r22
178 
	mov loc37 = r23
 237 
	mov loc38 = r23
179 
	mov loc38 = r24
 238 
	mov loc39 = r24
180 
	mov loc39 = r25
 239 
	mov loc40 = r25
181 
	mov loc40 = r26
 240 
	mov loc41 = r26
182 
	mov loc41 = r27
 241 
	mov loc42 = r27
183 
	mov loc42 = r28
 242 
	mov loc43 = r28
184 
	mov loc43 = r29
 243 
	mov loc44 = r29
185 
	mov loc44 = r30
 244 
	mov loc45 = r30
186 
	mov loc45 = r31
 245 
	mov loc46 = r31
187
246
188 
    /* 9. skipped (will not enable interrupts) */
 247 
    /* 9. skipped (will not enable interrupts) */
189 
 
 248 
 
190 
    /* 10. call handler */
 249 
    /* 10. call handler */
191 
    	mov b1 = loc1
 250 
    	mov b1 = loc2
192 
	br.call.sptk.many b0 = b1
 251 
	br.call.sptk.many b0 = b1
193 
 
 252 
 
194 
    /* 11. return from handler */
 253 
    /* 11. return from handler */
195 
0:
 254 
0:
196
255
197 
    /* 12. skipped (will not disable interrupts) */
 256 
    /* 12. skipped (will not disable interrupts) */
198 
 
 257 
 
199 
    /* 13. restore general and floating-point registers */
 258 
    /* 13. restore general and floating-point registers */
200 
	/* TODO: restore floating-point context */
 259 
	/* TODO: restore floating-point context */
201 
	mov r1 = loc16
 260 
	mov r1 = loc17
202 
	mov r2 = loc17
 261 
	mov r2 = loc18
203 
	mov r3 = loc18
 262 
	mov r3 = loc19
204 
	mov r4 = loc19
 263 
	mov r4 = loc20
205 
	mov r5 = loc20
 264 
	mov r5 = loc21
206 
	mov r6 = loc21
 265 
	mov r6 = loc22
207 
	mov r7 = loc22
 266 
	mov r7 = loc23
208 
	mov r8 = loc23
 267 
	mov r8 = loc24
209 
	mov r9 = loc24
 268 
	mov r9 = loc25
210 
	mov r10 = loc25
 269 
	mov r10 = loc26
211 
	mov r11 = loc26
 270 
	mov r11 = loc27
212 
	/* skip r12 (stack pointer) */
 271 
	/* skip r12 (stack pointer) */
213 
	mov r13 = loc27
 272 
	mov r13 = loc28
214 
	mov r14 = loc28
 273 
	mov r14 = loc29
215 
	mov r15 = loc29
 274 
	mov r15 = loc30
216 
	mov r16 = loc30
 275 
	mov r16 = loc31
217 
	mov r17 = loc31
 276 
	mov r17 = loc32
218 
	mov r18 = loc32
 277 
	mov r18 = loc33
219 
	mov r19 = loc33
 278 
	mov r19 = loc34
220 
	mov r20 = loc34
 279 
	mov r20 = loc35
221 
	mov r21 = loc35
 280 
	mov r21 = loc36
222 
	mov r22 = loc36
 281 
	mov r22 = loc37
223 
	mov r23 = loc37
 282 
	mov r23 = loc38
224 
	mov r24 = loc38
 283 
	mov r24 = loc39
225 
	mov r25 = loc39
 284 
	mov r25 = loc40
226 
	mov r26 = loc40
 285 
	mov r26 = loc41
227 
	mov r27 = loc41
 286 
	mov r27 = loc42
228 
	mov r28 = loc42
 287 
	mov r28 = loc43
229 
	mov r29 = loc43
 288 
	mov r29 = loc44
230 
	mov r30 = loc44
 289 
	mov r30 = loc45
231 
	mov r31 = loc45
 290 
	mov r31 = loc46
232
291
233 
    /* 14. restore branch and application registers */
 292 
    /* 14. restore branch and application registers */
234 
    	mov ar.unat = loc2
 293 
    	mov ar.unat = loc3
235 
	mov ar.lc = loc3
 294 
	mov ar.lc = loc4
236 
	mov ar.ec = loc4
 295 
	mov ar.ec = loc5
237 
	mov ar.ccv = loc5
 296 
	mov ar.ccv = loc6
238 
	mov ar.csd = loc6
 297 
	mov ar.csd = loc7
239 
	mov ar.ssd = loc7
 298 
	mov ar.ssd = loc8
240
299
241 
	mov b0 = loc8
 300 
	mov b0 = loc9
242 
	mov b1 = loc9
 301 
	mov b1 = loc10
243 
	mov b2 = loc10
 302 
	mov b2 = loc11
244 
	mov b3 = loc11
 303 
	mov b3 = loc12
245 
	mov b4 = loc12
 304 
	mov b4 = loc13
246 
	mov b5 = loc13
 305 
	mov b5 = loc14
247 
	mov b6 = loc14
 306 
	mov b6 = loc15
248 
	mov b7 = loc15
 307 
	mov b7 = loc16
249
308
250 
    /* 15. disable PSR.ic and switch to bank 0 */
 309 
    /* 15. disable PSR.ic and switch to bank 0 */
251 
	rsm 0x2000
 310 
	rsm 0x2000
252 
	bsw.0 ;;
 311 
	bsw.0 ;;
253 
	srlz.d
 312 
	srlz.d
254 
 
 313 
 
- 
 
 314 
	mov r24 = loc1
255 
	mov ar.pfs = loc0
 315 
	mov ar.pfs = loc0
256 
	br.ret.sptk.many rp
 316 
	br.ret.sptk.many b0
257 
 
 - 
 
258 
.global heavyweight_handler_finalize
 - 
 
259 
heavyweight_handler_finalize:
 - 
 
260 
    /* 16. RSE switch to interrupted context */
 - 
 
261 
	.auto
 - 
 
262 
	cover			/* allocate zerro size frame (step 1 (from Intel Docs)) */
 - 
 
263 
 
 - 
 
264 
	add r31 = STACK_SCRATCH_AREA_SIZE, r12
 - 
 
265 
 
 - 
 
266 
	mov r28 = ar.bspstore   /* calculate loadrs (step 2) */
 - 
 
267 
	ld8 r29 = [r31], +8     /* load ar.bsp */
 - 
 
268 
	sub r27 = r29 , r28
 - 
 
269 
	shl r27 = r27, 16
 - 
 
270 
 
 - 
 
271 
	mov r24 = ar.rsc
 - 
 
272 
	and r30 = ~3, r24
 - 
 
273 
	or  r24 = r30 , r27
- 
 
274 
	mov ar.rsc = r24	/* place RSE in enforced lazy mode */
 - 
 
275 
 
 - 
 
276 
	loadrs 			/* (step 3) */
 - 
 
277 
 
 - 
 
278 
	ld8 r28 = [r31], +8     /* load ar.bspstore */
 - 
 
279 
	ld8 r27 = [r31], +8 	/* load ar.rnat */
 - 
 
280 
	ld8 r26 = [r31], +8 	/* load cr.ifs */
 - 
 
281 
	ld8 r25 = [r31], +8 	/* load ar.pfs */
 - 
 
282 
	ld8 r24 = [r31], +8 	/* load ar.rsc */
 - 
 
283 
 
 - 
 
284 
	mov ar.bspstore = r28	/* (step 4) */
 - 
 
285 
	mov ar.rnat = r27	/* (step 5) */
 - 
 
286 
 
 - 
 
287 
	mov ar.pfs = r25	/* (step 6) */
 - 
 
288 
	mov cr.ifs = r26
- 
 
289 
 
 - 
 
290 
	mov ar.rsc = r24	/* (step 7) */
 - 
 
291 
	.explicit
- 
 
292 
 
 - 
 
293 
    /* 17. restore interruption state from memory stack */
 - 
 
294 
	ld8 r28 = [r31], +8 ;;	/* load cr.ifa */
- 
 
295 
	ld8 r27 = [r31], +8 ;;	/* load cr.isr */
 - 
 
296 
	ld8 r26 = [r31], +8 ;;	/* load cr.iipa */
 - 
 
297 
	ld8 r25 = [r31], +8 ;;	/* load cr.ipsr */
 - 
 
298 
	ld8 r24 = [r31], +8 ;;	/* load cr.iip */
 - 
 
299 
 
 - 
 
300 
	mov cr.iip = r24
 - 
 
301 
	mov cr.ipsr = r25
 - 
 
302 
	mov cr.iipa = r26
 - 
 
303 
	mov cr.isr = r27
 - 
 
304 
	mov cr.ifa = r28
 - 
 
305 
 
 - 
 
306 
    /* 18. restore predicate registers from memory stack */
 - 
 
307 
	ld8 r29 = [r31] , -8 ;;	/* load predicate registers */
 - 
 
308 
	mov pr = r29
 - 
 
309
- 
 
310 
    /* 19. return from interruption */
 - 
 
311 
    	add r12 = STACK_FRAME_SIZE, r12
 - 
 
312 
	rfi ;;
 - 
 
313 
 
 - 
 
314 
dump_gregs:
 - 
 
315 
mov r16 = REG_DUMP;;
 - 
 
316 
st8 [r16] = r0;;
 - 
 
317 
add r16 = 8,r16 ;;
 - 
 
318 
st8 [r16] = r1;;
 - 
 
319 
add r16 = 8,r16 ;;
 - 
 
320 
st8 [r16] = r2;;
 - 
 
321 
add r16 = 8,r16 ;;
 - 
 
322 
st8 [r16] = r3;;
 - 
 
323 
add r16 = 8,r16 ;;
 - 
 
324 
st8 [r16] = r4;;
 - 
 
325 
add r16 = 8,r16 ;;
 - 
 
326 
st8 [r16] = r5;;
 - 
 
327 
add r16 = 8,r16 ;;
 - 
 
328 
st8 [r16] = r6;;
 - 
 
329 
add r16 = 8,r16 ;;
 - 
 
330 
st8 [r16] = r7;;
 - 
 
331 
add r16 = 8,r16 ;;
 - 
 
332 
st8 [r16] = r8;;
 - 
 
333 
add r16 = 8,r16 ;;
 - 
 
334 
st8 [r16] = r9;;
 - 
 
335 
add r16 = 8,r16 ;;
 - 
 
336 
st8 [r16] = r10;;
 - 
 
337 
add r16 = 8,r16 ;;
 - 
 
338 
st8 [r16] = r11;;
 - 
 
339 
add r16 = 8,r16 ;;
 - 
 
340 
st8 [r16] = r12;;
 - 
 
341 
add r16 = 8,r16 ;;
 - 
 
342 
st8 [r16] = r13;;
 - 
 
343 
add r16 = 8,r16 ;;
 - 
 
344 
st8 [r16] = r14;;
 - 
 
345 
add r16 = 8,r16 ;;
 - 
 
346 
st8 [r16] = r15;;
 - 
 
347 
add r16 = 8,r16 ;;
 - 
 
348 
 
 - 
 
349 
bsw.1;;
 - 
 
350 
mov r15 = r16;;
 - 
 
351 
bsw.0;;
 - 
 
352 
st8 [r16] = r15;;
 - 
 
353 
add r16 = 8,r16 ;;
 - 
 
354 
bsw.1;;
 - 
 
355 
mov r15 = r17;;
 - 
 
356 
bsw.0;;
 - 
 
357 
st8 [r16] = r15;;
 - 
 
358 
add r16 = 8,r16 ;;
 - 
 
359 
bsw.1;;
 - 
 
360 
mov r15 = r18;;
 - 
 
361 
bsw.0;;
 - 
 
362 
st8 [r16] = r15;;
 - 
 
363 
add r16 = 8,r16 ;;
 - 
 
364 
bsw.1;;
 - 
 
365 
mov r15 = r19;;
 - 
 
366 
bsw.0;;
 - 
 
367 
st8 [r16] = r15;;
 - 
 
368 
add r16 = 8,r16 ;;
 - 
 
369 
bsw.1;;
 - 
 
370 
mov r15 = r20;;
 - 
 
371 
bsw.0;;
 - 
 
372 
st8 [r16] = r15;;
 - 
 
373 
add r16 = 8,r16 ;;
 - 
 
374 
bsw.1;;
 - 
 
375 
mov r15 = r21;;
 - 
 
376 
bsw.0;;
 - 
 
377 
st8 [r16] = r15;;
 - 
 
378 
add r16 = 8,r16 ;;
 - 
 
379 
bsw.1;;
 - 
 
380 
mov r15 = r22;;
 - 
 
381 
bsw.0;;
 - 
 
382 
st8 [r16] = r15;;
 - 
 
383 
add r16 = 8,r16 ;;
 - 
 
384 
bsw.1;;
 - 
 
385 
mov r15 = r23;;
 - 
 
386 
bsw.0;;
 - 
 
387 
st8 [r16] = r15;;
 - 
 
388 
add r16 = 8,r16 ;;
 - 
 
389 
bsw.1;;
 - 
 
390 
mov r15 = r24;;
 - 
 
391 
bsw.0;;
 - 
 
392 
st8 [r16] = r15;;
 - 
 
393 
add r16 = 8,r16 ;;
 - 
 
394 
bsw.1;;
 - 
 
395 
mov r15 = r25;;
 - 
 
396 
bsw.0;;
 - 
 
397 
st8 [r16] = r15;;
 - 
 
398 
add r16 = 8,r16 ;;
 - 
 
399 
bsw.1;;
 - 
 
400 
mov r15 = r26;;
 - 
 
401 
bsw.0;;
 - 
 
402 
st8 [r16] = r15;;
 - 
 
403 
add r16 = 8,r16 ;;
 - 
 
404 
bsw.1;;
 - 
 
405 
mov r15 = r27;;
 - 
 
406 
bsw.0;;
 - 
 
407 
st8 [r16] = r15;;
 - 
 
408 
add r16 = 8,r16 ;;
 - 
 
409 
bsw.1;;
 - 
 
410 
mov r15 = r28;;
 - 
 
411 
bsw.0;;
 - 
 
412 
st8 [r16] = r15;;
 - 
 
413 
add r16 = 8,r16 ;;
 - 
 
414 
bsw.1;;
 - 
 
415 
mov r15 = r29;;
 - 
 
416 
bsw.0;;
 - 
 
417 
st8 [r16] = r15;;
 - 
 
418 
add r16 = 8,r16 ;;
 - 
 
419 
bsw.1;;
 - 
 
420 
mov r15 = r30;;
 - 
 
421 
bsw.0;;
 - 
 
422 
st8 [r16] = r15;;
 - 
 
423 
add r16 = 8,r16 ;;
 - 
 
424 
bsw.1;;
 - 
 
425 
mov r15 = r31;;
 - 
 
426 
bsw.0;;
 - 
 
427 
st8 [r16] = r15;;
 - 
 
428 
add r16 = 8,r16 ;;
 - 
 
429 
 
 - 
 
430 
 
 - 
 
431 
st8 [r16] = r32;;
 - 
 
432 
add r16 = 8,r16 ;;
 - 
 
433 
st8 [r16] = r33;;
 - 
 
434 
add r16 = 8,r16 ;;
 - 
 
435 
st8 [r16] = r34;;
 - 
 
436 
add r16 = 8,r16 ;;
 - 
 
437 
st8 [r16] = r35;;
 - 
 
438 
add r16 = 8,r16 ;;
 - 
 
439 
st8 [r16] = r36;;
 - 
 
440 
add r16 = 8,r16 ;;
 - 
 
441 
st8 [r16] = r37;;
 - 
 
442 
add r16 = 8,r16 ;;
 - 
 
443 
st8 [r16] = r38;;
 - 
 
444 
add r16 = 8,r16 ;;
 - 
 
445 
st8 [r16] = r39;;
 - 
 
446 
add r16 = 8,r16 ;;
 - 
 
447 
st8 [r16] = r40;;
 - 
 
448 
add r16 = 8,r16 ;;
 - 
 
449 
st8 [r16] = r41;;
 - 
 
450 
add r16 = 8,r16 ;;
 - 
 
451 
st8 [r16] = r42;;
 - 
 
452 
add r16 = 8,r16 ;;
 - 
 
453 
st8 [r16] = r43;;
 - 
 
454 
add r16 = 8,r16 ;;
 - 
 
455 
st8 [r16] = r44;;
 - 
 
456 
add r16 = 8,r16 ;;
 - 
 
457 
st8 [r16] = r45;;
 - 
 
458 
add r16 = 8,r16 ;;
 - 
 
459 
st8 [r16] = r46;;
 - 
 
460 
add r16 = 8,r16 ;;
 - 
 
461 
st8 [r16] = r47;;
 - 
 
462 
add r16 = 8,r16 ;;
 - 
 
463 
st8 [r16] = r48;;
 - 
 
464 
add r16 = 8,r16 ;;
 - 
 
465 
st8 [r16] = r49;;
 - 
 
466 
add r16 = 8,r16 ;;
 - 
 
467 
st8 [r16] = r50;;
 - 
 
468 
add r16 = 8,r16 ;;
 - 
 
469 
st8 [r16] = r51;;
 - 
 
470 
add r16 = 8,r16 ;;
 - 
 
471 
st8 [r16] = r52;;
 - 
 
472 
add r16 = 8,r16 ;;
 - 
 
473 
st8 [r16] = r53;;
 - 
 
474 
add r16 = 8,r16 ;;
 - 
 
475 
st8 [r16] = r54;;
 - 
 
476 
add r16 = 8,r16 ;;
 - 
 
477 
st8 [r16] = r55;;
 - 
 
478 
add r16 = 8,r16 ;;
 - 
 
479 
st8 [r16] = r56;;
 - 
 
480 
add r16 = 8,r16 ;;
 - 
 
481 
st8 [r16] = r57;;
 - 
 
482 
add r16 = 8,r16 ;;
 - 
 
483 
st8 [r16] = r58;;
 - 
 
484 
add r16 = 8,r16 ;;
 - 
 
485 
st8 [r16] = r59;;
 - 
 
486 
add r16 = 8,r16 ;;
 - 
 
487 
st8 [r16] = r60;;
 - 
 
488 
add r16 = 8,r16 ;;
 - 
 
489 
st8 [r16] = r61;;
 - 
 
490 
add r16 = 8,r16 ;;
 - 
 
491 
st8 [r16] = r62;;
 - 
 
492 
add r16 = 8,r16 ;;
 - 
 
493 
st8 [r16] = r63;;
 - 
 
494 
add r16 = 8,r16 ;;
 - 
 
495 
 
 - 
 
496 
 
 - 
 
497 
 
 - 
 
498 
st8 [r16] = r64;;
 - 
 
499 
add r16 = 8,r16 ;;
 - 
 
500 
st8 [r16] = r65;;
 - 
 
501 
add r16 = 8,r16 ;;
 - 
 
502 
st8 [r16] = r66;;
 - 
 
503 
add r16 = 8,r16 ;;
 - 
 
504 
st8 [r16] = r67;;
 - 
 
505 
add r16 = 8,r16 ;;
 - 
 
506 
st8 [r16] = r68;;
 - 
 
507 
add r16 = 8,r16 ;;
 - 
 
508 
st8 [r16] = r69;;
 - 
 
509 
add r16 = 8,r16 ;;
 - 
 
510 
st8 [r16] = r70;;
 - 
 
511 
add r16 = 8,r16 ;;
 - 
 
512 
st8 [r16] = r71;;
 - 
 
513 
add r16 = 8,r16 ;;
 - 
 
514 
st8 [r16] = r72;;
 - 
 
515 
add r16 = 8,r16 ;;
 - 
 
516 
st8 [r16] = r73;;
 - 
 
517 
add r16 = 8,r16 ;;
 - 
 
518 
st8 [r16] = r74;;
 - 
 
519 
add r16 = 8,r16 ;;
 - 
 
520 
st8 [r16] = r75;;
 - 
 
521 
add r16 = 8,r16 ;;
 - 
 
522 
st8 [r16] = r76;;
 - 
 
523 
add r16 = 8,r16 ;;
 - 
 
524 
st8 [r16] = r77;;
 - 
 
525 
add r16 = 8,r16 ;;
 - 
 
526 
st8 [r16] = r78;;
 - 
 
527 
add r16 = 8,r16 ;;
 - 
 
528 
st8 [r16] = r79;;
 - 
 
529 
add r16 = 8,r16 ;;
 - 
 
530 
st8 [r16] = r80;;
 - 
 
531 
add r16 = 8,r16 ;;
 - 
 
532 
st8 [r16] = r81;;
 - 
 
533 
add r16 = 8,r16 ;;
 - 
 
534 
st8 [r16] = r82;;
 - 
 
535 
add r16 = 8,r16 ;;
 - 
 
536 
st8 [r16] = r83;;
 - 
 
537 
add r16 = 8,r16 ;;
 - 
 
538 
st8 [r16] = r84;;
 - 
 
539 
add r16 = 8,r16 ;;
 - 
 
540 
st8 [r16] = r85;;
 - 
 
541 
add r16 = 8,r16 ;;
 - 
 
542 
st8 [r16] = r86;;
 - 
 
543 
add r16 = 8,r16 ;;
 - 
 
544 
st8 [r16] = r87;;
 - 
 
545 
add r16 = 8,r16 ;;
 - 
 
546 
st8 [r16] = r88;;
 - 
 
547 
add r16 = 8,r16 ;;
 - 
 
548 
st8 [r16] = r89;;
 - 
 
549 
add r16 = 8,r16 ;;
 - 
 
550 
st8 [r16] = r90;;
 - 
 
551 
add r16 = 8,r16 ;;
 - 
 
552 
st8 [r16] = r91;;
 - 
 
553 
add r16 = 8,r16 ;;
 - 
 
554 
st8 [r16] = r92;;
 - 
 
555 
add r16 = 8,r16 ;;
 - 
 
556 
st8 [r16] = r93;;
 - 
 
557 
add r16 = 8,r16 ;;
 - 
 
558 
st8 [r16] = r94;;
 - 
 
559 
add r16 = 8,r16 ;;
 - 
 
560 
st8 [r16] = r95;;
 - 
 
561 
add r16 = 8,r16 ;;
 - 
 
562 
 
 - 
 
563 
 
 - 
 
564 
 
 - 
 
565 
st8 [r16] = r96;;
 - 
 
566 
add r16 = 8,r16 ;;
 - 
 
567 
st8 [r16] = r97;;
 - 
 
568 
add r16 = 8,r16 ;;
 - 
 
569 
st8 [r16] = r98;;
 - 
 
570 
add r16 = 8,r16 ;;
 - 
 
571 
st8 [r16] = r99;;
 - 
 
572 
add r16 = 8,r16 ;;
 - 
 
573 
st8 [r16] = r100;;
 - 
 
574 
add r16 = 8,r16 ;;
 - 
 
575 
st8 [r16] = r101;;
 - 
 
576 
add r16 = 8,r16 ;;
 - 
 
577 
st8 [r16] = r102;;
 - 
 
578 
add r16 = 8,r16 ;;
 - 
 
579 
st8 [r16] = r103;;
 - 
 
580 
add r16 = 8,r16 ;;
 - 
 
581 
st8 [r16] = r104;;
 - 
 
582 
add r16 = 8,r16 ;;
 - 
 
583 
st8 [r16] = r105;;
 - 
 
584 
add r16 = 8,r16 ;;
 - 
 
585 
st8 [r16] = r106;;
 - 
 
586 
add r16 = 8,r16 ;;
 - 
 
587 
st8 [r16] = r107;;
 - 
 
588 
add r16 = 8,r16 ;;
 - 
 
589 
st8 [r16] = r108;;
 - 
 
590 
add r16 = 8,r16 ;;
 - 
 
591 
st8 [r16] = r109;;
 - 
 
592 
add r16 = 8,r16 ;;
 - 
 
593 
st8 [r16] = r110;;
 - 
 
594 
add r16 = 8,r16 ;;
 - 
 
595 
st8 [r16] = r111;;
 - 
 
596 
add r16 = 8,r16 ;;
 - 
 
597 
st8 [r16] = r112;;
 - 
 
598 
add r16 = 8,r16 ;;
 - 
 
599 
st8 [r16] = r113;;
 - 
 
600 
add r16 = 8,r16 ;;
 - 
 
601 
st8 [r16] = r114;;
 - 
 
602 
add r16 = 8,r16 ;;
 - 
 
603 
st8 [r16] = r115;;
 - 
 
604 
add r16 = 8,r16 ;;
 - 
 
605 
st8 [r16] = r116;;
 - 
 
606 
add r16 = 8,r16 ;;
 - 
 
607 
st8 [r16] = r117;;
 - 
 
608 
add r16 = 8,r16 ;;
 - 
 
609 
st8 [r16] = r118;;
 - 
 
610 
add r16 = 8,r16 ;;
 - 
 
611 
st8 [r16] = r119;;
 - 
 
612 
add r16 = 8,r16 ;;
 - 
 
613 
st8 [r16] = r120;;
 - 
 
614 
add r16 = 8,r16 ;;
 - 
 
615 
st8 [r16] = r121;;
 - 
 
616 
add r16 = 8,r16 ;;
 - 
 
617 
st8 [r16] = r122;;
 - 
 
618 
add r16 = 8,r16 ;;
 - 
 
619 
st8 [r16] = r123;;
 - 
 
620 
add r16 = 8,r16 ;;
 - 
 
621 
st8 [r16] = r124;;
 - 
 
622 
add r16 = 8,r16 ;;
 - 
 
623 
st8 [r16] = r125;;
 - 
 
624 
add r16 = 8,r16 ;;
 - 
 
625 
st8 [r16] = r126;;
 - 
 
626 
add r16 = 8,r16 ;;
 - 
 
627 
st8 [r16] = r127;;
 - 
 
628 
add r16 = 8,r16 ;;
 - 
 
629 
 
 - 
 
630 
 
 - 
 
631 
 
 - 
 
632 
br.ret.sptk.many b0;;
 - 
 
633 
 
 - 
 
634 
 
 - 
 
635 
 
 - 
 
636 
 
 - 
 
637 
 
 - 
 
638 
.macro Handler o h
 - 
 
639 
.org IVT + \o
 - 
 
640 
br \h;;
 - 
 
641 
.endm
 - 
 
642 
 
 - 
 
643 
.macro Handler2 o
- 
 
644 
.org IVT + \o
 - 
 
645 
br.call.sptk.many b0 = dump_gregs;;
 - 
 
646 
mov r16 = \o ;;
 - 
 
647 
bsw.1;;
 - 
 
648 
br universal_handler;;
 - 
 
649 
.endm
 - 
 
650 
 
 - 
 
651 
 
 - 
 
652 
 
 - 
 
653 
.global IVT
 - 
 
654 
.align 32768
 - 
 
655 
IVT:
 - 
 
656 
 
 - 
 
657 
 
 - 
 
658 
Handler2 0x0000
 - 
 
659 
Handler2 0x0400
 - 
 
660 
Handler2 0x0800
 - 
 
661 
Handler2 0x0c00
 - 
 
662 
Handler2 0x1000
 - 
 
663 
Handler2 0x1400
 - 
 
664 
Handler2 0x1800
 - 
 
665 
Handler2 0x1c00
 - 
 
666 
Handler2 0x2000
 - 
 
667 
Handler2 0x2400
 - 
 
668 
Handler2 0x2800
 - 
 
669 
Handler 0x2c00 break_instruction
 - 
 
670 
HEAVYWEIGHT_HANDLER 0x3000 external_interrupt	/* For external interrupt, heavyweight handler is used. */
 - 
 
671 
Handler2 0x3400
 - 
 
672 
Handler2 0x3800
 - 
 
673 
Handler2 0x3c00
 - 
 
674 
Handler2 0x4000
 - 
 
675 
Handler2 0x4400
 - 
 
676 
Handler2 0x4800
 - 
 
677 
Handler2 0x4c00
 - 
 
678 
 
 - 
 
679 
Handler2 0x5000
 - 
 
680 
Handler2 0x5100
 - 
 
681 
Handler2 0x5200
 - 
 
682 
Handler2 0x5300
 - 
 
683 
#Handler 0x5400 general_exception
 - 
 
684 
Handler2 0x5400
 - 
 
685 
Handler2 0x5500
 - 
 
686 
Handler2 0x5600
 - 
 
687 
Handler2 0x5700
 - 
 
688 
Handler2 0x5800
 - 
 
689 
Handler2 0x5900
 - 
 
690 
Handler2 0x5a00
 - 
 
691 
Handler2 0x5b00
 - 
 
692 
Handler2 0x5c00
 - 
 
693 
Handler2 0x5d00
 - 
 
694 
Handler2 0x5e00
 - 
 
695 
Handler2 0x5f00
 - 
 
696 
 
 - 
 
697 
Handler2 0x6000
 - 
 
698 
Handler2 0x6100
 - 
 
699 
Handler2 0x6200
 - 
 
700 
Handler2 0x6300
 - 
 
701 
Handler2 0x6400
 - 
 
702 
Handler2 0x6500
 - 
 
703 
Handler2 0x6600
 - 
 
704 
Handler2 0x6700
 - 
 
705 
Handler2 0x6800
 - 
 
706 
Handler2 0x6900
 - 
 
707 
Handler2 0x6a00
 - 
 
708 
Handler2 0x6b00
 - 
 
709 
Handler2 0x6c00
 - 
 
710 
Handler2 0x6d00
 - 
 
711 
Handler2 0x6e00
 - 
 
712 
Handler2 0x6f00
 - 
 
713 
 
 - 
 
714 
Handler2 0x7000
 - 
 
715 
Handler2 0x7100
 - 
 
716 
Handler2 0x7200
 - 
 
717 
Handler2 0x7300
 - 
 
718 
Handler2 0x7400
 - 
 
719 
Handler2 0x7500
 - 
 
720 
Handler2 0x7600
 - 
 
721 
Handler2 0x7700
 - 
 
722 
Handler2 0x7800
 - 
 
723 
Handler2 0x7900
 - 
 
724 
Handler2 0x7a00
 - 
 
725 
Handler2 0x7b00
 - 
 
726 
Handler2 0x7c00
 - 
 
727 
Handler2 0x7d00
 - 
 
728 
Handler2 0x7e00
 - 
 
729 
Handler2 0x7f00
 - 
 
730 
 
 - 
 
731 
 
 - 
 
732 
 
 - 
 
733 
 
 - 
 
734 
 
 - 
 
735 
 
 - 
 
736 
 
 - 
 
737 
 
 317 
 
- 
 
 318 
.global ivt
738 
.align 32768
 319 
.align 32768
- 
 
 320 
ivt:
- 
 
 321 
	HEAVYWEIGHT_HANDLER 0x0000
- 
 
 322 
	HEAVYWEIGHT_HANDLER 0x0400
- 
 
 323 
	HEAVYWEIGHT_HANDLER 0x0800
- 
 
 324 
	HEAVYWEIGHT_HANDLER 0x0c00
- 
 
 325 
	HEAVYWEIGHT_HANDLER 0x1000
- 
 
 326 
	HEAVYWEIGHT_HANDLER 0x1400
739 
.global REG_DUMP
 327 
	HEAVYWEIGHT_HANDLER 0x1800
- 
 
 328 
	HEAVYWEIGHT_HANDLER 0x1c00
- 
 
 329 
	HEAVYWEIGHT_HANDLER 0x2000
- 
 
 330 
	HEAVYWEIGHT_HANDLER 0x2400
- 
 
 331 
	HEAVYWEIGHT_HANDLER 0x2800
- 
 
 332 
	HEAVYWEIGHT_HANDLER 0x2c00 break_instruction
- 
 
 333 
	HEAVYWEIGHT_HANDLER 0x3000 external_interrupt	/* For external interrupt, heavyweight handler is used. */
- 
 
 334 
	HEAVYWEIGHT_HANDLER 0x3400
- 
 
 335 
	HEAVYWEIGHT_HANDLER 0x3800
- 
 
 336 
	HEAVYWEIGHT_HANDLER 0x3c00
- 
 
 337 
	HEAVYWEIGHT_HANDLER 0x4000
- 
 
 338 
	HEAVYWEIGHT_HANDLER 0x4400
- 
 
 339 
	HEAVYWEIGHT_HANDLER 0x4800
- 
 
 340 
	HEAVYWEIGHT_HANDLER 0x4c00
740 
 
 341 
 
- 
 
 342 
	HEAVYWEIGHT_HANDLER 0x5000
- 
 
 343 
	HEAVYWEIGHT_HANDLER 0x5100
- 
 
 344 
	HEAVYWEIGHT_HANDLER 0x5200
- 
 
 345 
	HEAVYWEIGHT_HANDLER 0x5300
- 
 
 346 
	HEAVYWEIGHT_HANDLER 0x5400 general_exception
- 
 
 347 
	HEAVYWEIGHT_HANDLER 0x5500
- 
 
 348 
	HEAVYWEIGHT_HANDLER 0x5600
- 
 
 349 
	HEAVYWEIGHT_HANDLER 0x5700
- 
 
 350 
	HEAVYWEIGHT_HANDLER 0x5800
- 
 
 351 
	HEAVYWEIGHT_HANDLER 0x5900
- 
 
 352 
	HEAVYWEIGHT_HANDLER 0x5a00
- 
 
 353 
	HEAVYWEIGHT_HANDLER 0x5b00
- 
 
 354 
	HEAVYWEIGHT_HANDLER 0x5c00
- 
 
 355 
	HEAVYWEIGHT_HANDLER 0x5d00
- 
 
 356 
	HEAVYWEIGHT_HANDLER 0x5e00
- 
 
 357 
	HEAVYWEIGHT_HANDLER 0x5f00
- 
 
 358
- 
 
 359 
	HEAVYWEIGHT_HANDLER 0x6000
- 
 
 360 
	HEAVYWEIGHT_HANDLER 0x6100
- 
 
 361 
	HEAVYWEIGHT_HANDLER 0x6200
- 
 
 362 
	HEAVYWEIGHT_HANDLER 0x6300
- 
 
 363 
	HEAVYWEIGHT_HANDLER 0x6400
- 
 
 364 
	HEAVYWEIGHT_HANDLER 0x6500
- 
 
 365 
	HEAVYWEIGHT_HANDLER 0x6600
741 
REG_DUMP:
 366 
	HEAVYWEIGHT_HANDLER 0x6700
742 
.space 128*8
 367 
	HEAVYWEIGHT_HANDLER 0x6800
- 
 
 368 
	HEAVYWEIGHT_HANDLER 0x6900
- 
 
 369 
	HEAVYWEIGHT_HANDLER 0x6a00
- 
 
 370 
	HEAVYWEIGHT_HANDLER 0x6b00
- 
 
 371 
	HEAVYWEIGHT_HANDLER 0x6c00
- 
 
 372 
	HEAVYWEIGHT_HANDLER 0x6d00
- 
 
 373 
	HEAVYWEIGHT_HANDLER 0x6e00
- 
 
 374 
	HEAVYWEIGHT_HANDLER 0x6f00
743 
 
 375 
 
- 
 
 376 
	HEAVYWEIGHT_HANDLER 0x7000
- 
 
 377 
	HEAVYWEIGHT_HANDLER 0x7100
- 
 
 378 
	HEAVYWEIGHT_HANDLER 0x7200
- 
 
 379 
	HEAVYWEIGHT_HANDLER 0x7300
- 
 
 380 
	HEAVYWEIGHT_HANDLER 0x7400
- 
 
 381 
	HEAVYWEIGHT_HANDLER 0x7500
- 
 
 382 
	HEAVYWEIGHT_HANDLER 0x7600
- 
 
 383 
	HEAVYWEIGHT_HANDLER 0x7700
- 
 
 384 
	HEAVYWEIGHT_HANDLER 0x7800
- 
 
 385 
	HEAVYWEIGHT_HANDLER 0x7900
- 
 
 386 
	HEAVYWEIGHT_HANDLER 0x7a00
- 
 
 387 
	HEAVYWEIGHT_HANDLER 0x7b00
- 
 
 388 
	HEAVYWEIGHT_HANDLER 0x7c00
- 
 
 389 
	HEAVYWEIGHT_HANDLER 0x7d00
- 
 
 390 
	HEAVYWEIGHT_HANDLER 0x7e00
- 
 
 391 
	HEAVYWEIGHT_HANDLER 0x7f00